2 * Copyright 2011 Freescale Semiconductor, Inc.
3 * Copyright 2011 Linaro Ltd.
5 * The code contained herein is licensed under the GNU General Public
6 * License. You may obtain a copy of the GNU General Public License
7 * Version 2 or later at the following locations:
9 * http://www.opensource.org/licenses/gpl-license.html
10 * http://www.gnu.org/copyleft/gpl.html
13 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include "skeleton.dtsi"
49 intc: interrupt-controller@00a01000 {
50 compatible = "arm,cortex-a9-gic";
51 #interrupt-cells = <3>;
53 reg = <0x00a01000 0x1000>,
62 compatible = "fsl,imx-ckil", "fixed-clock";
64 clock-frequency = <32768>;
68 compatible = "fsl,imx-ckih1", "fixed-clock";
70 clock-frequency = <0>;
74 compatible = "fsl,imx-osc", "fixed-clock";
76 clock-frequency = <24000000>;
83 compatible = "simple-bus";
84 interrupt-parent = <&intc>;
87 dma_apbh: dma-apbh@00110000 {
88 compatible = "fsl,imx6q-dma-apbh", "fsl,imx28-dma-apbh";
89 reg = <0x00110000 0x2000>;
90 interrupts = <0 13 IRQ_TYPE_LEVEL_HIGH>,
91 <0 13 IRQ_TYPE_LEVEL_HIGH>,
92 <0 13 IRQ_TYPE_LEVEL_HIGH>,
93 <0 13 IRQ_TYPE_LEVEL_HIGH>;
94 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
100 gpmi: gpmi-nand@00112000 {
101 compatible = "fsl,imx6q-gpmi-nand";
102 #address-cells = <1>;
104 reg = <0x00112000 0x2000>, <0x00114000 0x2000>;
105 reg-names = "gpmi-nand", "bch";
106 interrupts = <0 15 IRQ_TYPE_LEVEL_HIGH>;
107 interrupt-names = "bch";
108 clocks = <&clks 152>, <&clks 153>, <&clks 151>,
109 <&clks 150>, <&clks 149>;
110 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
111 "gpmi_bch_apb", "per1_bch";
112 dmas = <&dma_apbh 0>;
118 compatible = "arm,cortex-a9-twd-timer";
119 reg = <0x00a00600 0x20>;
120 interrupts = <1 13 0xf01>;
124 L2: l2-cache@00a02000 {
125 compatible = "arm,pl310-cache";
126 reg = <0x00a02000 0x1000>;
127 interrupts = <0 92 IRQ_TYPE_LEVEL_HIGH>;
130 arm,tag-latency = <4 2 3>;
131 arm,data-latency = <4 2 3>;
134 pcie: pcie@0x01000000 {
135 compatible = "fsl,imx6q-pcie", "snps,dw-pcie";
136 reg = <0x01ffc000 0x4000>; /* DBI */
137 #address-cells = <3>;
140 ranges = <0x00000800 0 0x01f00000 0x01f00000 0 0x00080000 /* configuration space */
141 0x81000000 0 0 0x01f80000 0 0x00010000 /* downstream I/O */
142 0x82000000 0 0x01000000 0x01000000 0 0x00f00000>; /* non-prefetchable memory */
144 interrupts = <GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
145 interrupt-names = "msi";
146 #interrupt-cells = <1>;
147 interrupt-map-mask = <0 0 0 0x7>;
148 interrupt-map = <0 0 0 1 &intc GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>,
149 <0 0 0 2 &intc GIC_SPI 122 IRQ_TYPE_LEVEL_HIGH>,
150 <0 0 0 3 &intc GIC_SPI 121 IRQ_TYPE_LEVEL_HIGH>,
151 <0 0 0 4 &intc GIC_SPI 120 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&clks 144>, <&clks 206>, <&clks 189>;
153 clock-names = "pcie", "pcie_bus", "pcie_phy";
158 compatible = "arm,cortex-a9-pmu";
159 interrupts = <0 94 IRQ_TYPE_LEVEL_HIGH>;
162 aips-bus@02000000 { /* AIPS1 */
163 compatible = "fsl,aips-bus", "simple-bus";
164 #address-cells = <1>;
166 reg = <0x02000000 0x100000>;
170 compatible = "fsl,spba-bus", "simple-bus";
171 #address-cells = <1>;
173 reg = <0x02000000 0x40000>;
176 spdif: spdif@02004000 {
177 compatible = "fsl,imx35-spdif";
178 reg = <0x02004000 0x4000>;
179 interrupts = <0 52 IRQ_TYPE_LEVEL_HIGH>;
180 dmas = <&sdma 14 18 0>,
182 dma-names = "rx", "tx";
183 clocks = <&clks 197>, <&clks 3>,
184 <&clks 197>, <&clks 107>,
185 <&clks 0>, <&clks 118>,
186 <&clks 0>, <&clks 139>,
188 clock-names = "core", "rxtx0",
196 ecspi1: ecspi@02008000 {
197 #address-cells = <1>;
199 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
200 reg = <0x02008000 0x4000>;
201 interrupts = <0 31 IRQ_TYPE_LEVEL_HIGH>;
202 clocks = <&clks 112>, <&clks 112>;
203 clock-names = "ipg", "per";
204 dmas = <&sdma 3 7 1>, <&sdma 4 7 2>;
205 dma-names = "rx", "tx";
209 ecspi2: ecspi@0200c000 {
210 #address-cells = <1>;
212 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
213 reg = <0x0200c000 0x4000>;
214 interrupts = <0 32 IRQ_TYPE_LEVEL_HIGH>;
215 clocks = <&clks 113>, <&clks 113>;
216 clock-names = "ipg", "per";
217 dmas = <&sdma 5 7 1>, <&sdma 6 7 2>;
218 dma-names = "rx", "tx";
222 ecspi3: ecspi@02010000 {
223 #address-cells = <1>;
225 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
226 reg = <0x02010000 0x4000>;
227 interrupts = <0 33 IRQ_TYPE_LEVEL_HIGH>;
228 clocks = <&clks 114>, <&clks 114>;
229 clock-names = "ipg", "per";
230 dmas = <&sdma 7 7 1>, <&sdma 8 7 2>;
231 dma-names = "rx", "tx";
235 ecspi4: ecspi@02014000 {
236 #address-cells = <1>;
238 compatible = "fsl,imx6q-ecspi", "fsl,imx51-ecspi";
239 reg = <0x02014000 0x4000>;
240 interrupts = <0 34 IRQ_TYPE_LEVEL_HIGH>;
241 clocks = <&clks 115>, <&clks 115>;
242 clock-names = "ipg", "per";
243 dmas = <&sdma 9 7 1>, <&sdma 10 7 2>;
244 dma-names = "rx", "tx";
248 uart1: serial@02020000 {
249 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
250 reg = <0x02020000 0x4000>;
251 interrupts = <0 26 IRQ_TYPE_LEVEL_HIGH>;
252 clocks = <&clks 160>, <&clks 161>;
253 clock-names = "ipg", "per";
254 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
255 dma-names = "rx", "tx";
259 esai: esai@02024000 {
260 reg = <0x02024000 0x4000>;
261 interrupts = <0 51 IRQ_TYPE_LEVEL_HIGH>;
265 compatible = "fsl,imx6q-ssi",
268 reg = <0x02028000 0x4000>;
269 interrupts = <0 46 IRQ_TYPE_LEVEL_HIGH>;
270 clocks = <&clks 178>;
271 dmas = <&sdma 37 1 0>,
273 dma-names = "rx", "tx";
274 fsl,fifo-depth = <15>;
275 fsl,ssi-dma-events = <38 37>;
280 compatible = "fsl,imx6q-ssi",
283 reg = <0x0202c000 0x4000>;
284 interrupts = <0 47 IRQ_TYPE_LEVEL_HIGH>;
285 clocks = <&clks 179>;
286 dmas = <&sdma 41 1 0>,
288 dma-names = "rx", "tx";
289 fsl,fifo-depth = <15>;
290 fsl,ssi-dma-events = <42 41>;
295 compatible = "fsl,imx6q-ssi",
298 reg = <0x02030000 0x4000>;
299 interrupts = <0 48 IRQ_TYPE_LEVEL_HIGH>;
300 clocks = <&clks 180>;
301 dmas = <&sdma 45 1 0>,
303 dma-names = "rx", "tx";
304 fsl,fifo-depth = <15>;
305 fsl,ssi-dma-events = <46 45>;
309 asrc: asrc@02034000 {
310 reg = <0x02034000 0x4000>;
311 interrupts = <0 50 IRQ_TYPE_LEVEL_HIGH>;
315 reg = <0x0203c000 0x4000>;
320 reg = <0x02040000 0x3c000>;
321 interrupts = <0 3 IRQ_TYPE_LEVEL_HIGH>,
322 <0 12 IRQ_TYPE_LEVEL_HIGH>;
325 aipstz@0207c000 { /* AIPSTZ1 */
326 reg = <0x0207c000 0x4000>;
331 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
332 reg = <0x02080000 0x4000>;
333 interrupts = <0 83 IRQ_TYPE_LEVEL_HIGH>;
334 clocks = <&clks 62>, <&clks 145>;
335 clock-names = "ipg", "per";
340 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
341 reg = <0x02084000 0x4000>;
342 interrupts = <0 84 IRQ_TYPE_LEVEL_HIGH>;
343 clocks = <&clks 62>, <&clks 146>;
344 clock-names = "ipg", "per";
349 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
350 reg = <0x02088000 0x4000>;
351 interrupts = <0 85 IRQ_TYPE_LEVEL_HIGH>;
352 clocks = <&clks 62>, <&clks 147>;
353 clock-names = "ipg", "per";
358 compatible = "fsl,imx6q-pwm", "fsl,imx27-pwm";
359 reg = <0x0208c000 0x4000>;
360 interrupts = <0 86 IRQ_TYPE_LEVEL_HIGH>;
361 clocks = <&clks 62>, <&clks 148>;
362 clock-names = "ipg", "per";
365 can1: flexcan@02090000 {
366 compatible = "fsl,imx6q-flexcan";
367 reg = <0x02090000 0x4000>;
368 interrupts = <0 110 IRQ_TYPE_LEVEL_HIGH>;
369 clocks = <&clks 108>, <&clks 109>;
370 clock-names = "ipg", "per";
374 can2: flexcan@02094000 {
375 compatible = "fsl,imx6q-flexcan";
376 reg = <0x02094000 0x4000>;
377 interrupts = <0 111 IRQ_TYPE_LEVEL_HIGH>;
378 clocks = <&clks 110>, <&clks 111>;
379 clock-names = "ipg", "per";
384 compatible = "fsl,imx6q-gpt", "fsl,imx31-gpt";
385 reg = <0x02098000 0x4000>;
386 interrupts = <0 55 IRQ_TYPE_LEVEL_HIGH>;
387 clocks = <&clks 119>, <&clks 120>;
388 clock-names = "ipg", "per";
391 gpio1: gpio@0209c000 {
392 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
393 reg = <0x0209c000 0x4000>;
394 interrupts = <0 66 IRQ_TYPE_LEVEL_HIGH>,
395 <0 67 IRQ_TYPE_LEVEL_HIGH>;
398 interrupt-controller;
399 #interrupt-cells = <2>;
402 gpio2: gpio@020a0000 {
403 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
404 reg = <0x020a0000 0x4000>;
405 interrupts = <0 68 IRQ_TYPE_LEVEL_HIGH>,
406 <0 69 IRQ_TYPE_LEVEL_HIGH>;
409 interrupt-controller;
410 #interrupt-cells = <2>;
413 gpio3: gpio@020a4000 {
414 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
415 reg = <0x020a4000 0x4000>;
416 interrupts = <0 70 IRQ_TYPE_LEVEL_HIGH>,
417 <0 71 IRQ_TYPE_LEVEL_HIGH>;
420 interrupt-controller;
421 #interrupt-cells = <2>;
424 gpio4: gpio@020a8000 {
425 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
426 reg = <0x020a8000 0x4000>;
427 interrupts = <0 72 IRQ_TYPE_LEVEL_HIGH>,
428 <0 73 IRQ_TYPE_LEVEL_HIGH>;
431 interrupt-controller;
432 #interrupt-cells = <2>;
435 gpio5: gpio@020ac000 {
436 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
437 reg = <0x020ac000 0x4000>;
438 interrupts = <0 74 IRQ_TYPE_LEVEL_HIGH>,
439 <0 75 IRQ_TYPE_LEVEL_HIGH>;
442 interrupt-controller;
443 #interrupt-cells = <2>;
446 gpio6: gpio@020b0000 {
447 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
448 reg = <0x020b0000 0x4000>;
449 interrupts = <0 76 IRQ_TYPE_LEVEL_HIGH>,
450 <0 77 IRQ_TYPE_LEVEL_HIGH>;
453 interrupt-controller;
454 #interrupt-cells = <2>;
457 gpio7: gpio@020b4000 {
458 compatible = "fsl,imx6q-gpio", "fsl,imx35-gpio";
459 reg = <0x020b4000 0x4000>;
460 interrupts = <0 78 IRQ_TYPE_LEVEL_HIGH>,
461 <0 79 IRQ_TYPE_LEVEL_HIGH>;
464 interrupt-controller;
465 #interrupt-cells = <2>;
469 compatible = "fsl,imx6qdl-kpp", "fsl,imx21-kpp";
470 reg = <0x020b8000 0x4000>;
471 interrupts = <0 82 IRQ_TYPE_LEVEL_HIGH>;
475 wdog1: wdog@020bc000 {
476 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
477 reg = <0x020bc000 0x4000>;
478 interrupts = <0 80 IRQ_TYPE_LEVEL_HIGH>;
482 wdog2: wdog@020c0000 {
483 compatible = "fsl,imx6q-wdt", "fsl,imx21-wdt";
484 reg = <0x020c0000 0x4000>;
485 interrupts = <0 81 IRQ_TYPE_LEVEL_HIGH>;
491 compatible = "fsl,imx6q-ccm";
492 reg = <0x020c4000 0x4000>;
493 interrupts = <0 87 IRQ_TYPE_LEVEL_HIGH>,
494 <0 88 IRQ_TYPE_LEVEL_HIGH>;
498 anatop: anatop@020c8000 {
499 compatible = "fsl,imx6q-anatop", "syscon", "simple-bus";
500 reg = <0x020c8000 0x1000>;
501 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>,
502 <0 54 IRQ_TYPE_LEVEL_HIGH>,
503 <0 127 IRQ_TYPE_LEVEL_HIGH>;
506 compatible = "fsl,anatop-regulator";
507 regulator-name = "vdd1p1";
508 regulator-min-microvolt = <800000>;
509 regulator-max-microvolt = <1375000>;
511 anatop-reg-offset = <0x110>;
512 anatop-vol-bit-shift = <8>;
513 anatop-vol-bit-width = <5>;
514 anatop-min-bit-val = <4>;
515 anatop-min-voltage = <800000>;
516 anatop-max-voltage = <1375000>;
520 compatible = "fsl,anatop-regulator";
521 regulator-name = "vdd3p0";
522 regulator-min-microvolt = <2800000>;
523 regulator-max-microvolt = <3150000>;
525 anatop-reg-offset = <0x120>;
526 anatop-vol-bit-shift = <8>;
527 anatop-vol-bit-width = <5>;
528 anatop-min-bit-val = <0>;
529 anatop-min-voltage = <2625000>;
530 anatop-max-voltage = <3400000>;
534 compatible = "fsl,anatop-regulator";
535 regulator-name = "vdd2p5";
536 regulator-min-microvolt = <2000000>;
537 regulator-max-microvolt = <2750000>;
539 anatop-reg-offset = <0x130>;
540 anatop-vol-bit-shift = <8>;
541 anatop-vol-bit-width = <5>;
542 anatop-min-bit-val = <0>;
543 anatop-min-voltage = <2000000>;
544 anatop-max-voltage = <2750000>;
547 reg_arm: regulator-vddcore@140 {
548 compatible = "fsl,anatop-regulator";
549 regulator-name = "vddarm";
550 regulator-min-microvolt = <725000>;
551 regulator-max-microvolt = <1450000>;
553 anatop-reg-offset = <0x140>;
554 anatop-vol-bit-shift = <0>;
555 anatop-vol-bit-width = <5>;
556 anatop-delay-reg-offset = <0x170>;
557 anatop-delay-bit-shift = <24>;
558 anatop-delay-bit-width = <2>;
559 anatop-min-bit-val = <1>;
560 anatop-min-voltage = <725000>;
561 anatop-max-voltage = <1450000>;
564 reg_pu: regulator-vddpu@140 {
565 compatible = "fsl,anatop-regulator";
566 regulator-name = "vddpu";
567 regulator-min-microvolt = <725000>;
568 regulator-max-microvolt = <1450000>;
570 anatop-reg-offset = <0x140>;
571 anatop-vol-bit-shift = <9>;
572 anatop-vol-bit-width = <5>;
573 anatop-delay-reg-offset = <0x170>;
574 anatop-delay-bit-shift = <26>;
575 anatop-delay-bit-width = <2>;
576 anatop-min-bit-val = <1>;
577 anatop-min-voltage = <725000>;
578 anatop-max-voltage = <1450000>;
581 reg_soc: regulator-vddsoc@140 {
582 compatible = "fsl,anatop-regulator";
583 regulator-name = "vddsoc";
584 regulator-min-microvolt = <725000>;
585 regulator-max-microvolt = <1450000>;
587 anatop-reg-offset = <0x140>;
588 anatop-vol-bit-shift = <18>;
589 anatop-vol-bit-width = <5>;
590 anatop-delay-reg-offset = <0x170>;
591 anatop-delay-bit-shift = <28>;
592 anatop-delay-bit-width = <2>;
593 anatop-min-bit-val = <1>;
594 anatop-min-voltage = <725000>;
595 anatop-max-voltage = <1450000>;
600 compatible = "fsl,imx6q-tempmon";
601 interrupts = <0 49 IRQ_TYPE_LEVEL_HIGH>;
602 fsl,tempmon = <&anatop>;
603 fsl,tempmon-data = <&ocotp>;
604 clocks = <&clks 172>;
607 usbphy1: usbphy@020c9000 {
608 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
609 reg = <0x020c9000 0x1000>;
610 interrupts = <0 44 IRQ_TYPE_LEVEL_HIGH>;
611 clocks = <&clks 182>;
612 fsl,anatop = <&anatop>;
615 usbphy2: usbphy@020ca000 {
616 compatible = "fsl,imx6q-usbphy", "fsl,imx23-usbphy";
617 reg = <0x020ca000 0x1000>;
618 interrupts = <0 45 IRQ_TYPE_LEVEL_HIGH>;
619 clocks = <&clks 183>;
620 fsl,anatop = <&anatop>;
624 compatible = "fsl,sec-v4.0-mon", "simple-bus";
625 #address-cells = <1>;
627 ranges = <0 0x020cc000 0x4000>;
630 compatible = "fsl,sec-v4.0-mon-rtc-lp";
632 interrupts = <0 19 IRQ_TYPE_LEVEL_HIGH>,
633 <0 20 IRQ_TYPE_LEVEL_HIGH>;
637 epit1: epit@020d0000 { /* EPIT1 */
638 reg = <0x020d0000 0x4000>;
639 interrupts = <0 56 IRQ_TYPE_LEVEL_HIGH>;
642 epit2: epit@020d4000 { /* EPIT2 */
643 reg = <0x020d4000 0x4000>;
644 interrupts = <0 57 IRQ_TYPE_LEVEL_HIGH>;
648 compatible = "fsl,imx6q-src", "fsl,imx51-src";
649 reg = <0x020d8000 0x4000>;
650 interrupts = <0 91 IRQ_TYPE_LEVEL_HIGH>,
651 <0 96 IRQ_TYPE_LEVEL_HIGH>;
656 compatible = "fsl,imx6q-gpc";
657 reg = <0x020dc000 0x4000>;
658 interrupts = <0 89 IRQ_TYPE_LEVEL_HIGH>,
659 <0 90 IRQ_TYPE_LEVEL_HIGH>;
662 gpr: iomuxc-gpr@020e0000 {
663 compatible = "fsl,imx6q-iomuxc-gpr", "syscon";
664 reg = <0x020e0000 0x38>;
667 iomuxc: iomuxc@020e0000 {
668 compatible = "fsl,imx6dl-iomuxc", "fsl,imx6q-iomuxc";
669 reg = <0x020e0000 0x4000>;
673 #address-cells = <1>;
675 compatible = "fsl,imx6q-ldb", "fsl,imx53-ldb";
680 #address-cells = <1>;
688 lvds0_mux_0: endpoint {
689 remote-endpoint = <&ipu1_di0_lvds0>;
696 lvds0_mux_1: endpoint {
697 remote-endpoint = <&ipu1_di1_lvds0>;
703 #address-cells = <1>;
711 lvds1_mux_0: endpoint {
712 remote-endpoint = <&ipu1_di0_lvds1>;
719 lvds1_mux_1: endpoint {
720 remote-endpoint = <&ipu1_di1_lvds1>;
727 #address-cells = <1>;
729 reg = <0x00120000 0x9000>;
730 interrupts = <0 115 0x04>;
732 clocks = <&clks 123>, <&clks 124>;
733 clock-names = "iahb", "isfr";
739 hdmi_mux_0: endpoint {
740 remote-endpoint = <&ipu1_di0_hdmi>;
747 hdmi_mux_1: endpoint {
748 remote-endpoint = <&ipu1_di1_hdmi>;
753 dcic1: dcic@020e4000 {
754 reg = <0x020e4000 0x4000>;
755 interrupts = <0 124 IRQ_TYPE_LEVEL_HIGH>;
758 dcic2: dcic@020e8000 {
759 reg = <0x020e8000 0x4000>;
760 interrupts = <0 125 IRQ_TYPE_LEVEL_HIGH>;
763 sdma: sdma@020ec000 {
764 compatible = "fsl,imx6q-sdma", "fsl,imx35-sdma";
765 reg = <0x020ec000 0x4000>;
766 interrupts = <0 2 IRQ_TYPE_LEVEL_HIGH>;
767 clocks = <&clks 155>, <&clks 155>;
768 clock-names = "ipg", "ahb";
770 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
774 aips-bus@02100000 { /* AIPS2 */
775 compatible = "fsl,aips-bus", "simple-bus";
776 #address-cells = <1>;
778 reg = <0x02100000 0x100000>;
782 reg = <0x02100000 0x40000>;
783 interrupts = <0 105 IRQ_TYPE_LEVEL_HIGH>,
784 <0 106 IRQ_TYPE_LEVEL_HIGH>;
787 aipstz@0217c000 { /* AIPSTZ2 */
788 reg = <0x0217c000 0x4000>;
791 usbotg: usb@02184000 {
792 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
793 reg = <0x02184000 0x200>;
794 interrupts = <0 43 IRQ_TYPE_LEVEL_HIGH>;
795 clocks = <&clks 162>;
796 fsl,usbphy = <&usbphy1>;
797 fsl,usbmisc = <&usbmisc 0>;
801 usbh1: usb@02184200 {
802 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
803 reg = <0x02184200 0x200>;
804 interrupts = <0 40 IRQ_TYPE_LEVEL_HIGH>;
805 clocks = <&clks 162>;
806 fsl,usbphy = <&usbphy2>;
807 fsl,usbmisc = <&usbmisc 1>;
811 usbh2: usb@02184400 {
812 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
813 reg = <0x02184400 0x200>;
814 interrupts = <0 41 IRQ_TYPE_LEVEL_HIGH>;
815 clocks = <&clks 162>;
816 fsl,usbmisc = <&usbmisc 2>;
820 usbh3: usb@02184600 {
821 compatible = "fsl,imx6q-usb", "fsl,imx27-usb";
822 reg = <0x02184600 0x200>;
823 interrupts = <0 42 IRQ_TYPE_LEVEL_HIGH>;
824 clocks = <&clks 162>;
825 fsl,usbmisc = <&usbmisc 3>;
829 usbmisc: usbmisc@02184800 {
831 compatible = "fsl,imx6q-usbmisc";
832 reg = <0x02184800 0x200>;
833 clocks = <&clks 162>;
836 fec: ethernet@02188000 {
837 compatible = "fsl,imx6q-fec";
838 reg = <0x02188000 0x4000>;
839 interrupts-extended =
840 <&intc 0 118 IRQ_TYPE_LEVEL_HIGH>,
841 <&intc 0 119 IRQ_TYPE_LEVEL_HIGH>;
842 clocks = <&clks 117>, <&clks 117>, <&clks 190>;
843 clock-names = "ipg", "ahb", "ptp";
848 reg = <0x0218c000 0x4000>;
849 interrupts = <0 53 IRQ_TYPE_LEVEL_HIGH>,
850 <0 117 IRQ_TYPE_LEVEL_HIGH>,
851 <0 126 IRQ_TYPE_LEVEL_HIGH>;
854 usdhc1: usdhc@02190000 {
855 compatible = "fsl,imx6q-usdhc";
856 reg = <0x02190000 0x4000>;
857 interrupts = <0 22 IRQ_TYPE_LEVEL_HIGH>;
858 clocks = <&clks 163>, <&clks 163>, <&clks 163>;
859 clock-names = "ipg", "ahb", "per";
864 usdhc2: usdhc@02194000 {
865 compatible = "fsl,imx6q-usdhc";
866 reg = <0x02194000 0x4000>;
867 interrupts = <0 23 IRQ_TYPE_LEVEL_HIGH>;
868 clocks = <&clks 164>, <&clks 164>, <&clks 164>;
869 clock-names = "ipg", "ahb", "per";
874 usdhc3: usdhc@02198000 {
875 compatible = "fsl,imx6q-usdhc";
876 reg = <0x02198000 0x4000>;
877 interrupts = <0 24 IRQ_TYPE_LEVEL_HIGH>;
878 clocks = <&clks 165>, <&clks 165>, <&clks 165>;
879 clock-names = "ipg", "ahb", "per";
884 usdhc4: usdhc@0219c000 {
885 compatible = "fsl,imx6q-usdhc";
886 reg = <0x0219c000 0x4000>;
887 interrupts = <0 25 IRQ_TYPE_LEVEL_HIGH>;
888 clocks = <&clks 166>, <&clks 166>, <&clks 166>;
889 clock-names = "ipg", "ahb", "per";
895 #address-cells = <1>;
897 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
898 reg = <0x021a0000 0x4000>;
899 interrupts = <0 36 IRQ_TYPE_LEVEL_HIGH>;
900 clocks = <&clks 125>;
905 #address-cells = <1>;
907 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
908 reg = <0x021a4000 0x4000>;
909 interrupts = <0 37 IRQ_TYPE_LEVEL_HIGH>;
910 clocks = <&clks 126>;
915 #address-cells = <1>;
917 compatible = "fsl,imx6q-i2c", "fsl,imx21-i2c";
918 reg = <0x021a8000 0x4000>;
919 interrupts = <0 38 IRQ_TYPE_LEVEL_HIGH>;
920 clocks = <&clks 127>;
925 reg = <0x021ac000 0x4000>;
928 mmdc0: mmdc@021b0000 { /* MMDC0 */
929 compatible = "fsl,imx6q-mmdc";
930 reg = <0x021b0000 0x4000>;
933 mmdc1: mmdc@021b4000 { /* MMDC1 */
934 reg = <0x021b4000 0x4000>;
937 weim: weim@021b8000 {
938 compatible = "fsl,imx6q-weim";
939 reg = <0x021b8000 0x4000>;
940 interrupts = <0 14 IRQ_TYPE_LEVEL_HIGH>;
941 clocks = <&clks 196>;
944 ocotp: ocotp@021bc000 {
945 compatible = "fsl,imx6q-ocotp", "syscon";
946 reg = <0x021bc000 0x4000>;
949 tzasc@021d0000 { /* TZASC1 */
950 reg = <0x021d0000 0x4000>;
951 interrupts = <0 108 IRQ_TYPE_LEVEL_HIGH>;
954 tzasc@021d4000 { /* TZASC2 */
955 reg = <0x021d4000 0x4000>;
956 interrupts = <0 109 IRQ_TYPE_LEVEL_HIGH>;
959 audmux: audmux@021d8000 {
960 compatible = "fsl,imx6q-audmux", "fsl,imx31-audmux";
961 reg = <0x021d8000 0x4000>;
965 mipi_csi: mipi@021dc000 {
966 reg = <0x021dc000 0x4000>;
969 mipi_dsi: mipi@021e0000 {
970 #address-cells = <1>;
972 reg = <0x021e0000 0x4000>;
978 mipi_mux_0: endpoint {
979 remote-endpoint = <&ipu1_di0_mipi>;
986 mipi_mux_1: endpoint {
987 remote-endpoint = <&ipu1_di1_mipi>;
993 reg = <0x021e4000 0x4000>;
994 interrupts = <0 18 IRQ_TYPE_LEVEL_HIGH>;
997 uart2: serial@021e8000 {
998 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
999 reg = <0x021e8000 0x4000>;
1000 interrupts = <0 27 IRQ_TYPE_LEVEL_HIGH>;
1001 clocks = <&clks 160>, <&clks 161>;
1002 clock-names = "ipg", "per";
1003 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
1004 dma-names = "rx", "tx";
1005 status = "disabled";
1008 uart3: serial@021ec000 {
1009 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1010 reg = <0x021ec000 0x4000>;
1011 interrupts = <0 28 IRQ_TYPE_LEVEL_HIGH>;
1012 clocks = <&clks 160>, <&clks 161>;
1013 clock-names = "ipg", "per";
1014 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
1015 dma-names = "rx", "tx";
1016 status = "disabled";
1019 uart4: serial@021f0000 {
1020 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1021 reg = <0x021f0000 0x4000>;
1022 interrupts = <0 29 IRQ_TYPE_LEVEL_HIGH>;
1023 clocks = <&clks 160>, <&clks 161>;
1024 clock-names = "ipg", "per";
1025 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
1026 dma-names = "rx", "tx";
1027 status = "disabled";
1030 uart5: serial@021f4000 {
1031 compatible = "fsl,imx6q-uart", "fsl,imx21-uart";
1032 reg = <0x021f4000 0x4000>;
1033 interrupts = <0 30 IRQ_TYPE_LEVEL_HIGH>;
1034 clocks = <&clks 160>, <&clks 161>;
1035 clock-names = "ipg", "per";
1036 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
1037 dma-names = "rx", "tx";
1038 status = "disabled";
1042 ipu1: ipu@02400000 {
1043 #address-cells = <1>;
1045 compatible = "fsl,imx6q-ipu";
1046 reg = <0x02400000 0x400000>;
1047 interrupts = <0 6 IRQ_TYPE_LEVEL_HIGH>,
1048 <0 5 IRQ_TYPE_LEVEL_HIGH>;
1049 clocks = <&clks 130>, <&clks 131>, <&clks 132>;
1050 clock-names = "bus", "di0", "di1";
1054 #address-cells = <1>;
1058 ipu1_di0_disp0: endpoint@0 {
1061 ipu1_di0_hdmi: endpoint@1 {
1062 remote-endpoint = <&hdmi_mux_0>;
1065 ipu1_di0_mipi: endpoint@2 {
1066 remote-endpoint = <&mipi_mux_0>;
1069 ipu1_di0_lvds0: endpoint@3 {
1070 remote-endpoint = <&lvds0_mux_0>;
1073 ipu1_di0_lvds1: endpoint@4 {
1074 remote-endpoint = <&lvds1_mux_0>;
1079 #address-cells = <1>;
1083 ipu1_di0_disp1: endpoint@0 {
1086 ipu1_di1_hdmi: endpoint@1 {
1087 remote-endpoint = <&hdmi_mux_1>;
1090 ipu1_di1_mipi: endpoint@2 {
1091 remote-endpoint = <&mipi_mux_1>;
1094 ipu1_di1_lvds0: endpoint@3 {
1095 remote-endpoint = <&lvds0_mux_1>;
1098 ipu1_di1_lvds1: endpoint@4 {
1099 remote-endpoint = <&lvds1_mux_1>;