2 * Copyright 2014 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
9 #include <dt-bindings/clock/imx6sx-clock.h>
10 #include <dt-bindings/gpio/gpio.h>
11 #include <dt-bindings/input/input.h>
12 #include <dt-bindings/interrupt-controller/arm-gic.h>
13 #include "imx6sx-pinfunc.h"
14 #include "skeleton.dtsi"
57 compatible = "arm,cortex-a9";
60 next-level-cache = <&L2>;
67 fsl,soc-operating-points = <
73 clock-latency = <61036>; /* two CLK32 periods */
74 clocks = <&clks IMX6SX_CLK_ARM>,
75 <&clks IMX6SX_CLK_PLL2_PFD2>,
76 <&clks IMX6SX_CLK_STEP>,
77 <&clks IMX6SX_CLK_PLL1_SW>,
78 <&clks IMX6SX_CLK_PLL1_SYS>;
79 clock-names = "arm", "pll2_pfd2_396m", "step",
80 "pll1_sw", "pll1_sys";
81 arm-supply = <®_arm>;
82 soc-supply = <®_soc>;
86 intc: interrupt-controller@00a01000 {
87 compatible = "arm,cortex-a9-gic";
88 #interrupt-cells = <3>;
90 reg = <0x00a01000 0x1000>,
92 interrupt-parent = <&intc>;
100 compatible = "fixed-clock";
103 clock-frequency = <32768>;
104 clock-output-names = "ckil";
108 compatible = "fixed-clock";
111 clock-frequency = <24000000>;
112 clock-output-names = "osc";
116 compatible = "fixed-clock";
119 clock-frequency = <0>;
120 clock-output-names = "ipp_di0";
124 compatible = "fixed-clock";
127 clock-frequency = <0>;
128 clock-output-names = "ipp_di1";
133 #address-cells = <1>;
135 compatible = "simple-bus";
136 interrupt-parent = <&gpc>;
140 compatible = "arm,cortex-a9-pmu";
141 interrupts = <GIC_SPI 94 IRQ_TYPE_LEVEL_HIGH>;
144 ocram: sram@00900000 {
145 compatible = "mmio-sram";
146 reg = <0x00900000 0x20000>;
147 clocks = <&clks IMX6SX_CLK_OCRAM>;
150 L2: l2-cache@00a02000 {
151 compatible = "arm,pl310-cache";
152 reg = <0x00a02000 0x1000>;
153 interrupts = <GIC_SPI 92 IRQ_TYPE_LEVEL_HIGH>;
156 arm,tag-latency = <4 2 3>;
157 arm,data-latency = <4 2 3>;
160 dma_apbh: dma-apbh@01804000 {
161 compatible = "fsl,imx6sx-dma-apbh", "fsl,imx28-dma-apbh";
162 reg = <0x01804000 0x2000>;
163 interrupts = <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
164 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
165 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>,
166 <GIC_SPI 13 IRQ_TYPE_LEVEL_HIGH>;
167 interrupt-names = "gpmi0", "gpmi1", "gpmi2", "gpmi3";
170 clocks = <&clks IMX6SX_CLK_APBH_DMA>;
173 gpmi: gpmi-nand@01806000{
174 compatible = "fsl,imx6sx-gpmi-nand";
175 #address-cells = <1>;
177 reg = <0x01806000 0x2000>, <0x01808000 0x4000>;
178 reg-names = "gpmi-nand", "bch";
179 interrupts = <GIC_SPI 15 IRQ_TYPE_LEVEL_HIGH>;
180 interrupt-names = "bch";
181 clocks = <&clks IMX6SX_CLK_GPMI_IO>,
182 <&clks IMX6SX_CLK_GPMI_APB>,
183 <&clks IMX6SX_CLK_GPMI_BCH>,
184 <&clks IMX6SX_CLK_GPMI_BCH_APB>,
185 <&clks IMX6SX_CLK_PER1_BCH>;
186 clock-names = "gpmi_io", "gpmi_apb", "gpmi_bch",
187 "gpmi_bch_apb", "per1_bch";
188 dmas = <&dma_apbh 0>;
193 aips1: aips-bus@02000000 {
194 compatible = "fsl,aips-bus", "simple-bus";
195 #address-cells = <1>;
197 reg = <0x02000000 0x100000>;
201 compatible = "fsl,spba-bus", "simple-bus";
202 #address-cells = <1>;
204 reg = <0x02000000 0x40000>;
207 spdif: spdif@02004000 {
208 compatible = "fsl,imx6sx-spdif", "fsl,imx35-spdif";
209 reg = <0x02004000 0x4000>;
210 interrupts = <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>;
211 dmas = <&sdma 14 18 0>,
213 dma-names = "rx", "tx";
214 clocks = <&clks IMX6SX_CLK_SPDIF>,
215 <&clks IMX6SX_CLK_OSC>,
216 <&clks IMX6SX_CLK_SPDIF>,
217 <&clks 0>, <&clks 0>, <&clks 0>,
218 <&clks IMX6SX_CLK_IPG>,
219 <&clks 0>, <&clks 0>,
220 <&clks IMX6SX_CLK_SPBA>;
221 clock-names = "core", "rxtx0",
229 ecspi1: ecspi@02008000 {
230 #address-cells = <1>;
232 compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
233 reg = <0x02008000 0x4000>;
234 interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;
235 clocks = <&clks IMX6SX_CLK_ECSPI1>,
236 <&clks IMX6SX_CLK_ECSPI1>;
237 clock-names = "ipg", "per";
241 ecspi2: ecspi@0200c000 {
242 #address-cells = <1>;
244 compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
245 reg = <0x0200c000 0x4000>;
246 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
247 clocks = <&clks IMX6SX_CLK_ECSPI2>,
248 <&clks IMX6SX_CLK_ECSPI2>;
249 clock-names = "ipg", "per";
253 ecspi3: ecspi@02010000 {
254 #address-cells = <1>;
256 compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
257 reg = <0x02010000 0x4000>;
258 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
259 clocks = <&clks IMX6SX_CLK_ECSPI3>,
260 <&clks IMX6SX_CLK_ECSPI3>;
261 clock-names = "ipg", "per";
265 ecspi4: ecspi@02014000 {
266 #address-cells = <1>;
268 compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
269 reg = <0x02014000 0x4000>;
270 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
271 clocks = <&clks IMX6SX_CLK_ECSPI4>,
272 <&clks IMX6SX_CLK_ECSPI4>;
273 clock-names = "ipg", "per";
277 uart1: serial@02020000 {
278 compatible = "fsl,imx6sx-uart", "fsl,imx21-uart";
279 reg = <0x02020000 0x4000>;
280 interrupts = <GIC_SPI 26 IRQ_TYPE_LEVEL_HIGH>;
281 clocks = <&clks IMX6SX_CLK_UART_IPG>,
282 <&clks IMX6SX_CLK_UART_SERIAL>;
283 clock-names = "ipg", "per";
284 dmas = <&sdma 25 4 0>, <&sdma 26 4 0>;
285 dma-names = "rx", "tx";
289 esai: esai@02024000 {
290 reg = <0x02024000 0x4000>;
291 interrupts = <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>;
292 clocks = <&clks IMX6SX_CLK_ESAI_IPG>,
293 <&clks IMX6SX_CLK_ESAI_MEM>,
294 <&clks IMX6SX_CLK_ESAI_EXTAL>,
295 <&clks IMX6SX_CLK_ESAI_IPG>,
296 <&clks IMX6SX_CLK_SPBA>;
297 clock-names = "core", "mem", "extal",
303 #sound-dai-cells = <0>;
304 compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
305 reg = <0x02028000 0x4000>;
306 interrupts = <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>;
307 clocks = <&clks IMX6SX_CLK_SSI1_IPG>,
308 <&clks IMX6SX_CLK_SSI1>;
309 clock-names = "ipg", "baud";
310 dmas = <&sdma 37 1 0>, <&sdma 38 1 0>;
311 dma-names = "rx", "tx";
312 fsl,fifo-depth = <15>;
317 #sound-dai-cells = <0>;
318 compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
319 reg = <0x0202c000 0x4000>;
320 interrupts = <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>;
321 clocks = <&clks IMX6SX_CLK_SSI2_IPG>,
322 <&clks IMX6SX_CLK_SSI2>;
323 clock-names = "ipg", "baud";
324 dmas = <&sdma 41 1 0>, <&sdma 42 1 0>;
325 dma-names = "rx", "tx";
326 fsl,fifo-depth = <15>;
331 #sound-dai-cells = <0>;
332 compatible = "fsl,imx6sx-ssi", "fsl,imx51-ssi";
333 reg = <0x02030000 0x4000>;
334 interrupts = <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>;
335 clocks = <&clks IMX6SX_CLK_SSI3_IPG>,
336 <&clks IMX6SX_CLK_SSI3>;
337 clock-names = "ipg", "baud";
338 dmas = <&sdma 45 1 0>, <&sdma 46 1 0>;
339 dma-names = "rx", "tx";
340 fsl,fifo-depth = <15>;
344 asrc: asrc@02034000 {
345 reg = <0x02034000 0x4000>;
346 interrupts = <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>;
347 clocks = <&clks IMX6SX_CLK_ASRC_MEM>,
348 <&clks IMX6SX_CLK_ASRC_IPG>,
349 <&clks IMX6SX_CLK_SPDIF>,
350 <&clks IMX6SX_CLK_SPBA>;
351 clock-names = "mem", "ipg", "asrck", "dma";
352 dmas = <&sdma 17 20 1>, <&sdma 18 20 1>,
353 <&sdma 19 20 1>, <&sdma 20 20 1>,
354 <&sdma 21 20 1>, <&sdma 22 20 1>;
355 dma-names = "rxa", "rxb", "rxc",
362 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
363 reg = <0x02080000 0x4000>;
364 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
365 clocks = <&clks IMX6SX_CLK_PWM1>,
366 <&clks IMX6SX_CLK_PWM1>;
367 clock-names = "ipg", "per";
372 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
373 reg = <0x02084000 0x4000>;
374 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
375 clocks = <&clks IMX6SX_CLK_PWM2>,
376 <&clks IMX6SX_CLK_PWM2>;
377 clock-names = "ipg", "per";
382 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
383 reg = <0x02088000 0x4000>;
384 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
385 clocks = <&clks IMX6SX_CLK_PWM3>,
386 <&clks IMX6SX_CLK_PWM3>;
387 clock-names = "ipg", "per";
392 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
393 reg = <0x0208c000 0x4000>;
394 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
395 clocks = <&clks IMX6SX_CLK_PWM4>,
396 <&clks IMX6SX_CLK_PWM4>;
397 clock-names = "ipg", "per";
401 flexcan1: can@02090000 {
402 compatible = "fsl,imx6sx-flexcan", "fsl,imx6q-flexcan";
403 reg = <0x02090000 0x4000>;
404 interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
405 clocks = <&clks IMX6SX_CLK_CAN1_IPG>,
406 <&clks IMX6SX_CLK_CAN1_SERIAL>;
407 clock-names = "ipg", "per";
411 flexcan2: can@02094000 {
412 compatible = "fsl,imx6sx-flexcan", "fsl,imx6q-flexcan";
413 reg = <0x02094000 0x4000>;
414 interrupts = <GIC_SPI 111 IRQ_TYPE_LEVEL_HIGH>;
415 clocks = <&clks IMX6SX_CLK_CAN2_IPG>,
416 <&clks IMX6SX_CLK_CAN2_SERIAL>;
417 clock-names = "ipg", "per";
422 compatible = "fsl,imx6sx-gpt", "fsl,imx31-gpt";
423 reg = <0x02098000 0x4000>;
424 interrupts = <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>;
425 clocks = <&clks IMX6SX_CLK_GPT_BUS>,
426 <&clks IMX6SX_CLK_GPT_3M>;
427 clock-names = "ipg", "per";
430 gpio1: gpio@0209c000 {
431 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
432 reg = <0x0209c000 0x4000>;
433 interrupts = <GIC_SPI 66 IRQ_TYPE_LEVEL_HIGH>,
434 <GIC_SPI 67 IRQ_TYPE_LEVEL_HIGH>;
437 interrupt-controller;
438 #interrupt-cells = <2>;
441 gpio2: gpio@020a0000 {
442 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
443 reg = <0x020a0000 0x4000>;
444 interrupts = <GIC_SPI 68 IRQ_TYPE_LEVEL_HIGH>,
445 <GIC_SPI 69 IRQ_TYPE_LEVEL_HIGH>;
448 interrupt-controller;
449 #interrupt-cells = <2>;
452 gpio3: gpio@020a4000 {
453 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
454 reg = <0x020a4000 0x4000>;
455 interrupts = <GIC_SPI 70 IRQ_TYPE_LEVEL_HIGH>,
456 <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
459 interrupt-controller;
460 #interrupt-cells = <2>;
463 gpio4: gpio@020a8000 {
464 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
465 reg = <0x020a8000 0x4000>;
466 interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
467 <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>;
470 interrupt-controller;
471 #interrupt-cells = <2>;
474 gpio5: gpio@020ac000 {
475 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
476 reg = <0x020ac000 0x4000>;
477 interrupts = <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
478 <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
481 interrupt-controller;
482 #interrupt-cells = <2>;
485 gpio6: gpio@020b0000 {
486 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
487 reg = <0x020b0000 0x4000>;
488 interrupts = <GIC_SPI 76 IRQ_TYPE_LEVEL_HIGH>,
489 <GIC_SPI 77 IRQ_TYPE_LEVEL_HIGH>;
492 interrupt-controller;
493 #interrupt-cells = <2>;
496 gpio7: gpio@020b4000 {
497 compatible = "fsl,imx6sx-gpio", "fsl,imx35-gpio";
498 reg = <0x020b4000 0x4000>;
499 interrupts = <GIC_SPI 78 IRQ_TYPE_LEVEL_HIGH>,
500 <GIC_SPI 79 IRQ_TYPE_LEVEL_HIGH>;
503 interrupt-controller;
504 #interrupt-cells = <2>;
508 compatible = "fsl,imx6sx-kpp", "fsl,imx21-kpp";
509 reg = <0x020b8000 0x4000>;
510 interrupts = <GIC_SPI 82 IRQ_TYPE_LEVEL_HIGH>;
511 clocks = <&clks IMX6SX_CLK_DUMMY>;
515 wdog1: wdog@020bc000 {
516 compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
517 reg = <0x020bc000 0x4000>;
518 interrupts = <GIC_SPI 80 IRQ_TYPE_LEVEL_HIGH>;
519 clocks = <&clks IMX6SX_CLK_DUMMY>;
522 wdog2: wdog@020c0000 {
523 compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
524 reg = <0x020c0000 0x4000>;
525 interrupts = <GIC_SPI 81 IRQ_TYPE_LEVEL_HIGH>;
526 clocks = <&clks IMX6SX_CLK_DUMMY>;
531 compatible = "fsl,imx6sx-ccm";
532 reg = <0x020c4000 0x4000>;
533 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>,
534 <GIC_SPI 88 IRQ_TYPE_LEVEL_HIGH>;
536 clocks = <&ckil>, <&osc>, <&ipp_di0>, <&ipp_di1>;
537 clock-names = "ckil", "osc", "ipp_di0", "ipp_di1";
540 anatop: anatop@020c8000 {
541 compatible = "fsl,imx6sx-anatop", "fsl,imx6q-anatop",
542 "syscon", "simple-bus";
543 reg = <0x020c8000 0x1000>;
544 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
545 <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
546 <GIC_SPI 127 IRQ_TYPE_LEVEL_HIGH>;
549 compatible = "fsl,anatop-regulator";
550 regulator-name = "vdd1p1";
551 regulator-min-microvolt = <800000>;
552 regulator-max-microvolt = <1375000>;
554 anatop-reg-offset = <0x110>;
555 anatop-vol-bit-shift = <8>;
556 anatop-vol-bit-width = <5>;
557 anatop-min-bit-val = <4>;
558 anatop-min-voltage = <800000>;
559 anatop-max-voltage = <1375000>;
563 compatible = "fsl,anatop-regulator";
564 regulator-name = "vdd3p0";
565 regulator-min-microvolt = <2800000>;
566 regulator-max-microvolt = <3150000>;
568 anatop-reg-offset = <0x120>;
569 anatop-vol-bit-shift = <8>;
570 anatop-vol-bit-width = <5>;
571 anatop-min-bit-val = <0>;
572 anatop-min-voltage = <2625000>;
573 anatop-max-voltage = <3400000>;
577 compatible = "fsl,anatop-regulator";
578 regulator-name = "vdd2p5";
579 regulator-min-microvolt = <2100000>;
580 regulator-max-microvolt = <2875000>;
582 anatop-reg-offset = <0x130>;
583 anatop-vol-bit-shift = <8>;
584 anatop-vol-bit-width = <5>;
585 anatop-min-bit-val = <0>;
586 anatop-min-voltage = <2100000>;
587 anatop-max-voltage = <2875000>;
590 reg_arm: regulator-vddcore@140 {
591 compatible = "fsl,anatop-regulator";
592 regulator-name = "vddarm";
593 regulator-min-microvolt = <725000>;
594 regulator-max-microvolt = <1450000>;
596 anatop-reg-offset = <0x140>;
597 anatop-vol-bit-shift = <0>;
598 anatop-vol-bit-width = <5>;
599 anatop-delay-reg-offset = <0x170>;
600 anatop-delay-bit-shift = <24>;
601 anatop-delay-bit-width = <2>;
602 anatop-min-bit-val = <1>;
603 anatop-min-voltage = <725000>;
604 anatop-max-voltage = <1450000>;
607 reg_pcie: regulator-vddpcie@140 {
608 compatible = "fsl,anatop-regulator";
609 regulator-name = "vddpcie";
610 regulator-min-microvolt = <725000>;
611 regulator-max-microvolt = <1450000>;
612 anatop-reg-offset = <0x140>;
613 anatop-vol-bit-shift = <9>;
614 anatop-vol-bit-width = <5>;
615 anatop-delay-reg-offset = <0x170>;
616 anatop-delay-bit-shift = <26>;
617 anatop-delay-bit-width = <2>;
618 anatop-min-bit-val = <1>;
619 anatop-min-voltage = <725000>;
620 anatop-max-voltage = <1450000>;
623 reg_soc: regulator-vddsoc@140 {
624 compatible = "fsl,anatop-regulator";
625 regulator-name = "vddsoc";
626 regulator-min-microvolt = <725000>;
627 regulator-max-microvolt = <1450000>;
629 anatop-reg-offset = <0x140>;
630 anatop-vol-bit-shift = <18>;
631 anatop-vol-bit-width = <5>;
632 anatop-delay-reg-offset = <0x170>;
633 anatop-delay-bit-shift = <28>;
634 anatop-delay-bit-width = <2>;
635 anatop-min-bit-val = <1>;
636 anatop-min-voltage = <725000>;
637 anatop-max-voltage = <1450000>;
642 compatible = "fsl,imx6sx-tempmon", "fsl,imx6q-tempmon";
643 interrupts = <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>;
644 fsl,tempmon = <&anatop>;
645 fsl,tempmon-data = <&ocotp>;
646 clocks = <&clks IMX6SX_CLK_PLL3_USB_OTG>;
649 usbphy1: usbphy@020c9000 {
650 compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
651 reg = <0x020c9000 0x1000>;
652 interrupts = <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>;
653 clocks = <&clks IMX6SX_CLK_USBPHY1>;
654 fsl,anatop = <&anatop>;
657 usbphy2: usbphy@020ca000 {
658 compatible = "fsl,imx6sx-usbphy", "fsl,imx23-usbphy";
659 reg = <0x020ca000 0x1000>;
660 interrupts = <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>;
661 clocks = <&clks IMX6SX_CLK_USBPHY2>;
662 fsl,anatop = <&anatop>;
665 snvs: snvs@020cc000 {
666 compatible = "fsl,sec-v4.0-mon", "syscon", "simple-mfd";
667 reg = <0x020cc000 0x4000>;
669 snvs_rtc: snvs-rtc-lp {
670 compatible = "fsl,sec-v4.0-mon-rtc-lp";
673 interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>, <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
676 snvs_poweroff: snvs-poweroff {
677 compatible = "syscon-poweroff";
684 snvs_pwrkey: snvs-powerkey {
685 compatible = "fsl,sec-v4.0-pwrkey";
687 interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
688 linux,keycode = <KEY_POWER>;
693 epit1: epit@020d0000 {
694 reg = <0x020d0000 0x4000>;
695 interrupts = <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>;
698 epit2: epit@020d4000 {
699 reg = <0x020d4000 0x4000>;
700 interrupts = <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>;
704 compatible = "fsl,imx6sx-src", "fsl,imx51-src";
705 reg = <0x020d8000 0x4000>;
706 interrupts = <GIC_SPI 91 IRQ_TYPE_LEVEL_HIGH>,
707 <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>;
712 compatible = "fsl,imx6sx-gpc", "fsl,imx6q-gpc";
713 reg = <0x020dc000 0x4000>;
714 interrupt-controller;
715 #interrupt-cells = <3>;
716 interrupts = <GIC_SPI 89 IRQ_TYPE_LEVEL_HIGH>;
717 interrupt-parent = <&intc>;
720 iomuxc: iomuxc@020e0000 {
721 compatible = "fsl,imx6sx-iomuxc";
722 reg = <0x020e0000 0x4000>;
725 gpr: iomuxc-gpr@020e4000 {
726 compatible = "fsl,imx6sx-iomuxc-gpr",
727 "fsl,imx6q-iomuxc-gpr", "syscon";
728 reg = <0x020e4000 0x4000>;
731 sdma: sdma@020ec000 {
732 compatible = "fsl,imx6sx-sdma", "fsl,imx6q-sdma";
733 reg = <0x020ec000 0x4000>;
734 interrupts = <GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH>;
735 clocks = <&clks IMX6SX_CLK_SDMA>,
736 <&clks IMX6SX_CLK_SDMA>;
737 clock-names = "ipg", "ahb";
739 /* imx6sx reuses imx6q sdma firmware */
740 fsl,sdma-ram-script-name = "imx/sdma/sdma-imx6q.bin";
744 aips2: aips-bus@02100000 {
745 compatible = "fsl,aips-bus", "simple-bus";
746 #address-cells = <1>;
748 reg = <0x02100000 0x100000>;
751 usbotg1: usb@02184000 {
752 compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
753 reg = <0x02184000 0x200>;
754 interrupts = <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>;
755 clocks = <&clks IMX6SX_CLK_USBOH3>;
756 fsl,usbphy = <&usbphy1>;
757 fsl,usbmisc = <&usbmisc 0>;
758 fsl,anatop = <&anatop>;
762 usbotg2: usb@02184200 {
763 compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
764 reg = <0x02184200 0x200>;
765 interrupts = <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>;
766 clocks = <&clks IMX6SX_CLK_USBOH3>;
767 fsl,usbphy = <&usbphy2>;
768 fsl,usbmisc = <&usbmisc 1>;
773 compatible = "fsl,imx6sx-usb", "fsl,imx27-usb";
774 reg = <0x02184400 0x200>;
775 interrupts = <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>;
776 clocks = <&clks IMX6SX_CLK_USBOH3>;
777 fsl,usbmisc = <&usbmisc 2>;
779 fsl,anatop = <&anatop>;
784 usbmisc: usbmisc@02184800 {
786 compatible = "fsl,imx6sx-usbmisc", "fsl,imx6q-usbmisc";
787 reg = <0x02184800 0x200>;
788 clocks = <&clks IMX6SX_CLK_USBOH3>;
791 fec1: ethernet@02188000 {
792 compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
793 reg = <0x02188000 0x4000>;
794 interrupts = <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>,
795 <GIC_SPI 119 IRQ_TYPE_LEVEL_HIGH>;
796 clocks = <&clks IMX6SX_CLK_ENET>,
797 <&clks IMX6SX_CLK_ENET_AHB>,
798 <&clks IMX6SX_CLK_ENET_PTP>,
799 <&clks IMX6SX_CLK_ENET_REF>,
800 <&clks IMX6SX_CLK_ENET_PTP>;
801 clock-names = "ipg", "ahb", "ptp",
802 "enet_clk_ref", "enet_out";
803 fsl,num-tx-queues=<3>;
804 fsl,num-rx-queues=<3>;
809 reg = <0x0218c000 0x4000>;
810 interrupts = <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
811 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
812 <GIC_SPI 126 IRQ_TYPE_LEVEL_HIGH>;
813 clocks = <&clks IMX6SX_CLK_MLB>;
817 usdhc1: usdhc@02190000 {
818 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
819 reg = <0x02190000 0x4000>;
820 interrupts = <GIC_SPI 22 IRQ_TYPE_LEVEL_HIGH>;
821 clocks = <&clks IMX6SX_CLK_USDHC1>,
822 <&clks IMX6SX_CLK_USDHC1>,
823 <&clks IMX6SX_CLK_USDHC1>;
824 clock-names = "ipg", "ahb", "per";
829 usdhc2: usdhc@02194000 {
830 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
831 reg = <0x02194000 0x4000>;
832 interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
833 clocks = <&clks IMX6SX_CLK_USDHC2>,
834 <&clks IMX6SX_CLK_USDHC2>,
835 <&clks IMX6SX_CLK_USDHC2>;
836 clock-names = "ipg", "ahb", "per";
841 usdhc3: usdhc@02198000 {
842 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
843 reg = <0x02198000 0x4000>;
844 interrupts = <GIC_SPI 24 IRQ_TYPE_LEVEL_HIGH>;
845 clocks = <&clks IMX6SX_CLK_USDHC3>,
846 <&clks IMX6SX_CLK_USDHC3>,
847 <&clks IMX6SX_CLK_USDHC3>;
848 clock-names = "ipg", "ahb", "per";
853 usdhc4: usdhc@0219c000 {
854 compatible = "fsl,imx6sx-usdhc", "fsl,imx6sl-usdhc";
855 reg = <0x0219c000 0x4000>;
856 interrupts = <GIC_SPI 25 IRQ_TYPE_LEVEL_HIGH>;
857 clocks = <&clks IMX6SX_CLK_USDHC4>,
858 <&clks IMX6SX_CLK_USDHC4>,
859 <&clks IMX6SX_CLK_USDHC4>;
860 clock-names = "ipg", "ahb", "per";
866 #address-cells = <1>;
868 compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
869 reg = <0x021a0000 0x4000>;
870 interrupts = <GIC_SPI 36 IRQ_TYPE_LEVEL_HIGH>;
871 clocks = <&clks IMX6SX_CLK_I2C1>;
876 #address-cells = <1>;
878 compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
879 reg = <0x021a4000 0x4000>;
880 interrupts = <GIC_SPI 37 IRQ_TYPE_LEVEL_HIGH>;
881 clocks = <&clks IMX6SX_CLK_I2C2>;
886 #address-cells = <1>;
888 compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
889 reg = <0x021a8000 0x4000>;
890 interrupts = <GIC_SPI 38 IRQ_TYPE_LEVEL_HIGH>;
891 clocks = <&clks IMX6SX_CLK_I2C3>;
895 mmdc: mmdc@021b0000 {
896 compatible = "fsl,imx6sx-mmdc", "fsl,imx6q-mmdc";
897 reg = <0x021b0000 0x4000>;
900 fec2: ethernet@021b4000 {
901 compatible = "fsl,imx6sx-fec", "fsl,imx6q-fec";
902 reg = <0x021b4000 0x4000>;
903 interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,
904 <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;
905 clocks = <&clks IMX6SX_CLK_ENET>,
906 <&clks IMX6SX_CLK_ENET_AHB>,
907 <&clks IMX6SX_CLK_ENET_PTP>,
908 <&clks IMX6SX_CLK_ENET2_REF_125M>,
909 <&clks IMX6SX_CLK_ENET_PTP>;
910 clock-names = "ipg", "ahb", "ptp",
911 "enet_clk_ref", "enet_out";
915 weim: weim@021b8000 {
916 compatible = "fsl,imx6sx-weim", "fsl,imx6q-weim";
917 reg = <0x021b8000 0x4000>;
918 interrupts = <GIC_SPI 14 IRQ_TYPE_LEVEL_HIGH>;
919 clocks = <&clks IMX6SX_CLK_EIM_SLOW>;
922 ocotp: ocotp@021bc000 {
923 compatible = "fsl,imx6sx-ocotp", "syscon";
924 reg = <0x021bc000 0x4000>;
925 clocks = <&clks IMX6SX_CLK_OCOTP>;
929 compatible = "fsl,imx6sx-sai";
930 reg = <0x021d4000 0x4000>;
931 interrupts = <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>;
932 clocks = <&clks IMX6SX_CLK_SAI1_IPG>,
933 <&clks IMX6SX_CLK_SAI1>,
934 <&clks 0>, <&clks 0>;
935 clock-names = "bus", "mclk1", "mclk2", "mclk3";
936 dma-names = "rx", "tx";
937 dmas = <&sdma 31 23 0>, <&sdma 32 23 0>;
938 dma-source = <&gpr 0 15 0 16>;
942 audmux: audmux@021d8000 {
943 compatible = "fsl,imx6sx-audmux", "fsl,imx31-audmux";
944 reg = <0x021d8000 0x4000>;
949 compatible = "fsl,imx6sx-sai";
950 reg = <0x021dc000 0x4000>;
951 interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
952 clocks = <&clks IMX6SX_CLK_SAI2_IPG>,
953 <&clks IMX6SX_CLK_SAI2>,
954 <&clks 0>, <&clks 0>;
955 clock-names = "bus", "mclk1", "mclk2", "mclk3";
956 dma-names = "rx", "tx";
957 dmas = <&sdma 33 23 0>, <&sdma 34 23 0>;
958 dma-source = <&gpr 0 17 0 18>;
962 qspi1: qspi@021e0000 {
963 #address-cells = <1>;
965 compatible = "fsl,imx6sx-qspi";
966 reg = <0x021e0000 0x4000>, <0x60000000 0x10000000>;
967 reg-names = "QuadSPI", "QuadSPI-memory";
968 interrupts = <GIC_SPI 107 IRQ_TYPE_LEVEL_HIGH>;
969 clocks = <&clks IMX6SX_CLK_QSPI1>,
970 <&clks IMX6SX_CLK_QSPI1>;
971 clock-names = "qspi_en", "qspi";
975 qspi2: qspi@021e4000 {
976 #address-cells = <1>;
978 compatible = "fsl,imx6sx-qspi";
979 reg = <0x021e4000 0x4000>, <0x70000000 0x10000000>;
980 reg-names = "QuadSPI", "QuadSPI-memory";
981 interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
982 clocks = <&clks IMX6SX_CLK_QSPI2>,
983 <&clks IMX6SX_CLK_QSPI2>;
984 clock-names = "qspi_en", "qspi";
988 uart2: serial@021e8000 {
989 compatible = "fsl,imx6sx-uart", "fsl,imx21-uart";
990 reg = <0x021e8000 0x4000>;
991 interrupts = <GIC_SPI 27 IRQ_TYPE_LEVEL_HIGH>;
992 clocks = <&clks IMX6SX_CLK_UART_IPG>,
993 <&clks IMX6SX_CLK_UART_SERIAL>;
994 clock-names = "ipg", "per";
995 dmas = <&sdma 27 4 0>, <&sdma 28 4 0>;
996 dma-names = "rx", "tx";
1000 uart3: serial@021ec000 {
1001 compatible = "fsl,imx6sx-uart", "fsl,imx21-uart";
1002 reg = <0x021ec000 0x4000>;
1003 interrupts = <GIC_SPI 28 IRQ_TYPE_LEVEL_HIGH>;
1004 clocks = <&clks IMX6SX_CLK_UART_IPG>,
1005 <&clks IMX6SX_CLK_UART_SERIAL>;
1006 clock-names = "ipg", "per";
1007 dmas = <&sdma 29 4 0>, <&sdma 30 4 0>;
1008 dma-names = "rx", "tx";
1009 status = "disabled";
1012 uart4: serial@021f0000 {
1013 compatible = "fsl,imx6sx-uart", "fsl,imx21-uart";
1014 reg = <0x021f0000 0x4000>;
1015 interrupts = <GIC_SPI 29 IRQ_TYPE_LEVEL_HIGH>;
1016 clocks = <&clks IMX6SX_CLK_UART_IPG>,
1017 <&clks IMX6SX_CLK_UART_SERIAL>;
1018 clock-names = "ipg", "per";
1019 dmas = <&sdma 31 4 0>, <&sdma 32 4 0>;
1020 dma-names = "rx", "tx";
1021 status = "disabled";
1024 uart5: serial@021f4000 {
1025 compatible = "fsl,imx6sx-uart", "fsl,imx21-uart";
1026 reg = <0x021f4000 0x4000>;
1027 interrupts = <GIC_SPI 30 IRQ_TYPE_LEVEL_HIGH>;
1028 clocks = <&clks IMX6SX_CLK_UART_IPG>,
1029 <&clks IMX6SX_CLK_UART_SERIAL>;
1030 clock-names = "ipg", "per";
1031 dmas = <&sdma 33 4 0>, <&sdma 34 4 0>;
1032 dma-names = "rx", "tx";
1033 status = "disabled";
1036 i2c4: i2c@021f8000 {
1037 #address-cells = <1>;
1039 compatible = "fsl,imx6sx-i2c", "fsl,imx21-i2c";
1040 reg = <0x021f8000 0x4000>;
1041 interrupts = <GIC_SPI 35 IRQ_TYPE_LEVEL_HIGH>;
1042 clocks = <&clks IMX6SX_CLK_I2C4>;
1043 status = "disabled";
1047 aips3: aips-bus@02200000 {
1048 compatible = "fsl,aips-bus", "simple-bus";
1049 #address-cells = <1>;
1051 reg = <0x02200000 0x100000>;
1055 compatible = "fsl,spba-bus", "simple-bus";
1056 #address-cells = <1>;
1058 reg = <0x02240000 0x40000>;
1061 csi1: csi@02214000 {
1062 reg = <0x02214000 0x4000>;
1063 interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
1064 clocks = <&clks IMX6SX_CLK_DISPLAY_AXI>,
1065 <&clks IMX6SX_CLK_CSI>,
1066 <&clks IMX6SX_CLK_DCIC1>;
1067 clock-names = "disp-axi", "csi_mclk", "dcic";
1068 status = "disabled";
1072 reg = <0x02218000 0x4000>;
1073 interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
1074 clocks = <&clks IMX6SX_CLK_PXP_AXI>,
1075 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1076 clock-names = "pxp-axi", "disp-axi";
1077 status = "disabled";
1080 csi2: csi@0221c000 {
1081 reg = <0x0221c000 0x4000>;
1082 interrupts = <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>;
1083 clocks = <&clks IMX6SX_CLK_DISPLAY_AXI>,
1084 <&clks IMX6SX_CLK_CSI>,
1085 <&clks IMX6SX_CLK_DCIC2>;
1086 clock-names = "disp-axi", "csi_mclk", "dcic";
1087 status = "disabled";
1090 lcdif1: lcdif@02220000 {
1091 compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
1092 reg = <0x02220000 0x4000>;
1093 interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
1094 clocks = <&clks IMX6SX_CLK_LCDIF1_PIX>,
1095 <&clks IMX6SX_CLK_LCDIF_APB>,
1096 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1097 clock-names = "pix", "axi", "disp_axi";
1098 status = "disabled";
1101 lcdif2: lcdif@02224000 {
1102 compatible = "fsl,imx6sx-lcdif", "fsl,imx28-lcdif";
1103 reg = <0x02224000 0x4000>;
1104 interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
1105 clocks = <&clks IMX6SX_CLK_LCDIF2_PIX>,
1106 <&clks IMX6SX_CLK_LCDIF_APB>,
1107 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1108 clock-names = "pix", "axi", "disp_axi";
1109 status = "disabled";
1112 vadc: vadc@02228000 {
1113 reg = <0x02228000 0x4000>, <0x0222c000 0x4000>;
1114 reg-names = "vadc-vafe", "vadc-vdec";
1115 clocks = <&clks IMX6SX_CLK_VADC>,
1116 <&clks IMX6SX_CLK_CSI>;
1117 clock-names = "vadc", "csi";
1118 status = "disabled";
1122 adc1: adc@02280000 {
1123 compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
1124 reg = <0x02280000 0x4000>;
1125 interrupts = <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>;
1126 clocks = <&clks IMX6SX_CLK_IPG>;
1127 clock-names = "adc";
1128 status = "disabled";
1131 adc2: adc@02284000 {
1132 compatible = "fsl,imx6sx-adc", "fsl,vf610-adc";
1133 reg = <0x02284000 0x4000>;
1134 interrupts = <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>;
1135 clocks = <&clks IMX6SX_CLK_IPG>;
1136 clock-names = "adc";
1137 status = "disabled";
1140 wdog3: wdog@02288000 {
1141 compatible = "fsl,imx6sx-wdt", "fsl,imx21-wdt";
1142 reg = <0x02288000 0x4000>;
1143 interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
1144 clocks = <&clks IMX6SX_CLK_DUMMY>;
1145 status = "disabled";
1148 ecspi5: ecspi@0228c000 {
1149 #address-cells = <1>;
1151 compatible = "fsl,imx6sx-ecspi", "fsl,imx51-ecspi";
1152 reg = <0x0228c000 0x4000>;
1153 interrupts = <GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH>;
1154 clocks = <&clks IMX6SX_CLK_ECSPI5>,
1155 <&clks IMX6SX_CLK_ECSPI5>;
1156 clock-names = "ipg", "per";
1157 status = "disabled";
1160 uart6: serial@022a0000 {
1161 compatible = "fsl,imx6sx-uart", "fsl,imx21-uart";
1162 reg = <0x022a0000 0x4000>;
1163 interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
1164 clocks = <&clks IMX6SX_CLK_UART_IPG>,
1165 <&clks IMX6SX_CLK_UART_SERIAL>;
1166 clock-names = "ipg", "per";
1167 dmas = <&sdma 0 4 0>, <&sdma 47 4 0>;
1168 dma-names = "rx", "tx";
1169 status = "disabled";
1172 pwm5: pwm@022a4000 {
1173 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
1174 reg = <0x022a4000 0x4000>;
1175 interrupts = <GIC_SPI 83 IRQ_TYPE_LEVEL_HIGH>;
1176 clocks = <&clks IMX6SX_CLK_PWM5>,
1177 <&clks IMX6SX_CLK_PWM5>;
1178 clock-names = "ipg", "per";
1182 pwm6: pwm@022a8000 {
1183 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
1184 reg = <0x022a8000 0x4000>;
1185 interrupts = <GIC_SPI 84 IRQ_TYPE_LEVEL_HIGH>;
1186 clocks = <&clks IMX6SX_CLK_PWM6>,
1187 <&clks IMX6SX_CLK_PWM6>;
1188 clock-names = "ipg", "per";
1192 pwm7: pwm@022ac000 {
1193 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
1194 reg = <0x022ac000 0x4000>;
1195 interrupts = <GIC_SPI 85 IRQ_TYPE_LEVEL_HIGH>;
1196 clocks = <&clks IMX6SX_CLK_PWM7>,
1197 <&clks IMX6SX_CLK_PWM7>;
1198 clock-names = "ipg", "per";
1202 pwm8: pwm@0022b0000 {
1203 compatible = "fsl,imx6sx-pwm", "fsl,imx27-pwm";
1204 reg = <0x0022b0000 0x4000>;
1205 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
1206 clocks = <&clks IMX6SX_CLK_PWM8>,
1207 <&clks IMX6SX_CLK_PWM8>;
1208 clock-names = "ipg", "per";
1213 pcie: pcie@0x08000000 {
1214 compatible = "fsl,imx6sx-pcie", "snps,dw-pcie";
1215 reg = <0x08ffc000 0x4000>; /* DBI */
1216 #address-cells = <3>;
1218 device_type = "pci";
1219 /* configuration space */
1220 ranges = <0x00000800 0 0x08f00000 0x08f00000 0 0x00080000
1221 /* downstream I/O */
1222 0x81000000 0 0 0x08f80000 0 0x00010000
1223 /* non-prefetchable memory */
1224 0x82000000 0 0x08000000 0x08000000 0 0x00f00000>;
1226 interrupts = <GIC_SPI 123 IRQ_TYPE_LEVEL_HIGH>;
1227 clocks = <&clks IMX6SX_CLK_PCIE_REF_125M>,
1228 <&clks IMX6SX_CLK_PCIE_AXI>,
1229 <&clks IMX6SX_CLK_LVDS1_OUT>,
1230 <&clks IMX6SX_CLK_DISPLAY_AXI>;
1231 clock-names = "pcie_ref_125m", "pcie_axi",
1232 "lvds_gate", "display_axi";
1233 status = "disabled";