2 * Copyright (C) 2012 STMicroelectronics Limited.
3 * Author: Srinivas Kandagatla <srinivas.kandagatla@st.com>
5 * This program is free software; you can redistribute it and/or modify
6 * it under the terms of the GNU General Public License version 2 as
7 * publishhed by the Free Software Foundation.
9 #include "stih41x.dtsi"
10 #include "stih416-clock.dtsi"
11 #include "stih416-pinctrl.dtsi"
13 #include <dt-bindings/phy/phy.h>
14 #include <dt-bindings/interrupt-controller/arm-gic.h>
15 #include <dt-bindings/reset-controller/stih416-resets.h>
17 L2: cache-controller {
18 compatible = "arm,pl310-cache";
19 reg = <0xfffe2000 0x1000>;
20 arm,data-latency = <3 3 3>;
21 arm,tag-latency = <2 2 2>;
27 compatible = "arm,cortex-a9-pmu";
28 interrupt-parent = <&intc>;
29 interrupts = <GIC_PPI 15 IRQ_TYPE_LEVEL_HIGH>;
35 interrupt-parent = <&intc>;
37 compatible = "simple-bus";
40 compatible = "st,stih416-restart";
41 st,syscfg = <&syscfg_sbc>;
45 powerdown: powerdown-controller {
47 compatible = "st,stih416-powerdown";
50 softreset: softreset-controller {
52 compatible = "st,stih416-softreset";
55 syscfg_sbc:sbc-syscfg@fe600000{
56 compatible = "st,stih416-sbc-syscfg", "syscon";
57 reg = <0xfe600000 0x1000>;
60 syscfg_front:front-syscfg@fee10000{
61 compatible = "st,stih416-front-syscfg", "syscon";
62 reg = <0xfee10000 0x1000>;
65 syscfg_rear:rear-syscfg@fe830000{
66 compatible = "st,stih416-rear-syscfg", "syscon";
67 reg = <0xfe830000 0x1000>;
71 syscfg_fvdp_fe:fvdp-fe-syscfg@fddf0000{
72 compatible = "st,stih416-fvdp-fe-syscfg", "syscon";
73 reg = <0xfddf0000 0x1000>;
76 syscfg_fvdp_lite:fvdp-lite-syscfg@fd6a0000{
77 compatible = "st,stih416-fvdp-lite-syscfg", "syscon";
78 reg = <0xfd6a0000 0x1000>;
81 syscfg_cpu:cpu-syscfg@fdde0000{
82 compatible = "st,stih416-cpu-syscfg", "syscon";
83 reg = <0xfdde0000 0x1000>;
86 syscfg_compo:compo-syscfg@fd320000{
87 compatible = "st,stih416-compo-syscfg", "syscon";
88 reg = <0xfd320000 0x1000>;
91 syscfg_transport:transport-syscfg@fd690000{
92 compatible = "st,stih416-transport-syscfg", "syscon";
93 reg = <0xfd690000 0x1000>;
96 syscfg_lpm:lpm-syscfg@fe4b5100{
97 compatible = "st,stih416-lpm-syscfg", "syscon";
98 reg = <0xfe4b5100 0x8>;
101 serial2: serial@fed32000{
102 compatible = "st,asc";
104 reg = <0xfed32000 0x2c>;
105 interrupts = <0 197 0>;
106 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
107 pinctrl-names = "default";
108 pinctrl-0 = <&pinctrl_serial2 &pinctrl_serial2_oe>;
112 sbc_serial1: serial@fe531000 {
113 compatible = "st,asc";
115 reg = <0xfe531000 0x2c>;
116 interrupts = <0 210 0>;
117 pinctrl-names = "default";
118 pinctrl-0 = <&pinctrl_sbc_serial1>;
119 clocks = <&clk_sysin>;
123 compatible = "st,comms-ssc4-i2c";
124 reg = <0xfed40000 0x110>;
125 interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
126 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
128 clock-frequency = <400000>;
129 pinctrl-names = "default";
130 pinctrl-0 = <&pinctrl_i2c0_default>;
136 compatible = "st,comms-ssc4-i2c";
137 reg = <0xfed41000 0x110>;
138 interrupts = <GIC_SPI 188 IRQ_TYPE_LEVEL_HIGH>;
139 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
141 clock-frequency = <400000>;
142 pinctrl-names = "default";
143 pinctrl-0 = <&pinctrl_i2c1_default>;
149 compatible = "st,comms-ssc4-i2c";
150 reg = <0xfe540000 0x110>;
151 interrupts = <GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH>;
152 clocks = <&clk_sysin>;
154 clock-frequency = <400000>;
155 pinctrl-names = "default";
156 pinctrl-0 = <&pinctrl_sbc_i2c0_default>;
162 compatible = "st,comms-ssc4-i2c";
163 reg = <0xfe541000 0x110>;
164 interrupts = <GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH>;
165 clocks = <&clk_sysin>;
167 clock-frequency = <400000>;
168 pinctrl-names = "default";
169 pinctrl-0 = <&pinctrl_sbc_i2c1_default>;
174 ethernet0: dwmac@fe810000 {
175 device_type = "network";
176 compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
178 reg = <0xfe810000 0x8000>;
179 reg-names = "stmmaceth";
181 interrupts = <0 133 0>, <0 134 0>, <0 135 0>;
182 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
187 st,syscon = <&syscfg_rear 0x8bc>;
188 resets = <&softreset STIH416_ETH0_SOFTRESET>;
189 reset-names = "stmmaceth";
190 pinctrl-names = "default";
191 pinctrl-0 = <&pinctrl_mii0>;
192 clock-names = "stmmaceth", "sti-ethclk";
193 clocks = <&clk_s_a1_ls CLK_ICN_IF_2>, <&clk_s_a1_ls CLK_GMAC0_PHY>;
196 ethernet1: dwmac@fef08000 {
197 device_type = "network";
198 compatible = "st,stih416-dwmac", "snps,dwmac", "snps,dwmac-3.710";
200 reg = <0xfef08000 0x8000>;
201 reg-names = "stmmaceth";
202 interrupts = <0 136 0>, <0 137 0>, <0 138 0>;
203 interrupt-names = "macirq", "eth_wake_irq", "eth_lpi";
208 st,syscon = <&syscfg_sbc 0x7f0>;
210 resets = <&softreset STIH416_ETH1_SOFTRESET>;
211 reset-names = "stmmaceth";
212 pinctrl-names = "default";
213 pinctrl-0 = <&pinctrl_mii1>;
214 clock-names = "stmmaceth", "sti-ethclk";
215 clocks = <&clk_s_a0_ls CLK_ICN_REG>, <&clk_s_a0_ls CLK_ETH1_PHY>;
219 compatible = "st,comms-irb";
220 reg = <0xfe518000 0x234>;
221 interrupts = <0 203 0>;
222 rx-mode = "infrared";
223 clocks = <&clk_sysin>;
224 pinctrl-names = "default";
225 pinctrl-0 = <&pinctrl_ir>;
226 resets = <&softreset STIH416_IRB_SOFTRESET>;
230 spifsm: spifsm@fe902000 {
231 compatible = "st,spi-fsm";
232 reg = <0xfe902000 0x1000>;
233 pinctrl-0 = <&pinctrl_fsm>;
235 st,syscfg = <&syscfg_rear>;
236 st,boot-device-reg = <0x958>;
237 st,boot-device-spi = <0x1a>;
242 keyscan: keyscan@fe4b0000 {
243 compatible = "st,sti-keyscan";
245 reg = <0xfe4b0000 0x2000>;
246 interrupts = <GIC_SPI 212 IRQ_TYPE_NONE>;
247 clocks = <&clk_sysin>;
248 pinctrl-names = "default";
249 pinctrl-0 = <&pinctrl_keyscan>;
250 resets = <&powerdown STIH416_KEYSCAN_POWERDOWN>,
251 <&softreset STIH416_KEYSCAN_SOFTRESET>;
255 compatible = "st,stih416-sas-thermal";
256 clock-names = "thermal";
257 clocks = <&clockgen_c_vcc 14>;
263 compatible = "st,stih416-mpe-thermal";
264 reg = <0xfdfe8000 0x10>;
265 clocks = <&clockgen_e 3>;
266 clock-names = "thermal";
267 interrupts = <GIC_SPI 23 IRQ_TYPE_EDGE_RISING>;
272 mmc0: sdhci@fe81e000 {
273 compatible = "st,sdhci";
275 reg = <0xfe81e000 0x1000>;
276 interrupts = <GIC_SPI 127 IRQ_TYPE_NONE>;
277 interrupt-names = "mmcirq";
278 pinctrl-names = "default";
279 pinctrl-0 = <&pinctrl_mmc0>;
281 clocks = <&clk_s_a1_ls 1>;
284 mmc1: sdhci@fe81f000 {
285 compatible = "st,sdhci";
287 reg = <0xfe81f000 0x1000>;
288 interrupts = <GIC_SPI 128 IRQ_TYPE_NONE>;
289 interrupt-names = "mmcirq";
290 pinctrl-names = "default";
291 pinctrl-0 = <&pinctrl_mmc1>;
293 clocks = <&clk_s_a1_ls 8>;
296 miphy365x_phy: phy@fe382000 {
297 compatible = "st,miphy365x-phy";
298 st,syscfg = <&syscfg_rear 0x824 0x828>;
299 #address-cells = <1>;
303 phy_port0: port@fe382000 {
305 reg = <0xfe382000 0x100>, <0xfe394000 0x100>;
306 reg-names = "sata", "pcie";
309 phy_port1: port@fe38a000 {
311 reg = <0xfe38a000 0x100>, <0xfe804000 0x100>;
312 reg-names = "sata", "pcie";
316 sata0: sata@fe380000 {
317 compatible = "st,sti-ahci";
318 reg = <0xfe380000 0x1000>;
319 interrupts = <GIC_SPI 157 IRQ_TYPE_NONE>;
320 interrupt-names = "hostc";
321 phys = <&phy_port0 PHY_TYPE_SATA>;
322 phy-names = "sata-phy";
323 resets = <&powerdown STIH416_SATA0_POWERDOWN>,
324 <&softreset STIH416_SATA0_SOFTRESET>;
325 reset-names = "pwr-dwn", "sw-rst";
326 clock-names = "ahci_clk";
327 clocks = <&clk_s_a0_ls CLK_ICN_REG>;
333 compatible = "st,stih416-usb-phy";
335 st,syscfg = <&syscfg_rear>;
336 clocks = <&clk_sysin>;
337 clock-names = "osc_phy";
340 ehci0: usb@fe1ffe00 {
341 compatible = "st,st-ehci-300x";
342 reg = <0xfe1ffe00 0x100>;
343 interrupts = <GIC_SPI 148 IRQ_TYPE_NONE>;
344 pinctrl-names = "default";
345 pinctrl-0 = <&pinctrl_usb0>;
346 clocks = <&clk_s_a1_ls 0>,
348 clock-names = "ic", "clk48";
351 resets = <&powerdown STIH416_USB0_POWERDOWN>,
352 <&softreset STIH416_USB0_SOFTRESET>;
353 reset-names = "power", "softreset";
356 ohci0: usb@fe1ffc00 {
357 compatible = "st,st-ohci-300x";
358 reg = <0xfe1ffc00 0x100>;
359 interrupts = <GIC_SPI 149 IRQ_TYPE_NONE>;
360 clocks = <&clk_s_a1_ls 0>,
362 clock-names = "ic", "clk48";
366 resets = <&powerdown STIH416_USB0_POWERDOWN>,
367 <&softreset STIH416_USB0_SOFTRESET>;
368 reset-names = "power", "softreset";
371 ehci1: usb@fe203e00 {
372 compatible = "st,st-ehci-300x";
373 reg = <0xfe203e00 0x100>;
374 interrupts = <GIC_SPI 150 IRQ_TYPE_NONE>;
375 pinctrl-names = "default";
376 pinctrl-0 = <&pinctrl_usb1>;
377 clocks = <&clk_s_a1_ls 0>,
379 clock-names = "ic", "clk48";
382 resets = <&powerdown STIH416_USB1_POWERDOWN>,
383 <&softreset STIH416_USB1_SOFTRESET>;
384 reset-names = "power", "softreset";
387 ohci1: usb@fe203c00 {
388 compatible = "st,st-ohci-300x";
389 reg = <0xfe203c00 0x100>;
390 interrupts = <GIC_SPI 151 IRQ_TYPE_NONE>;
391 clocks = <&clk_s_a1_ls 0>,
393 clock-names = "ic", "clk48";
396 resets = <&powerdown STIH416_USB1_POWERDOWN>,
397 <&softreset STIH416_USB1_SOFTRESET>;
398 reset-names = "power", "softreset";
401 ehci2: usb@fe303e00 {
402 compatible = "st,st-ehci-300x";
403 reg = <0xfe303e00 0x100>;
404 interrupts = <GIC_SPI 152 IRQ_TYPE_NONE>;
405 pinctrl-names = "default";
406 pinctrl-0 = <&pinctrl_usb2>;
407 clocks = <&clk_s_a1_ls 0>,
409 clock-names = "ic", "clk48";
412 resets = <&powerdown STIH416_USB2_POWERDOWN>,
413 <&softreset STIH416_USB2_SOFTRESET>;
414 reset-names = "power", "softreset";
417 ohci2: usb@fe303c00 {
418 compatible = "st,st-ohci-300x";
419 reg = <0xfe303c00 0x100>;
420 interrupts = <GIC_SPI 153 IRQ_TYPE_NONE>;
421 clocks = <&clk_s_a1_ls 0>,
423 clock-names = "ic", "clk48";
426 resets = <&powerdown STIH416_USB2_POWERDOWN>,
427 <&softreset STIH416_USB2_SOFTRESET>;
428 reset-names = "power", "softreset";
431 ehci3: usb@fe343e00 {
432 compatible = "st,st-ehci-300x";
433 reg = <0xfe343e00 0x100>;
434 interrupts = <GIC_SPI 154 IRQ_TYPE_NONE>;
435 pinctrl-names = "default";
436 pinctrl-0 = <&pinctrl_usb3>;
437 clocks = <&clk_s_a1_ls 0>,
439 clock-names = "ic", "clk48";
442 resets = <&powerdown STIH416_USB3_POWERDOWN>,
443 <&softreset STIH416_USB3_SOFTRESET>;
444 reset-names = "power", "softreset";
447 ohci3: usb@fe343c00 {
448 compatible = "st,st-ohci-300x";
449 reg = <0xfe343c00 0x100>;
450 interrupts = <GIC_SPI 155 IRQ_TYPE_NONE>;
451 clocks = <&clk_s_a1_ls 0>,
453 clock-names = "ic", "clk48";
456 resets = <&powerdown STIH416_USB3_POWERDOWN>,
457 <&softreset STIH416_USB3_SOFTRESET>;
458 reset-names = "power", "softreset";
463 compatible = "st,sti-pwm";
466 reg = <0xfed10000 0x68>;
468 pinctrl-names = "default";
469 pinctrl-0 = <&pinctrl_pwm0_chan0_default
470 &pinctrl_pwm0_chan1_default
471 &pinctrl_pwm0_chan2_default
472 &pinctrl_pwm0_chan3_default>;
475 clocks = <&clk_sysin>;
476 st,pwm-num-chan = <4>;
481 compatible = "st,sti-pwm";
484 reg = <0xfe510000 0x68>;
486 pinctrl-names = "default";
487 pinctrl-0 = <&pinctrl_pwm1_chan0_default
489 * Shared with SBC_OBS_NOTRST. Don't
490 * enable unless you really know what
493 * &pinctrl_pwm1_chan1_default
495 &pinctrl_pwm1_chan2_default
496 &pinctrl_pwm1_chan3_default>;
499 clocks = <&clk_sysin>;
500 st,pwm-num-chan = <3>;