2 * Copyright 2012 Freescale Semiconductor, Inc.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
12 /include/ "skeleton.dtsi"
15 interrupt-parent = <&icoll>;
34 compatible = "arm,arm926ejs";
39 compatible = "simple-bus";
42 reg = <0x80000000 0x80000>;
46 compatible = "simple-bus";
49 reg = <0x80000000 0x3c900>;
52 icoll: interrupt-controller@80000000 {
53 compatible = "fsl,imx28-icoll", "fsl,mxs-icoll";
55 #interrupt-cells = <1>;
56 reg = <0x80000000 0x2000>;
60 reg = <0x80002000 0x2000>;
66 compatible = "fsl,imx28-dma-apbh";
67 reg = <0x80004000 0x2000>;
71 reg = <0x80006000 0x800>;
77 compatible = "fsl,imx28-gpmi-nand";
80 reg = <0x8000c000 0x2000>, <0x8000a000 0x2000>;
81 reg-names = "gpmi-nand", "bch";
82 interrupts = <88>, <41>;
83 interrupt-names = "gpmi-dma", "bch";
84 fsl,gpmi-dma-channel = <4>;
89 reg = <0x80010000 0x2000>;
91 fsl,ssp-dma-channel = <0>;
96 reg = <0x80012000 0x2000>;
98 fsl,ssp-dma-channel = <1>;
103 reg = <0x80014000 0x2000>;
104 interrupts = <98 84>;
105 fsl,ssp-dma-channel = <2>;
110 reg = <0x80016000 0x2000>;
111 interrupts = <99 85>;
112 fsl,ssp-dma-channel = <3>;
117 #address-cells = <1>;
119 compatible = "fsl,imx28-pinctrl", "simple-bus";
120 reg = <0x80018000 0x2000>;
123 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
127 interrupt-controller;
128 #interrupt-cells = <2>;
132 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
136 interrupt-controller;
137 #interrupt-cells = <2>;
141 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
145 interrupt-controller;
146 #interrupt-cells = <2>;
150 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
154 interrupt-controller;
155 #interrupt-cells = <2>;
159 compatible = "fsl,imx28-gpio", "fsl,mxs-gpio";
163 interrupt-controller;
164 #interrupt-cells = <2>;
167 duart_pins_a: duart@0 {
170 0x3102 /* MX28_PAD_PWM0__DUART_RX */
171 0x3112 /* MX28_PAD_PWM1__DUART_TX */
173 fsl,drive-strength = <0>;
178 duart_pins_b: duart@1 {
181 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
182 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
184 fsl,drive-strength = <0>;
189 duart_4pins_a: duart-4pins@0 {
192 0x3022 /* MX28_PAD_AUART0_CTS__DUART_RX */
193 0x3032 /* MX28_PAD_AUART0_RTS__DUART_TX */
194 0x3002 /* MX28_PAD_AUART0_RX__DUART_CTS */
195 0x3012 /* MX28_PAD_AUART0_TX__DUART_RTS */
197 fsl,drive-strength = <0>;
202 gpmi_pins_a: gpmi-nand@0 {
205 0x0000 /* MX28_PAD_GPMI_D00__GPMI_D0 */
206 0x0010 /* MX28_PAD_GPMI_D01__GPMI_D1 */
207 0x0020 /* MX28_PAD_GPMI_D02__GPMI_D2 */
208 0x0030 /* MX28_PAD_GPMI_D03__GPMI_D3 */
209 0x0040 /* MX28_PAD_GPMI_D04__GPMI_D4 */
210 0x0050 /* MX28_PAD_GPMI_D05__GPMI_D5 */
211 0x0060 /* MX28_PAD_GPMI_D06__GPMI_D6 */
212 0x0070 /* MX28_PAD_GPMI_D07__GPMI_D7 */
213 0x0100 /* MX28_PAD_GPMI_CE0N__GPMI_CE0N */
214 0x0140 /* MX28_PAD_GPMI_RDY0__GPMI_READY0 */
215 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
216 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
217 0x01a0 /* MX28_PAD_GPMI_ALE__GPMI_ALE */
218 0x01b0 /* MX28_PAD_GPMI_CLE__GPMI_CLE */
219 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
221 fsl,drive-strength = <0>;
226 gpmi_status_cfg: gpmi-status-cfg {
228 0x0180 /* MX28_PAD_GPMI_RDN__GPMI_RDN */
229 0x0190 /* MX28_PAD_GPMI_WRN__GPMI_WRN */
230 0x01c0 /* MX28_PAD_GPMI_RESETN__GPMI_RESETN */
232 fsl,drive-strength = <2>;
235 auart0_pins_a: auart0@0 {
238 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
239 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
240 0x3020 /* MX28_PAD_AUART0_CTS__AUART0_CTS */
241 0x3030 /* MX28_PAD_AUART0_RTS__AUART0_RTS */
243 fsl,drive-strength = <0>;
248 auart0_2pins_a: auart0-2pins@0 {
251 0x3000 /* MX28_PAD_AUART0_RX__AUART0_RX */
252 0x3010 /* MX28_PAD_AUART0_TX__AUART0_TX */
254 fsl,drive-strength = <0>;
259 auart1_pins_a: auart1@0 {
262 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
263 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
264 0x3060 /* MX28_PAD_AUART1_CTS__AUART1_CTS */
265 0x3070 /* MX28_PAD_AUART1_RTS__AUART1_RTS */
267 fsl,drive-strength = <0>;
272 auart1_2pins_a: auart1-2pins@0 {
275 0x3040 /* MX28_PAD_AUART1_RX__AUART1_RX */
276 0x3050 /* MX28_PAD_AUART1_TX__AUART1_TX */
278 fsl,drive-strength = <0>;
283 auart2_2pins_a: auart2-2pins@0 {
286 0x2101 /* MX28_PAD_SSP2_SCK__AUART2_RX */
287 0x2111 /* MX28_PAD_SSP2_MOSI__AUART2_TX */
289 fsl,drive-strength = <0>;
294 auart3_pins_a: auart3@0 {
297 0x30c0 /* MX28_PAD_AUART3_RX__AUART3_RX */
298 0x30d0 /* MX28_PAD_AUART3_TX__AUART3_TX */
299 0x30e0 /* MX28_PAD_AUART3_CTS__AUART3_CTS */
300 0x30f0 /* MX28_PAD_AUART3_RTS__AUART3_RTS */
302 fsl,drive-strength = <0>;
307 auart3_2pins_a: auart3-2pins@0 {
310 0x2121 /* MX28_PAD_SSP2_MISO__AUART3_RX */
311 0x2131 /* MX28_PAD_SSP2_SS0__AUART3_TX */
313 fsl,drive-strength = <0>;
318 mac0_pins_a: mac0@0 {
321 0x4000 /* MX28_PAD_ENET0_MDC__ENET0_MDC */
322 0x4010 /* MX28_PAD_ENET0_MDIO__ENET0_MDIO */
323 0x4020 /* MX28_PAD_ENET0_RX_EN__ENET0_RX_EN */
324 0x4030 /* MX28_PAD_ENET0_RXD0__ENET0_RXD0 */
325 0x4040 /* MX28_PAD_ENET0_RXD1__ENET0_RXD1 */
326 0x4060 /* MX28_PAD_ENET0_TX_EN__ENET0_TX_EN */
327 0x4070 /* MX28_PAD_ENET0_TXD0__ENET0_TXD0 */
328 0x4080 /* MX28_PAD_ENET0_TXD1__ENET0_TXD1 */
329 0x4100 /* MX28_PAD_ENET_CLK__CLKCTRL_ENET */
331 fsl,drive-strength = <1>;
336 mac1_pins_a: mac1@0 {
339 0x40f1 /* MX28_PAD_ENET0_CRS__ENET1_RX_EN */
340 0x4091 /* MX28_PAD_ENET0_RXD2__ENET1_RXD0 */
341 0x40a1 /* MX28_PAD_ENET0_RXD3__ENET1_RXD1 */
342 0x40e1 /* MX28_PAD_ENET0_COL__ENET1_TX_EN */
343 0x40b1 /* MX28_PAD_ENET0_TXD2__ENET1_TXD0 */
344 0x40c1 /* MX28_PAD_ENET0_TXD3__ENET1_TXD1 */
346 fsl,drive-strength = <1>;
351 mmc0_8bit_pins_a: mmc0-8bit@0 {
354 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
355 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
356 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
357 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
358 0x2040 /* MX28_PAD_SSP0_DATA4__SSP0_D4 */
359 0x2050 /* MX28_PAD_SSP0_DATA5__SSP0_D5 */
360 0x2060 /* MX28_PAD_SSP0_DATA6__SSP0_D6 */
361 0x2070 /* MX28_PAD_SSP0_DATA7__SSP0_D7 */
362 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
363 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
364 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
366 fsl,drive-strength = <1>;
371 mmc0_4bit_pins_a: mmc0-4bit@0 {
374 0x2000 /* MX28_PAD_SSP0_DATA0__SSP0_D0 */
375 0x2010 /* MX28_PAD_SSP0_DATA1__SSP0_D1 */
376 0x2020 /* MX28_PAD_SSP0_DATA2__SSP0_D2 */
377 0x2030 /* MX28_PAD_SSP0_DATA3__SSP0_D3 */
378 0x2080 /* MX28_PAD_SSP0_CMD__SSP0_CMD */
379 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
380 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
382 fsl,drive-strength = <1>;
387 mmc0_cd_cfg: mmc0-cd-cfg {
389 0x2090 /* MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT */
394 mmc0_sck_cfg: mmc0-sck-cfg {
396 0x20a0 /* MX28_PAD_SSP0_SCK__SSP0_SCK */
398 fsl,drive-strength = <2>;
402 i2c0_pins_a: i2c0@0 {
405 0x3180 /* MX28_PAD_I2C0_SCL__I2C0_SCL */
406 0x3190 /* MX28_PAD_I2C0_SDA__I2C0_SDA */
408 fsl,drive-strength = <1>;
413 i2c0_pins_b: i2c0@1 {
416 0x3001 /* MX28_PAD_AUART0_RX__I2C0_SCL */
417 0x3011 /* MX28_PAD_AUART0_TX__I2C0_SDA */
419 fsl,drive-strength = <1>;
424 i2c1_pins_a: i2c1@0 {
427 0x3101 /* MX28_PAD_PWM0__I2C1_SCL */
428 0x3111 /* MX28_PAD_PWM1__I2C1_SDA */
430 fsl,drive-strength = <1>;
435 saif0_pins_a: saif0@0 {
438 0x3140 /* MX28_PAD_SAIF0_MCLK__SAIF0_MCLK */
439 0x3150 /* MX28_PAD_SAIF0_LRCLK__SAIF0_LRCLK */
440 0x3160 /* MX28_PAD_SAIF0_BITCLK__SAIF0_BITCLK */
441 0x3170 /* MX28_PAD_SAIF0_SDATA0__SAIF0_SDATA0 */
443 fsl,drive-strength = <2>;
448 saif1_pins_a: saif1@0 {
451 0x31a0 /* MX28_PAD_SAIF1_SDATA0__SAIF1_SDATA0 */
453 fsl,drive-strength = <2>;
458 pwm0_pins_a: pwm0@0 {
461 0x3100 /* MX28_PAD_PWM0__PWM_0 */
463 fsl,drive-strength = <0>;
468 pwm2_pins_a: pwm2@0 {
471 0x3120 /* MX28_PAD_PWM2__PWM_2 */
473 fsl,drive-strength = <0>;
478 pwm4_pins_a: pwm4@0 {
481 0x31d0 /* MX28_PAD_PWM4__PWM_4 */
483 fsl,drive-strength = <0>;
488 lcdif_24bit_pins_a: lcdif-24bit@0 {
491 0x1000 /* MX28_PAD_LCD_D00__LCD_D0 */
492 0x1010 /* MX28_PAD_LCD_D01__LCD_D1 */
493 0x1020 /* MX28_PAD_LCD_D02__LCD_D2 */
494 0x1030 /* MX28_PAD_LCD_D03__LCD_D3 */
495 0x1040 /* MX28_PAD_LCD_D04__LCD_D4 */
496 0x1050 /* MX28_PAD_LCD_D05__LCD_D5 */
497 0x1060 /* MX28_PAD_LCD_D06__LCD_D6 */
498 0x1070 /* MX28_PAD_LCD_D07__LCD_D7 */
499 0x1080 /* MX28_PAD_LCD_D08__LCD_D8 */
500 0x1090 /* MX28_PAD_LCD_D09__LCD_D9 */
501 0x10a0 /* MX28_PAD_LCD_D10__LCD_D10 */
502 0x10b0 /* MX28_PAD_LCD_D11__LCD_D11 */
503 0x10c0 /* MX28_PAD_LCD_D12__LCD_D12 */
504 0x10d0 /* MX28_PAD_LCD_D13__LCD_D13 */
505 0x10e0 /* MX28_PAD_LCD_D14__LCD_D14 */
506 0x10f0 /* MX28_PAD_LCD_D15__LCD_D15 */
507 0x1100 /* MX28_PAD_LCD_D16__LCD_D16 */
508 0x1110 /* MX28_PAD_LCD_D17__LCD_D17 */
509 0x1120 /* MX28_PAD_LCD_D18__LCD_D18 */
510 0x1130 /* MX28_PAD_LCD_D19__LCD_D19 */
511 0x1140 /* MX28_PAD_LCD_D20__LCD_D20 */
512 0x1150 /* MX28_PAD_LCD_D21__LCD_D21 */
513 0x1160 /* MX28_PAD_LCD_D22__LCD_D22 */
514 0x1170 /* MX28_PAD_LCD_D23__LCD_D23 */
516 fsl,drive-strength = <0>;
521 can0_pins_a: can0@0 {
524 0x0161 /* MX28_PAD_GPMI_RDY2__CAN0_TX */
525 0x0171 /* MX28_PAD_GPMI_RDY3__CAN0_RX */
527 fsl,drive-strength = <0>;
532 can1_pins_a: can1@0 {
535 0x0121 /* MX28_PAD_GPMI_CE2N__CAN1_TX */
536 0x0131 /* MX28_PAD_GPMI_CE3N__CAN1_RX */
538 fsl,drive-strength = <0>;
543 spi2_pins_a: spi2@0 {
546 0x2100 /* MX28_PAD_SSP2_SCK__SSP2_SCK */
547 0x2110 /* MX28_PAD_SSP2_MOSI__SSP2_CMD */
548 0x2120 /* MX28_PAD_SSP2_MISO__SSP2_D0 */
549 0x2130 /* MX28_PAD_SSP2_SS0__SSP2_D3 */
551 fsl,drive-strength = <1>;
556 usbphy0_pins_a: usbphy0@0 {
559 0x2152 /* MX28_PAD_SSP2_SS2__USB0_OVERCURRENT */
561 fsl,drive-strength = <2>;
566 usbphy0_pins_b: usbphy0@1 {
569 0x3061 /* MX28_PAD_AUART1_CTS__USB0_OVERCURRENT */
571 fsl,drive-strength = <2>;
576 usbphy1_pins_a: usbphy1@0 {
579 0x2142 /* MX28_PAD_SSP2_SS1__USB1_OVERCURRENT */
581 fsl,drive-strength = <2>;
588 reg = <0x8001c000 0x2000>;
594 reg = <0x80022000 0x2000>;
599 compatible = "fsl,imx28-dma-apbx";
600 reg = <0x80024000 0x2000>;
604 reg = <0x80028000 0x2000>;
605 interrupts = <52 53 54>;
610 reg = <0x8002a000 0x2000>;
616 reg = <0x8002c000 0x2000>;
621 reg = <0x8002e000 0x2000>;
626 compatible = "fsl,imx28-lcdif";
627 reg = <0x80030000 0x2000>;
628 interrupts = <38 86>;
633 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
634 reg = <0x80032000 0x2000>;
640 compatible = "fsl,imx28-flexcan", "fsl,p1010-flexcan";
641 reg = <0x80034000 0x2000>;
647 reg = <0x8003c000 0x200>;
651 simgpmisel@8003c200 {
652 reg = <0x8003c200 0x100>;
657 reg = <0x8003c300 0x100>;
662 reg = <0x8003c400 0x100>;
667 reg = <0x8003c500 0x100>;
672 reg = <0x8003c700 0x100>;
677 reg = <0x8003c800 0x100>;
683 compatible = "simple-bus";
684 #address-cells = <1>;
686 reg = <0x80040000 0x40000>;
690 reg = <0x80040000 0x2000>;
694 saif0: saif@80042000 {
695 compatible = "fsl,imx28-saif";
696 reg = <0x80042000 0x2000>;
697 interrupts = <59 80>;
698 fsl,saif-dma-channel = <4>;
703 reg = <0x80044000 0x2000>;
707 saif1: saif@80046000 {
708 compatible = "fsl,imx28-saif";
709 reg = <0x80046000 0x2000>;
710 interrupts = <58 81>;
711 fsl,saif-dma-channel = <5>;
716 compatible = "fsl,imx28-lradc";
717 reg = <0x80050000 0x2000>;
718 interrupts = <10 14 15 16 17 18 19
724 reg = <0x80054000 0x2000>;
725 interrupts = <45 66>;
730 compatible = "fsl,imx28-rtc", "fsl,stmp3xxx-rtc";
731 reg = <0x80056000 0x2000>;
736 #address-cells = <1>;
738 compatible = "fsl,imx28-i2c";
739 reg = <0x80058000 0x2000>;
740 interrupts = <111 68>;
741 clock-frequency = <100000>;
746 #address-cells = <1>;
748 compatible = "fsl,imx28-i2c";
749 reg = <0x8005a000 0x2000>;
750 interrupts = <110 69>;
751 clock-frequency = <100000>;
756 compatible = "fsl,imx28-pwm", "fsl,imx23-pwm";
757 reg = <0x80064000 0x2000>;
759 fsl,pwm-number = <8>;
764 reg = <0x80068000 0x2000>;
768 auart0: serial@8006a000 {
769 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
770 reg = <0x8006a000 0x2000>;
771 interrupts = <112 70 71>;
775 auart1: serial@8006c000 {
776 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
777 reg = <0x8006c000 0x2000>;
778 interrupts = <113 72 73>;
782 auart2: serial@8006e000 {
783 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
784 reg = <0x8006e000 0x2000>;
785 interrupts = <114 74 75>;
789 auart3: serial@80070000 {
790 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
791 reg = <0x80070000 0x2000>;
792 interrupts = <115 76 77>;
796 auart4: serial@80072000 {
797 compatible = "fsl,imx28-auart", "fsl,imx23-auart";
798 reg = <0x80072000 0x2000>;
799 interrupts = <116 78 79>;
803 duart: serial@80074000 {
804 compatible = "arm,pl011", "arm,primecell";
805 reg = <0x80074000 0x1000>;
810 usbphy0: usbphy@8007c000 {
811 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
812 reg = <0x8007c000 0x2000>;
816 usbphy1: usbphy@8007e000 {
817 compatible = "fsl,imx28-usbphy", "fsl,imx23-usbphy";
818 reg = <0x8007e000 0x2000>;
825 compatible = "simple-bus";
826 #address-cells = <1>;
828 reg = <0x80080000 0x80000>;
832 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
833 reg = <0x80080000 0x10000>;
835 fsl,usbphy = <&usbphy0>;
840 compatible = "fsl,imx28-usb", "fsl,imx27-usb";
841 reg = <0x80090000 0x10000>;
843 fsl,usbphy = <&usbphy1>;
848 reg = <0x800c0000 0x10000>;
852 mac0: ethernet@800f0000 {
853 compatible = "fsl,imx28-fec";
854 reg = <0x800f0000 0x4000>;
859 mac1: ethernet@800f4000 {
860 compatible = "fsl,imx28-fec";
861 reg = <0x800f4000 0x4000>;
867 reg = <0x800f8000 0x8000>;