2 * (C) Copyright 2010-2011 Texas Instruments, <www.ti.com>
3 * Mansoor Ahamed <mansoor.ahamed@ti.com>
5 * Derived from work done by Rohit Choraria <rohitkc@ti.com> for omap3
7 * See file CREDITS for list of people who contributed to this
10 * This program is free software; you can redistribute it and/or
11 * modify it under the terms of the GNU General Public License as
12 * published by the Free Software Foundation; either version 2 of
13 * the License, or (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 * GNU General Public License for more details.
20 * You should have received a copy of the GNU General Public License
21 * along with this program; if not, write to the Free Software
22 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #ifndef __ASM_ARCH_OMAP_GPMC_H
26 #define __ASM_ARCH_OMAP_GPMC_H
28 #include <linux/mtd/nand.h>
30 #define GPMC_BUF_EMPTY 0
31 #define GPMC_BUF_FULL 1
33 #define ECCCLEAR (0x1 << 8)
34 #define ECCRESULTREG1 (0x1 << 0)
35 #define ECCSIZE512BYTE 0xFF
36 #define ECCSIZE1 (ECCSIZE512BYTE << 22)
37 #define ECCSIZE0 (ECCSIZE512BYTE << 12)
38 #define ECCSIZE0SEL (0x000 << 0)
40 /* Generic ECC Layouts */
41 /* Large Page x8 NAND device Layout */
42 #ifdef GPMC_NAND_ECC_LP_x8_LAYOUT
43 #define GPMC_NAND_HW_ECC_LAYOUT { \
45 .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, \
46 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, \
47 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, \
48 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, \
51 { .offset = 58, .length = 6, }, \
56 /* Large Page x16 NAND device Layout */
57 #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
58 #define GPMC_NAND_HW_ECC_LAYOUT { \
60 .eccpos = { 2, 3, 4, \
66 { .offset = 14, .length = 50, }, \
71 /* NAND device layout in synch with the kernel */
72 #ifdef GPMC_NAND_ECC_LP_x16_LAYOUT
73 #define GPMC_NAND_HW_ECC_LAYOUT_KERNEL { \
75 .eccpos = { 40, 41, 42, \
81 { .offset = 2, .length = 38, }, \
86 /* Small Page x8 NAND device Layout */
87 #ifdef GPMC_NAND_ECC_SP_x8_LAYOUT
88 #define GPMC_NAND_HW_ECC_LAYOUT { \
90 .eccpos = { 1, 2, 3, }, \
92 { .offset = 4, .length = 12, }, \
97 /* Small Page x16 NAND device Layout */
98 #ifdef GPMC_NAND_ECC_SP_x16_LAYOUT
99 #define GPMC_NAND_HW_ECC_LAYOUT { \
101 .eccpos = { 2, 3, 4, }, \
103 { .offset = 58, .length = 6, }, \
108 #define GPMC_NAND_HW_BCH4_ECC_LAYOUT { \
110 .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, \
111 10, 11, 12, 13, 14, 15, 16, 17, \
112 18, 19, 20, 21, 22, 23, 24, 25, \
113 26, 27, 28, 29, 30, 31, 32, 33, \
116 { .offset = 34, .length = 30, }, \
120 #define GPMC_NAND_HW_BCH8_ECC_LAYOUT { \
121 .eccbytes = 4 * 14, \
122 .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, \
123 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, \
124 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, \
125 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, \
128 { .offset = 58, .length = 6, }, \
132 #define GPMC_NAND_HW_BCH16_ECC_LAYOUT { \
133 .eccbytes = 4 * 26, \
134 .eccpos = { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, \
135 15, 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, \
136 28, 29, 30, 31, 32, 33, 34, 35, 36, 37, 38, 39, 40, \
137 41, 42, 43, 44, 45, 46, 47, 48, 49, 50, 51, 52, 53, \
138 54, 55, 56, 57, 58, 59, 60, 61, 62, 63, 64, 65, 66, \
139 67, 68, 69, 70, 71, 72, 73, 74, 75, 76, 77, 78, 79, \
140 80, 81, 82, 83, 84, 85, 86, 87, 88, 89, 90, 91, 92, \
141 93, 94, 95, 96, 97, 98, 99, 100, 101, 102, 103, 104, 105, \
144 { .offset = 106, .length = 8, }, \
149 * ELM Module Registers
152 /* ELM registers bit fields */
153 #define ELM_SYSCONFIG_SOFTRESET_MASK (0x2)
154 #define ELM_SYSCONFIG_SOFTRESET (0x2)
155 #define ELM_SYSSTATUS_RESETDONE_MASK (0x1)
156 #define ELM_SYSSTATUS_RESETDONE (0x1)
157 #define ELM_LOCATION_CONFIG_ECC_BCH_LEVEL_MASK (0x3)
158 #define ELM_LOCATION_CONFIG_ECC_SIZE_MASK (0x7FF0000)
159 #define ELM_LOCATION_CONFIG_ECC_SIZE_POS (16)
160 #define ELM_SYNDROME_FRAGMENT_6_SYNDROME_VALID (0x00010000)
161 #define ELM_LOCATION_STATUS_ECC_CORRECTABLE_MASK (0x100)
162 #define ELM_LOCATION_STATUS_ECC_NB_ERRORS_MASK (0x1F)
164 #ifndef __KERNEL_STRICT_NAMES
174 /* BCH syndrome registers */
176 u32 syndrome_fragment_x[7]; /* 0x400, 0x404.... 0x418 */
177 u8 res1[36]; /* 0x41c */
180 /* BCH error status & location register */
182 u32 location_status; /* 0x800 */
183 u8 res1[124]; /* 0x804 */
184 u32 error_location_x[16]; /* 0x880.... */
185 u8 res2[64]; /* 0x8c0 */
188 /* BCH ELM register map - do not try to allocate memmory for this structure.
189 * We have used plenty of reserved variables to fill the slots in the ELM
190 * register memory map.
191 * Directly initialize the struct pointer to ELM base address.
195 u8 res1[12]; /* 0x004 */
196 u32 sysconfig; /* 0x010 */
197 u32 sysstatus; /* 0x014 */
198 u32 irqstatus; /* 0x018 */
199 u32 irqenable; /* 0x01c */
200 u32 location_config; /* 0x020 */
201 u8 res2[92]; /* 0x024 */
202 u32 page_ctrl; /* 0x080 */
203 u8 res3[892]; /* 0x084 */
204 struct syndrome syndrome_fragments[8]; /* 0x400 */
205 u8 res4[512]; /* 0x600 */
206 struct location error_location[8]; /* 0x800 */
209 int elm_check_error(u8 *syndrome, u32 nibbles, u32 *error_count,
210 u32 *error_locations);
211 int elm_config(enum bch_level level);
212 void elm_reset(void);
214 void am33xx_nand_switch_ecc(nand_ecc_modes_t hardware, int32_t mode);
215 #endif /* __ASSEMBLY__ */
216 #endif /* __KERNEL_STRICT_NAMES */
219 #endif /* __ASM_ARCH_OMAP_GPMC_H */