2 * Matrix-centric header file for the AT91SAM9X5 family
4 * Copyright (C) 2012-2013 Atmel Corporation.
6 * Memory Controllers (MATRIX, EBI) - System peripherals registers.
7 * Based on AT91SAM9X5 & AT91SAM9N12 preliminary datasheet.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
15 #ifndef __AT91SAM9X5_MATRIX_H__
16 #define __AT91SAM9X5_MATRIX_H__
20 /* AT91SAM9N12 Matrix definition is a subset of AT91SAM9X5. */
25 u32 mrcr; /* 0x100 Master Remap Control */
27 #ifdef CONFIG_AT91SAM9X5
30 /* EBI Chip Select Assignment Register
36 #ifdef CONFIG_AT91SAM9N12
43 #endif /* __ASSEMBLY__ */
45 #define AT91_MATRIX_ULBT_INFINITE (0 << 0)
46 #define AT91_MATRIX_ULBT_SINGLE (1 << 0)
47 #define AT91_MATRIX_ULBT_FOUR (2 << 0)
48 #define AT91_MATRIX_ULBT_EIGHT (3 << 0)
49 #define AT91_MATRIX_ULBT_SIXTEEN (4 << 0)
50 #define AT91_MATRIX_ULBT_THIRTYTWO (5 << 0)
51 #define AT91_MATRIX_ULBT_SIXTYFOUR (6 << 0)
52 #define AT91_MATRIX_ULBT_128 (7 << 0)
54 #define AT91_MATRIX_DEFMSTR_TYPE_NONE (0 << 16)
55 #define AT91_MATRIX_DEFMSTR_TYPE_LAST (1 << 16)
56 #define AT91_MATRIX_DEFMSTR_TYPE_FIXED (2 << 16)
57 #define AT91_MATRIX_FIXED_DEFMSTR_SHIFT 18
59 #define AT91_MATRIX_M0PR_SHIFT 0
60 #define AT91_MATRIX_M1PR_SHIFT 4
61 #define AT91_MATRIX_M2PR_SHIFT 8
62 #define AT91_MATRIX_M3PR_SHIFT 12
63 #define AT91_MATRIX_M4PR_SHIFT 16
64 #define AT91_MATRIX_M5PR_SHIFT 20
65 #define AT91_MATRIX_M6PR_SHIFT 24
66 #define AT91_MATRIX_M7PR_SHIFT 28
68 #define AT91_MATRIX_M8PR_SHIFT 0 /* register B */
69 #define AT91_MATRIX_M9PR_SHIFT 4 /* register B */
70 #define AT91_MATRIX_M10PR_SHIFT 8 /* register B */
71 #define AT91_MATRIX_M11PR_SHIFT 12 /* register B */
73 #define AT91_MATRIX_RCB0 (1 << 0)
74 #define AT91_MATRIX_RCB1 (1 << 1)
75 #define AT91_MATRIX_RCB2 (1 << 2)
76 #define AT91_MATRIX_RCB3 (1 << 3)
77 #define AT91_MATRIX_RCB4 (1 << 4)
78 #define AT91_MATRIX_RCB5 (1 << 5)
79 #define AT91_MATRIX_RCB6 (1 << 6)
80 #define AT91_MATRIX_RCB7 (1 << 7)
81 #define AT91_MATRIX_RCB8 (1 << 8)
82 #define AT91_MATRIX_RCB9 (1 << 9)
83 #define AT91_MATRIX_RCB10 (1 << 10)
85 #define AT91_MATRIX_EBI_CS1A_SMC (0 << 1)
86 #define AT91_MATRIX_EBI_CS1A_SDRAMC (1 << 1)
87 #define AT91_MATRIX_EBI_CS3A_SMC (0 << 3)
88 #define AT91_MATRIX_EBI_CS3A_SMC_SMARTMEDIA (1 << 3)
89 #define AT91_MATRIX_EBI_DBPU_ON (0 << 8)
90 #define AT91_MATRIX_EBI_DBPU_OFF (1 << 8)
91 #define AT91_MATRIX_EBI_DBPD_ON (0 << 9)
92 #define AT91_MATRIX_EBI_DBPD_OFF (1 << 9)
93 #define AT91_MATRIX_EBI_VDDIOMSEL_1_8V (0 << 16)
94 #define AT91_MATRIX_EBI_VDDIOMSEL_3_3V (1 << 16)
95 #define AT91_MATRIX_EBI_EBI_IOSR_REDUCED (0 << 17)
96 #define AT91_MATRIX_EBI_EBI_IOSR_NORMAL (1 << 17)
97 #define AT91_MATRIX_NFD0_ON_D0 (0 << 24)
98 #define AT91_MATRIX_NFD0_ON_D16 (1 << 24)
99 #define AT91_MATRIX_MP_OFF (0 << 25)
100 #define AT91_MATRIX_MP_ON (1 << 25)