arch/arm/mach-exynos/cpuidle.c

   1 /* linux/arch/arm/mach-exynos4/cpuidle.c
   2  *
   3  * Copyright (c) 2011 Samsung Electronics Co., Ltd.
   4  *              http://www.samsung.com
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License version 2 as
   8  * published by the Free Software Foundation.
   9 */
  10
  11 #include <linux/kernel.h>
  12 #include <linux/init.h>
  13 #include <linux/cpuidle.h>
  14 #include <linux/cpu_pm.h>
  15 #include <linux/io.h>
  16 #include <linux/export.h>
  17 #include <linux/module.h>
  18 #include <linux/time.h>
  19 #include <linux/platform_device.h>
  20
  21 #include <asm/proc-fns.h>
  22 #include <asm/smp_scu.h>
  23 #include <asm/suspend.h>
  24 #include <asm/unified.h>
  25 #include <asm/cpuidle.h>
  26
  27 #include <plat/cpu.h>
  28 #include <plat/pm.h>
  29
  30 #include <mach/map.h>
  31
  32 #include "common.h"
  33 #include "regs-pmu.h"
  34
  35 #define REG_DIRECTGO_ADDR       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
  36                         S5P_INFORM7 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
  37                         (S5P_VA_SYSRAM + 0x24) : S5P_INFORM0))
  38 #define REG_DIRECTGO_FLAG       (samsung_rev() == EXYNOS4210_REV_1_1 ? \
  39                         S5P_INFORM6 : (samsung_rev() == EXYNOS4210_REV_1_0 ? \
  40                         (S5P_VA_SYSRAM + 0x20) : S5P_INFORM1))
  41
  42 #define S5P_CHECK_AFTR          0xFCBA0D10
  43
  44 static int exynos4_enter_lowpower(struct cpuidle_device *dev,
  45                                 struct cpuidle_driver *drv,
  46                                 int index);
  47
  48 static DEFINE_PER_CPU(struct cpuidle_device, exynos4_cpuidle_device);
  49
  50 static struct cpuidle_driver exynos4_idle_driver = {
  51         .name                   = "exynos4_idle",
  52         .owner                  = THIS_MODULE,
  53         .states = {
  54                 [0] = ARM_CPUIDLE_WFI_STATE,
  55                 [1] = {
  56                         .enter                  = exynos4_enter_lowpower,
  57                         .exit_latency           = 300,
  58                         .target_residency       = 100000,
  59                         .flags                  = CPUIDLE_FLAG_TIME_VALID,
  60                         .name                   = "C1",
  61                         .desc                   = "ARM power down",
  62                 },
  63         },
  64         .state_count = 2,
  65         .safe_state_index = 0,
  66 };
  67
  68 /* Ext-GIC nIRQ/nFIQ is the only wakeup source in AFTR */
  69 static void exynos4_set_wakeupmask(void)
  70 {
  71         __raw_writel(0x0000ff3e, S5P_WAKEUP_MASK);
  72 }
  73
  74 static unsigned int g_pwr_ctrl, g_diag_reg;
  75
  76 static void save_cpu_arch_register(void)
  77 {
  78         /*read power control register*/
  79         asm("mrc p15, 0, %0, c15, c0, 0" : "=r"(g_pwr_ctrl) : : "cc");
  80         /*read diagnostic register*/
  81         asm("mrc p15, 0, %0, c15, c0, 1" : "=r"(g_diag_reg) : : "cc");
  82         return;
  83 }
  84
  85 static void restore_cpu_arch_register(void)
  86 {
  87         /*write power control register*/
  88         asm("mcr p15, 0, %0, c15, c0, 0" : : "r"(g_pwr_ctrl) : "cc");
  89         /*write diagnostic register*/
  90         asm("mcr p15, 0, %0, c15, c0, 1" : : "r"(g_diag_reg) : "cc");
  91         return;
  92 }
  93
  94 static int idle_finisher(unsigned long flags)
  95 {
  96         cpu_do_idle();
  97         return 1;
  98 }
  99
 100 static int exynos4_enter_core0_aftr(struct cpuidle_device *dev,
 101                                 struct cpuidle_driver *drv,
 102                                 int index)
 103 {
 104         unsigned long tmp;
 105
 106         exynos4_set_wakeupmask();
 107
 108         /* Set value of power down register for aftr mode */
 109         exynos_sys_powerdown_conf(SYS_AFTR);
 110
 111         __raw_writel(virt_to_phys(exynos_cpu_resume), REG_DIRECTGO_ADDR);
 112         __raw_writel(S5P_CHECK_AFTR, REG_DIRECTGO_FLAG);
 113
 114         save_cpu_arch_register();
 115
 116         /* Setting Central Sequence Register for power down mode */
 117         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
 118         tmp &= ~S5P_CENTRAL_LOWPWR_CFG;
 119         __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 120
 121         cpu_pm_enter();
 122         cpu_suspend(0, idle_finisher);
 123
 124 #ifdef CONFIG_SMP
 125         if (!soc_is_exynos5250())
 126                 scu_enable(S5P_VA_SCU);
 127 #endif
 128         cpu_pm_exit();
 129
 130         restore_cpu_arch_register();
 131
 132         /*
 133          * If PMU failed while entering sleep mode, WFI will be
 134          * ignored by PMU and then exiting cpu_do_idle().
 135          * S5P_CENTRAL_LOWPWR_CFG bit will not be set automatically
 136          * in this situation.
 137          */
 138         tmp = __raw_readl(S5P_CENTRAL_SEQ_CONFIGURATION);
 139         if (!(tmp & S5P_CENTRAL_LOWPWR_CFG)) {
 140                 tmp |= S5P_CENTRAL_LOWPWR_CFG;
 141                 __raw_writel(tmp, S5P_CENTRAL_SEQ_CONFIGURATION);
 142         }
 143
 144         /* Clear wakeup state register */
 145         __raw_writel(0x0, S5P_WAKEUP_STAT);
 146
 147         return index;
 148 }
 149
 150 static int exynos4_enter_lowpower(struct cpuidle_device *dev,
 151                                 struct cpuidle_driver *drv,
 152                                 int index)
 153 {
 154         int new_index = index;
 155
 156         /* AFTR can only be entered when cores other than CPU0 are offline */
 157         if (num_online_cpus() > 1 || dev->cpu != 0)
 158                 new_index = drv->safe_state_index;
 159
 160         if (new_index == 0)
 161                 return arm_cpuidle_simple_enter(dev, drv, new_index);
 162         else
 163                 return exynos4_enter_core0_aftr(dev, drv, new_index);
 164 }
 165
 166 static int exynos_cpuidle_probe(struct platform_device *pdev)
 167 {
 168         int cpu_id, ret;
 169         struct cpuidle_device *device;
 170
 171         if (soc_is_exynos5440())
 172                 exynos4_idle_driver.state_count = 1;
 173
 174         ret = cpuidle_register_driver(&exynos4_idle_driver);
 175         if (ret) {
 176                 dev_err(&pdev->dev, "failed to register cpuidle driver\n");
 177                 return ret;
 178         }
 179
 180         for_each_online_cpu(cpu_id) {
 181                 device = &per_cpu(exynos4_cpuidle_device, cpu_id);
 182                 device->cpu = cpu_id;
 183
 184                 ret = cpuidle_register_device(device);
 185                 if (ret) {
 186                         dev_err(&pdev->dev, "failed to register cpuidle device\n");
 187                         return ret;
 188                 }
 189         }
 190
 191         return 0;
 192 }
 193
 194 static struct platform_driver exynos_cpuidle_driver = {
 195         .probe  = exynos_cpuidle_probe,
 196         .driver = {
 197                 .name = "exynos_cpuidle",
 198                 .owner = THIS_MODULE,
 199         },
 200 };
 201
 202 module_platform_driver(exynos_cpuidle_driver);