arch/arm/mach-highbank/highbank.c

   1 /*
   2  * Copyright 2010-2011 Calxeda, Inc.
   3  *
   4  * This program is free software; you can redistribute it and/or modify it
   5  * under the terms and conditions of the GNU General Public License,
   6  * version 2, as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope it will be useful, but WITHOUT
   9  * ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10  * FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License for
  11  * more details.
  12  *
  13  * You should have received a copy of the GNU General Public License along with
  14  * this program.  If not, see <http://www.gnu.org/licenses/>.
  15  */
  16 #include <linux/clk.h>
  17 #include <linux/clkdev.h>
  18 #include <linux/dma-mapping.h>
  19 #include <linux/io.h>
  20 #include <linux/irq.h>
  21 #include <linux/irqdomain.h>
  22 #include <linux/of.h>
  23 #include <linux/of_irq.h>
  24 #include <linux/of_platform.h>
  25 #include <linux/of_address.h>
  26 #include <linux/smp.h>
  27 #include <linux/amba/bus.h>
  28
  29 #include <asm/cacheflush.h>
  30 #include <asm/smp_plat.h>
  31 #include <asm/smp_scu.h>
  32 #include <asm/smp_twd.h>
  33 #include <asm/hardware/arm_timer.h>
  34 #include <asm/hardware/timer-sp.h>
  35 #include <asm/hardware/gic.h>
  36 #include <asm/hardware/cache-l2x0.h>
  37 #include <asm/mach/arch.h>
  38 #include <asm/mach/map.h>
  39 #include <asm/mach/time.h>
  40
  41 #include "core.h"
  42 #include "sysregs.h"
  43
  44 void __iomem *sregs_base;
  45
  46 #define HB_SCU_VIRT_BASE        0xfee00000
  47 void __iomem *scu_base_addr = ((void __iomem *)(HB_SCU_VIRT_BASE));
  48
  49 static struct map_desc scu_io_desc __initdata = {
  50         .virtual        = HB_SCU_VIRT_BASE,
  51         .pfn            = 0, /* run-time */
  52         .length         = SZ_4K,
  53         .type           = MT_DEVICE,
  54 };
  55
  56 static void __init highbank_scu_map_io(void)
  57 {
  58         unsigned long base;
  59
  60         /* Get SCU base */
  61         asm("mrc p15, 4, %0, c15, c0, 0" : "=r" (base));
  62
  63         scu_io_desc.pfn = __phys_to_pfn(base);
  64         iotable_init(&scu_io_desc, 1);
  65 }
  66
  67 static void __init highbank_map_io(void)
  68 {
  69         highbank_scu_map_io();
  70         highbank_lluart_map_io();
  71 }
  72
  73 #define HB_JUMP_TABLE_PHYS(cpu)         (0x40 + (0x10 * (cpu)))
  74 #define HB_JUMP_TABLE_VIRT(cpu)         phys_to_virt(HB_JUMP_TABLE_PHYS(cpu))
  75
  76 void highbank_set_cpu_jump(int cpu, void *jump_addr)
  77 {
  78         cpu = cpu_logical_map(cpu);
  79         writel(virt_to_phys(jump_addr), HB_JUMP_TABLE_VIRT(cpu));
  80         __cpuc_flush_dcache_area(HB_JUMP_TABLE_VIRT(cpu), 16);
  81         outer_clean_range(HB_JUMP_TABLE_PHYS(cpu),
  82                           HB_JUMP_TABLE_PHYS(cpu) + 15);
  83 }
  84
  85 const static struct of_device_id irq_match[] = {
  86         { .compatible = "arm,cortex-a9-gic", .data = gic_of_init, },
  87         {}
  88 };
  89
  90 #ifdef CONFIG_CACHE_L2X0
  91 static void highbank_l2x0_disable(void)
  92 {
  93         /* Disable PL310 L2 Cache controller */
  94         highbank_smc1(0x102, 0x0);
  95 }
  96 #endif
  97
  98 static void __init highbank_init_irq(void)
  99 {
 100         of_irq_init(irq_match);
 101
 102 #ifdef CONFIG_CACHE_L2X0
 103         /* Enable PL310 L2 Cache controller */
 104         highbank_smc1(0x102, 0x1);
 105         l2x0_of_init(0, ~0UL);
 106         outer_cache.disable = highbank_l2x0_disable;
 107 #endif
 108 }
 109
 110 static struct clk_lookup lookup = {
 111         .dev_id = "sp804",
 112         .con_id = NULL,
 113 };
 114
 115 static void __init highbank_timer_init(void)
 116 {
 117         int irq;
 118         struct device_node *np;
 119         void __iomem *timer_base;
 120
 121         /* Map system registers */
 122         np = of_find_compatible_node(NULL, NULL, "calxeda,hb-sregs");
 123         sregs_base = of_iomap(np, 0);
 124         WARN_ON(!sregs_base);
 125
 126         np = of_find_compatible_node(NULL, NULL, "arm,sp804");
 127         timer_base = of_iomap(np, 0);
 128         WARN_ON(!timer_base);
 129         irq = irq_of_parse_and_map(np, 0);
 130
 131         highbank_clocks_init();
 132         lookup.clk = of_clk_get(np, 0);
 133         clkdev_add(&lookup);
 134
 135         sp804_clocksource_and_sched_clock_init(timer_base + 0x20, "timer1");
 136         sp804_clockevents_init(timer_base, irq, "timer0");
 137
 138         twd_local_timer_of_register();
 139 }
 140
 141 static struct sys_timer highbank_timer = {
 142         .init = highbank_timer_init,
 143 };
 144
 145 static void highbank_power_off(void)
 146 {
 147         hignbank_set_pwr_shutdown();
 148         scu_power_mode(scu_base_addr, SCU_PM_POWEROFF);
 149
 150         while (1)
 151                 cpu_do_idle();
 152 }
 153
 154 static int highbank_platform_notifier(struct notifier_block *nb,
 155                                   unsigned long event, void *__dev)
 156 {
 157         struct resource *res;
 158         int reg = -1;
 159         struct device *dev = __dev;
 160
 161         if (event != BUS_NOTIFY_ADD_DEVICE)
 162                 return NOTIFY_DONE;
 163
 164         if (of_device_is_compatible(dev->of_node, "calxeda,hb-ahci"))
 165                 reg = 0xc;
 166         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-sdhci"))
 167                 reg = 0x18;
 168         else if (of_device_is_compatible(dev->of_node, "arm,pl330"))
 169                 reg = 0x20;
 170         else if (of_device_is_compatible(dev->of_node, "calxeda,hb-xgmac")) {
 171                 res = platform_get_resource(to_platform_device(dev),
 172                                             IORESOURCE_MEM, 0);
 173                 if (res) {
 174                         if (res->start == 0xfff50000)
 175                                 reg = 0;
 176                         else if (res->start == 0xfff51000)
 177                                 reg = 4;
 178                 }
 179         }
 180
 181         if (reg < 0)
 182                 return NOTIFY_DONE;
 183
 184         if (of_property_read_bool(dev->of_node, "dma-coherent")) {
 185                 writel(0xff31, sregs_base + reg);
 186                 set_dma_ops(dev, &arm_coherent_dma_ops);
 187         } else
 188                 writel(0, sregs_base + reg);
 189
 190         return NOTIFY_OK;
 191 }
 192
 193 static struct notifier_block highbank_amba_nb = {
 194         .notifier_call = highbank_platform_notifier,
 195 };
 196
 197 static struct notifier_block highbank_platform_nb = {
 198         .notifier_call = highbank_platform_notifier,
 199 };
 200
 201 static void __init highbank_init(void)
 202 {
 203         pm_power_off = highbank_power_off;
 204         highbank_pm_init();
 205
 206         bus_register_notifier(&platform_bus_type, &highbank_platform_nb);
 207         bus_register_notifier(&amba_bustype, &highbank_amba_nb);
 208
 209         of_platform_populate(NULL, of_default_bus_match_table, NULL, NULL);
 210 }
 211
 212 static const char *highbank_match[] __initconst = {
 213         "calxeda,highbank",
 214         NULL,
 215 };
 216
 217 DT_MACHINE_START(HIGHBANK, "Highbank")
 218         .smp            = smp_ops(highbank_smp_ops),
 219         .map_io         = highbank_map_io,
 220         .init_irq       = highbank_init_irq,
 221         .timer          = &highbank_timer,
 222         .handle_irq     = gic_handle_irq,
 223         .init_machine   = highbank_init,
 224         .dt_compat      = highbank_match,
 225         .restart        = highbank_restart,
 226 MACHINE_END