2 * Copyright 2008-2010 Freescale Semiconductor, Inc. All Rights Reserved.
4 * The code contained herein is licensed under the GNU General Public
5 * License. You may obtain a copy of the GNU General Public License
6 * Version 2 or later at the following locations:
8 * http://www.opensource.org/licenses/gpl-license.html
9 * http://www.gnu.org/copyleft/gpl.html
11 * This file contains the CPU initialization code.
14 #include <linux/types.h>
15 #include <linux/kernel.h>
16 #include <linux/init.h>
17 #include <linux/module.h>
18 #include <mach/hardware.h>
21 static int mx5_cpu_rev = -1;
24 #define MX50_HW_ADADIG_DIGPROG 0xB0
26 static int get_mx51_srev(void)
28 void __iomem *iim_base = MX51_IO_ADDRESS(MX51_IIM_BASE_ADDR);
29 u32 rev = readl(iim_base + IIM_SREV) & 0xff;
33 return IMX_CHIP_REVISION_2_0;
35 return IMX_CHIP_REVISION_3_0;
37 return IMX_CHIP_REVISION_UNKNOWN;
43 * the silicon revision of the cpu
44 * -EINVAL - not a mx51
46 int mx51_revision(void)
51 if (mx5_cpu_rev == -1)
52 mx5_cpu_rev = get_mx51_srev();
56 EXPORT_SYMBOL(mx51_revision);
61 * All versions of the silicon before Rev. 3 have broken NEON implementations.
62 * Dependent on link order - so the assumption is that vfp_init is called
65 int __init mx51_neon_fixup(void)
67 if (mx51_revision() < IMX_CHIP_REVISION_3_0 &&
68 (elf_hwcap & HWCAP_NEON)) {
69 elf_hwcap &= ~HWCAP_NEON;
70 pr_info("Turning off NEON support, detected broken NEON implementation\n");
77 static int get_mx53_srev(void)
79 void __iomem *iim_base = MX51_IO_ADDRESS(MX53_IIM_BASE_ADDR);
80 u32 rev = readl(iim_base + IIM_SREV) & 0xff;
84 return IMX_CHIP_REVISION_1_0;
86 return IMX_CHIP_REVISION_2_0;
88 return IMX_CHIP_REVISION_2_1;
90 return IMX_CHIP_REVISION_UNKNOWN;
96 * the silicon revision of the cpu
97 * -EINVAL - not a mx53
99 int mx53_revision(void)
104 if (mx5_cpu_rev == -1)
105 mx5_cpu_rev = get_mx53_srev();
109 EXPORT_SYMBOL(mx53_revision);
111 static int get_mx50_srev(void)
113 void __iomem *anatop = ioremap(MX50_ANATOP_BASE_ADDR, SZ_8K);
117 mx5_cpu_rev = -EINVAL;
121 rev = readl(anatop + MX50_HW_ADADIG_DIGPROG);
126 return IMX_CHIP_REVISION_1_0;
128 return IMX_CHIP_REVISION_1_1;
134 * the silicon revision of the cpu
135 * -EINVAL - not a mx50
137 int mx50_revision(void)
142 if (mx5_cpu_rev == -1)
143 mx5_cpu_rev = get_mx50_srev();
147 EXPORT_SYMBOL(mx50_revision);