2 * linux/arch/arm/plat-mxc/epit.c
4 * Copyright (C) 2010 Sascha Hauer <s.hauer@pengutronix.de>
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2
9 * of the License, or (at your option) any later version.
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston,
27 #define EPITCR_EN (1 << 0)
28 #define EPITCR_ENMOD (1 << 1)
29 #define EPITCR_OCIEN (1 << 2)
30 #define EPITCR_RLD (1 << 3)
31 #define EPITCR_PRESC(x) (((x) & 0xfff) << 4)
32 #define EPITCR_SWR (1 << 16)
33 #define EPITCR_IOVW (1 << 17)
34 #define EPITCR_DBGEN (1 << 18)
35 #define EPITCR_WAITEN (1 << 19)
36 #define EPITCR_RES (1 << 20)
37 #define EPITCR_STOPEN (1 << 21)
38 #define EPITCR_OM_DISCON (0 << 22)
39 #define EPITCR_OM_TOGGLE (1 << 22)
40 #define EPITCR_OM_CLEAR (2 << 22)
41 #define EPITCR_OM_SET (3 << 22)
42 #define EPITCR_CLKSRC_OFF (0 << 24)
43 #define EPITCR_CLKSRC_PERIPHERAL (1 << 24)
44 #define EPITCR_CLKSRC_REF_HIGH (1 << 24)
45 #define EPITCR_CLKSRC_REF_LOW (3 << 24)
47 #define EPITSR_OCIF (1 << 0)
49 #include <linux/interrupt.h>
50 #include <linux/irq.h>
51 #include <linux/clockchips.h>
52 #include <linux/clk.h>
53 #include <linux/err.h>
55 #include <mach/hardware.h>
56 #include <asm/mach/time.h>
60 static struct clock_event_device clockevent_epit;
61 static enum clock_event_mode clockevent_mode = CLOCK_EVT_MODE_UNUSED;
63 static void __iomem *timer_base;
65 static inline void epit_irq_disable(void)
69 val = __raw_readl(timer_base + EPITCR);
71 __raw_writel(val, timer_base + EPITCR);
74 static inline void epit_irq_enable(void)
78 val = __raw_readl(timer_base + EPITCR);
80 __raw_writel(val, timer_base + EPITCR);
83 static void epit_irq_acknowledge(void)
85 __raw_writel(EPITSR_OCIF, timer_base + EPITSR);
88 static int __init epit_clocksource_init(struct clk *timer_clk)
90 unsigned int c = clk_get_rate(timer_clk);
92 return clocksource_mmio_init(timer_base + EPITCNR, "epit", c, 200, 32,
93 clocksource_mmio_readl_down);
98 static int epit_set_next_event(unsigned long evt,
99 struct clock_event_device *unused)
103 tcmp = __raw_readl(timer_base + EPITCNR);
105 __raw_writel(tcmp - evt, timer_base + EPITCMPR);
110 static void epit_set_mode(enum clock_event_mode mode,
111 struct clock_event_device *evt)
116 * The timer interrupt generation is disabled at least
117 * for enough time to call epit_set_next_event()
119 local_irq_save(flags);
121 /* Disable interrupt in GPT module */
124 if (mode != clockevent_mode) {
125 /* Set event time into far-far future */
127 /* Clear pending interrupt */
128 epit_irq_acknowledge();
131 /* Remember timer mode */
132 clockevent_mode = mode;
133 local_irq_restore(flags);
136 case CLOCK_EVT_MODE_PERIODIC:
137 printk(KERN_ERR "epit_set_mode: Periodic mode is not "
138 "supported for i.MX EPIT\n");
140 case CLOCK_EVT_MODE_ONESHOT:
142 * Do not put overhead of interrupt enable/disable into
143 * epit_set_next_event(), the core has about 4 minutes
144 * to call epit_set_next_event() or shutdown clock after
147 local_irq_save(flags);
149 local_irq_restore(flags);
151 case CLOCK_EVT_MODE_SHUTDOWN:
152 case CLOCK_EVT_MODE_UNUSED:
153 case CLOCK_EVT_MODE_RESUME:
154 /* Left event sources disabled, no more interrupts appear */
160 * IRQ handler for the timer
162 static irqreturn_t epit_timer_interrupt(int irq, void *dev_id)
164 struct clock_event_device *evt = &clockevent_epit;
166 epit_irq_acknowledge();
168 evt->event_handler(evt);
173 static struct irqaction epit_timer_irq = {
174 .name = "i.MX EPIT Timer Tick",
175 .flags = IRQF_DISABLED | IRQF_TIMER | IRQF_IRQPOLL,
176 .handler = epit_timer_interrupt,
179 static struct clock_event_device clockevent_epit = {
181 .features = CLOCK_EVT_FEAT_ONESHOT,
183 .set_mode = epit_set_mode,
184 .set_next_event = epit_set_next_event,
188 static int __init epit_clockevent_init(struct clk *timer_clk)
190 unsigned int c = clk_get_rate(timer_clk);
192 clockevent_epit.mult = div_sc(c, NSEC_PER_SEC,
193 clockevent_epit.shift);
194 clockevent_epit.max_delta_ns =
195 clockevent_delta2ns(0xfffffffe, &clockevent_epit);
196 clockevent_epit.min_delta_ns =
197 clockevent_delta2ns(0x800, &clockevent_epit);
199 clockevent_epit.cpumask = cpumask_of(0);
201 clockevents_register_device(&clockevent_epit);
206 void __init epit_timer_init(void __iomem *base, int irq)
208 struct clk *timer_clk;
210 timer_clk = clk_get_sys("imx-epit.0", NULL);
211 if (IS_ERR(timer_clk)) {
212 pr_err("i.MX epit: unable to get clk\n");
216 clk_prepare_enable(timer_clk);
221 * Initialise to a known state (all timers off, and timing reset)
223 __raw_writel(0x0, timer_base + EPITCR);
225 __raw_writel(0xffffffff, timer_base + EPITLR);
226 __raw_writel(EPITCR_EN | EPITCR_CLKSRC_REF_HIGH | EPITCR_WAITEN,
227 timer_base + EPITCR);
229 /* init and register the timer to the framework */
230 epit_clocksource_init(timer_clk);
231 epit_clockevent_init(timer_clk);
233 /* Make irqs happen */
234 setup_irq(irq, &epit_timer_irq);