1 /* linux/arch/arm/mach-msm/devices.c
3 * Copyright (C) 2008 Google, Inc.
5 * This software is licensed under the terms of the GNU General Public
6 * License version 2, as published by the Free Software Foundation, and
7 * may be copied, distributed, and modified under those terms.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
16 #include <linux/kernel.h>
17 #include <linux/platform_device.h>
18 #include <linux/clkdev.h>
20 #include <mach/irqs.h>
21 #include <mach/msm_iomap.h>
24 #include <asm/mach/flash.h>
25 #include <linux/mtd/nand.h>
26 #include <linux/mtd/partitions.h>
29 #include "clock-pcom.h"
30 #include <linux/platform_data/mmc-msm_sdcc.h>
32 static struct resource msm_gpio_resources[] = {
36 .flags = IORESOURCE_IRQ,
41 .flags = IORESOURCE_IRQ,
45 .end = 0xa9200800 + SZ_4K - 1,
46 .flags = IORESOURCE_MEM,
51 .end = 0xa9300C00 + SZ_4K - 1,
52 .flags = IORESOURCE_MEM,
57 struct platform_device msm_device_gpio_7201 = {
58 .name = "gpio-msm-7201",
59 .num_resources = ARRAY_SIZE(msm_gpio_resources),
60 .resource = msm_gpio_resources,
63 static struct resource resources_uart1[] = {
67 .flags = IORESOURCE_IRQ,
70 .start = MSM_UART1_PHYS,
71 .end = MSM_UART1_PHYS + MSM_UART1_SIZE - 1,
72 .flags = IORESOURCE_MEM,
73 .name = "uart_resource"
77 static struct resource resources_uart2[] = {
81 .flags = IORESOURCE_IRQ,
84 .start = MSM_UART2_PHYS,
85 .end = MSM_UART2_PHYS + MSM_UART2_SIZE - 1,
86 .flags = IORESOURCE_MEM,
87 .name = "uart_resource"
91 static struct resource resources_uart3[] = {
95 .flags = IORESOURCE_IRQ,
98 .start = MSM_UART3_PHYS,
99 .end = MSM_UART3_PHYS + MSM_UART3_SIZE - 1,
100 .flags = IORESOURCE_MEM,
101 .name = "uart_resource"
105 struct platform_device msm_device_uart1 = {
106 .name = "msm_serial",
108 .num_resources = ARRAY_SIZE(resources_uart1),
109 .resource = resources_uart1,
112 struct platform_device msm_device_uart2 = {
113 .name = "msm_serial",
115 .num_resources = ARRAY_SIZE(resources_uart2),
116 .resource = resources_uart2,
119 struct platform_device msm_device_uart3 = {
120 .name = "msm_serial",
122 .num_resources = ARRAY_SIZE(resources_uart3),
123 .resource = resources_uart3,
126 static struct resource resources_i2c[] = {
128 .start = MSM_I2C_PHYS,
129 .end = MSM_I2C_PHYS + MSM_I2C_SIZE - 1,
130 .flags = IORESOURCE_MEM,
133 .start = INT_PWB_I2C,
135 .flags = IORESOURCE_IRQ,
139 struct platform_device msm_device_i2c = {
142 .num_resources = ARRAY_SIZE(resources_i2c),
143 .resource = resources_i2c,
146 static struct resource resources_hsusb[] = {
148 .start = MSM_HSUSB_PHYS,
149 .end = MSM_HSUSB_PHYS + MSM_HSUSB_SIZE,
150 .flags = IORESOURCE_MEM,
155 .flags = IORESOURCE_IRQ,
159 struct platform_device msm_device_hsusb = {
162 .num_resources = ARRAY_SIZE(resources_hsusb),
163 .resource = resources_hsusb,
165 .coherent_dma_mask = 0xffffffff,
169 struct flash_platform_data msm_nand_data = {
174 static struct resource resources_nand[] = {
178 .flags = IORESOURCE_DMA,
182 struct platform_device msm_device_nand = {
185 .num_resources = ARRAY_SIZE(resources_nand),
186 .resource = resources_nand,
188 .platform_data = &msm_nand_data,
192 struct platform_device msm_device_smd = {
197 static struct resource resources_sdc1[] = {
199 .start = MSM_SDC1_PHYS,
200 .end = MSM_SDC1_PHYS + MSM_SDC1_SIZE - 1,
201 .flags = IORESOURCE_MEM,
206 .flags = IORESOURCE_IRQ,
210 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
216 .flags = IORESOURCE_DMA,
220 static struct resource resources_sdc2[] = {
222 .start = MSM_SDC2_PHYS,
223 .end = MSM_SDC2_PHYS + MSM_SDC2_SIZE - 1,
224 .flags = IORESOURCE_MEM,
229 .flags = IORESOURCE_IRQ,
233 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
239 .flags = IORESOURCE_DMA,
243 static struct resource resources_sdc3[] = {
245 .start = MSM_SDC3_PHYS,
246 .end = MSM_SDC3_PHYS + MSM_SDC3_SIZE - 1,
247 .flags = IORESOURCE_MEM,
252 .flags = IORESOURCE_IRQ,
256 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
262 .flags = IORESOURCE_DMA,
266 static struct resource resources_sdc4[] = {
268 .start = MSM_SDC4_PHYS,
269 .end = MSM_SDC4_PHYS + MSM_SDC4_SIZE - 1,
270 .flags = IORESOURCE_MEM,
275 .flags = IORESOURCE_IRQ,
279 .flags = IORESOURCE_IRQ | IORESOURCE_DISABLED,
285 .flags = IORESOURCE_DMA,
289 struct platform_device msm_device_sdc1 = {
292 .num_resources = ARRAY_SIZE(resources_sdc1),
293 .resource = resources_sdc1,
295 .coherent_dma_mask = 0xffffffff,
299 struct platform_device msm_device_sdc2 = {
302 .num_resources = ARRAY_SIZE(resources_sdc2),
303 .resource = resources_sdc2,
305 .coherent_dma_mask = 0xffffffff,
309 struct platform_device msm_device_sdc3 = {
312 .num_resources = ARRAY_SIZE(resources_sdc3),
313 .resource = resources_sdc3,
315 .coherent_dma_mask = 0xffffffff,
319 struct platform_device msm_device_sdc4 = {
322 .num_resources = ARRAY_SIZE(resources_sdc4),
323 .resource = resources_sdc4,
325 .coherent_dma_mask = 0xffffffff,
329 static struct platform_device *msm_sdcc_devices[] __initdata = {
336 int __init msm_add_sdcc(unsigned int controller,
337 struct msm_mmc_platform_data *plat,
338 unsigned int stat_irq, unsigned long stat_irq_flags)
340 struct platform_device *pdev;
341 struct resource *res;
343 if (controller < 1 || controller > 4)
346 pdev = msm_sdcc_devices[controller-1];
347 pdev->dev.platform_data = plat;
349 res = platform_get_resource_byname(pdev, IORESOURCE_IRQ, "status_irq");
353 res->start = res->end = stat_irq;
354 res->flags &= ~IORESOURCE_DISABLED;
355 res->flags |= stat_irq_flags;
358 return platform_device_register(pdev);
361 static struct resource resources_mddi0[] = {
363 .start = MSM_PMDH_PHYS,
364 .end = MSM_PMDH_PHYS + MSM_PMDH_SIZE - 1,
365 .flags = IORESOURCE_MEM,
368 .start = INT_MDDI_PRI,
370 .flags = IORESOURCE_IRQ,
374 static struct resource resources_mddi1[] = {
376 .start = MSM_EMDH_PHYS,
377 .end = MSM_EMDH_PHYS + MSM_EMDH_SIZE - 1,
378 .flags = IORESOURCE_MEM,
381 .start = INT_MDDI_EXT,
383 .flags = IORESOURCE_IRQ,
387 struct platform_device msm_device_mddi0 = {
390 .num_resources = ARRAY_SIZE(resources_mddi0),
391 .resource = resources_mddi0,
393 .coherent_dma_mask = 0xffffffff,
397 struct platform_device msm_device_mddi1 = {
400 .num_resources = ARRAY_SIZE(resources_mddi1),
401 .resource = resources_mddi1,
403 .coherent_dma_mask = 0xffffffff,
407 static struct resource resources_mdp[] = {
409 .start = MSM_MDP_PHYS,
410 .end = MSM_MDP_PHYS + MSM_MDP_SIZE - 1,
412 .flags = IORESOURCE_MEM
417 .flags = IORESOURCE_IRQ,
421 struct platform_device msm_device_mdp = {
424 .num_resources = ARRAY_SIZE(resources_mdp),
425 .resource = resources_mdp,
428 static struct clk_pcom_desc msm_clocks_7x01a[] = {
429 CLK_PCOM("adm_clk", ADM_CLK, NULL, 0),
430 CLK_PCOM("adsp_clk", ADSP_CLK, NULL, 0),
431 CLK_PCOM("ebi1_clk", EBI1_CLK, NULL, 0),
432 CLK_PCOM("ebi2_clk", EBI2_CLK, NULL, 0),
433 CLK_PCOM("ecodec_clk", ECODEC_CLK, NULL, 0),
434 CLK_PCOM("emdh_clk", EMDH_CLK, NULL, OFF),
435 CLK_PCOM("gp_clk", GP_CLK, NULL, 0),
436 CLK_PCOM("grp_clk", GRP_3D_CLK, NULL, OFF),
437 CLK_PCOM("i2c_clk", I2C_CLK, "msm_i2c.0", 0),
438 CLK_PCOM("icodec_rx_clk", ICODEC_RX_CLK, NULL, 0),
439 CLK_PCOM("icodec_tx_clk", ICODEC_TX_CLK, NULL, 0),
440 CLK_PCOM("imem_clk", IMEM_CLK, NULL, OFF),
441 CLK_PCOM("mdc_clk", MDC_CLK, NULL, 0),
442 CLK_PCOM("mdp_clk", MDP_CLK, NULL, OFF),
443 CLK_PCOM("pbus_clk", PBUS_CLK, NULL, 0),
444 CLK_PCOM("pcm_clk", PCM_CLK, NULL, 0),
445 CLK_PCOM("mddi_clk", PMDH_CLK, NULL, OFF | CLK_MINMAX),
446 CLK_PCOM("sdac_clk", SDAC_CLK, NULL, OFF),
447 CLK_PCOM("sdc_clk", SDC1_CLK, "msm_sdcc.1", OFF),
448 CLK_PCOM("sdc_pclk", SDC1_P_CLK, "msm_sdcc.1", OFF),
449 CLK_PCOM("sdc_clk", SDC2_CLK, "msm_sdcc.2", OFF),
450 CLK_PCOM("sdc_pclk", SDC2_P_CLK, "msm_sdcc.2", OFF),
451 CLK_PCOM("sdc_clk", SDC3_CLK, "msm_sdcc.3", OFF),
452 CLK_PCOM("sdc_pclk", SDC3_P_CLK, "msm_sdcc.3", OFF),
453 CLK_PCOM("sdc_clk", SDC4_CLK, "msm_sdcc.4", OFF),
454 CLK_PCOM("sdc_pclk", SDC4_P_CLK, "msm_sdcc.4", OFF),
455 CLK_PCOM("tsif_clk", TSIF_CLK, NULL, 0),
456 CLK_PCOM("tsif_ref_clk", TSIF_REF_CLK, NULL, 0),
457 CLK_PCOM("tv_dac_clk", TV_DAC_CLK, NULL, 0),
458 CLK_PCOM("tv_enc_clk", TV_ENC_CLK, NULL, 0),
459 CLK_PCOM("core", UART1_CLK, "msm_serial.0", OFF),
460 CLK_PCOM("core", UART2_CLK, "msm_serial.1", 0),
461 CLK_PCOM("core", UART3_CLK, "msm_serial.2", OFF),
462 CLK_PCOM("uart1dm_clk", UART1DM_CLK, NULL, OFF),
463 CLK_PCOM("uart2dm_clk", UART2DM_CLK, NULL, 0),
464 CLK_PCOM("usb_hs_clk", USB_HS_CLK, "msm_hsusb", OFF),
465 CLK_PCOM("usb_hs_pclk", USB_HS_P_CLK, "msm_hsusb", OFF),
466 CLK_PCOM("usb_otg_clk", USB_OTG_CLK, NULL, 0),
467 CLK_PCOM("vdc_clk", VDC_CLK, NULL, OFF ),
468 CLK_PCOM("vfe_clk", VFE_CLK, NULL, OFF),
469 CLK_PCOM("vfe_mdc_clk", VFE_MDC_CLK, NULL, OFF),
472 static struct pcom_clk_pdata msm_clock_7x01a_pdata = {
473 .lookup = msm_clocks_7x01a,
474 .num_lookups = ARRAY_SIZE(msm_clocks_7x01a),
477 struct platform_device msm_clock_7x01a = {
478 .name = "msm-clock-pcom",
479 .dev.platform_data = &msm_clock_7x01a_pdata,