2 * linux/arch/arm/plat-omap/sram-fn.S
4 * Functions that need to be run in internal SRAM
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/linkage.h>
13 #include <asm/assembler.h>
16 #include <mach/hardware.h>
23 * Reprograms ULPD and CKCTL.
26 ENTRY(omap1_sram_reprogram_clock)
27 stmfd sp!, {r0 - r12, lr} @ save registers on stack
29 mov r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0xff000000
30 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x00ff0000
31 orr r2, r2, #OMAP1_IO_ADDRESS(DPLL_CTL) & 0x0000ff00
33 mov r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0xff000000
34 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x00ff0000
35 orr r3, r3, #OMAP1_IO_ADDRESS(ARM_CKCTL) & 0x0000ff00
37 tst r0, #1 << 4 @ want lock mode?
39 bic r0, r0, #1 << 4 @ else clear lock bit
40 strh r0, [r2] @ set dpll into bypass mode
41 orr r0, r0, #1 << 4 @ set lock bit again
44 strh r1, [r3] @ write new ckctl value
45 strh r0, [r2] @ write new dpll value
47 mov r4, #0x0700 @ let the clocks settle
53 lock: ldrh r4, [r2], #0 @ read back dpll value
54 tst r0, #1 << 4 @ want lock mode?
56 tst r4, #1 << 0 @ dpll rate locked?
60 ldmfd sp!, {r0 - r12, pc} @ restore regs and return
61 ENTRY(omap1_sram_reprogram_clock_sz)
62 .word . - omap1_sram_reprogram_clock