arch/arm/mach-omap2/board-3430sdp.c

   1 /*
   2  * linux/arch/arm/mach-omap2/board-3430sdp.c
   3  *
   4  * Copyright (C) 2007 Texas Instruments
   5  *
   6  * Modified from mach-omap2/board-generic.c
   7  *
   8  * Initial code: Syed Mohammed Khasim
   9  *
  10  * This program is free software; you can redistribute it and/or modify
  11  * it under the terms of the GNU General Public License version 2 as
  12  * published by the Free Software Foundation.
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/init.h>
  17 #include <linux/platform_device.h>
  18 #include <linux/delay.h>
  19 #include <linux/input.h>
  20 #include <linux/input/matrix_keypad.h>
  21 #include <linux/spi/spi.h>
  22 #include <linux/i2c/twl.h>
  23 #include <linux/regulator/machine.h>
  24 #include <linux/io.h>
  25 #include <linux/gpio.h>
  26 #include <linux/mmc/host.h>
  27 #include <linux/platform_data/spi-omap2-mcspi.h>
  28 #include <linux/platform_data/omap-twl4030.h>
  29
  30 #include <asm/mach-types.h>
  31 #include <asm/mach/arch.h>
  32 #include <asm/mach/map.h>
  33
  34 #include "common.h"
  35 #include <linux/omap-dma.h>
  36 #include <video/omapdss.h>
  37 #include <video/omap-panel-tfp410.h>
  38
  39 #include "gpmc.h"
  40 #include "gpmc-smc91x.h"
  41
  42 #include "soc.h"
  43 #include "board-flash.h"
  44 #include "mux.h"
  45 #include "sdram-qimonda-hyb18m512160af-6.h"
  46 #include "hsmmc.h"
  47 #include "pm.h"
  48 #include "control.h"
  49 #include "common-board-devices.h"
  50
  51 #define CONFIG_DISABLE_HFCLK 1
  52
  53 #define SDP3430_TS_GPIO_IRQ_SDPV1       3
  54 #define SDP3430_TS_GPIO_IRQ_SDPV2       2
  55
  56 #define ENABLE_VAUX3_DEDICATED  0x03
  57 #define ENABLE_VAUX3_DEV_GRP    0x20
  58
  59 #define TWL4030_MSECURE_GPIO 22
  60
  61 static uint32_t board_keymap[] = {
  62         KEY(0, 0, KEY_LEFT),
  63         KEY(0, 1, KEY_RIGHT),
  64         KEY(0, 2, KEY_A),
  65         KEY(0, 3, KEY_B),
  66         KEY(0, 4, KEY_C),
  67         KEY(1, 0, KEY_DOWN),
  68         KEY(1, 1, KEY_UP),
  69         KEY(1, 2, KEY_E),
  70         KEY(1, 3, KEY_F),
  71         KEY(1, 4, KEY_G),
  72         KEY(2, 0, KEY_ENTER),
  73         KEY(2, 1, KEY_I),
  74         KEY(2, 2, KEY_J),
  75         KEY(2, 3, KEY_K),
  76         KEY(2, 4, KEY_3),
  77         KEY(3, 0, KEY_M),
  78         KEY(3, 1, KEY_N),
  79         KEY(3, 2, KEY_O),
  80         KEY(3, 3, KEY_P),
  81         KEY(3, 4, KEY_Q),
  82         KEY(4, 0, KEY_R),
  83         KEY(4, 1, KEY_4),
  84         KEY(4, 2, KEY_T),
  85         KEY(4, 3, KEY_U),
  86         KEY(4, 4, KEY_D),
  87         KEY(5, 0, KEY_V),
  88         KEY(5, 1, KEY_W),
  89         KEY(5, 2, KEY_L),
  90         KEY(5, 3, KEY_S),
  91         KEY(5, 4, KEY_H),
  92         0
  93 };
  94
  95 static struct matrix_keymap_data board_map_data = {
  96         .keymap                 = board_keymap,
  97         .keymap_size            = ARRAY_SIZE(board_keymap),
  98 };
  99
 100 static struct twl4030_keypad_data sdp3430_kp_data = {
 101         .keymap_data    = &board_map_data,
 102         .rows           = 5,
 103         .cols           = 6,
 104         .rep            = 1,
 105 };
 106
 107 #define SDP3430_LCD_PANEL_BACKLIGHT_GPIO        8
 108 #define SDP3430_LCD_PANEL_ENABLE_GPIO           5
 109
 110 static struct gpio sdp3430_dss_gpios[] __initdata = {
 111         {SDP3430_LCD_PANEL_ENABLE_GPIO,    GPIOF_OUT_INIT_LOW, "LCD reset"    },
 112         {SDP3430_LCD_PANEL_BACKLIGHT_GPIO, GPIOF_OUT_INIT_LOW, "LCD Backlight"},
 113 };
 114
 115 static void __init sdp3430_display_init(void)
 116 {
 117         int r;
 118
 119         r = gpio_request_array(sdp3430_dss_gpios,
 120                                ARRAY_SIZE(sdp3430_dss_gpios));
 121         if (r)
 122                 printk(KERN_ERR "failed to get LCD control GPIOs\n");
 123
 124 }
 125
 126 static int sdp3430_panel_enable_lcd(struct omap_dss_device *dssdev)
 127 {
 128         gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 1);
 129         gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 1);
 130
 131         return 0;
 132 }
 133
 134 static void sdp3430_panel_disable_lcd(struct omap_dss_device *dssdev)
 135 {
 136         gpio_direction_output(SDP3430_LCD_PANEL_ENABLE_GPIO, 0);
 137         gpio_direction_output(SDP3430_LCD_PANEL_BACKLIGHT_GPIO, 0);
 138 }
 139
 140 static int sdp3430_panel_enable_tv(struct omap_dss_device *dssdev)
 141 {
 142         return 0;
 143 }
 144
 145 static void sdp3430_panel_disable_tv(struct omap_dss_device *dssdev)
 146 {
 147 }
 148
 149
 150 static struct omap_dss_device sdp3430_lcd_device = {
 151         .name                   = "lcd",
 152         .driver_name            = "sharp_ls_panel",
 153         .type                   = OMAP_DISPLAY_TYPE_DPI,
 154         .phy.dpi.data_lines     = 16,
 155         .platform_enable        = sdp3430_panel_enable_lcd,
 156         .platform_disable       = sdp3430_panel_disable_lcd,
 157 };
 158
 159 static struct tfp410_platform_data dvi_panel = {
 160         .power_down_gpio        = -1,
 161         .i2c_bus_num            = -1,
 162 };
 163
 164 static struct omap_dss_device sdp3430_dvi_device = {
 165         .name                   = "dvi",
 166         .type                   = OMAP_DISPLAY_TYPE_DPI,
 167         .driver_name            = "tfp410",
 168         .data                   = &dvi_panel,
 169         .phy.dpi.data_lines     = 24,
 170 };
 171
 172 static struct omap_dss_device sdp3430_tv_device = {
 173         .name                   = "tv",
 174         .driver_name            = "venc",
 175         .type                   = OMAP_DISPLAY_TYPE_VENC,
 176         .phy.venc.type          = OMAP_DSS_VENC_TYPE_SVIDEO,
 177         .platform_enable        = sdp3430_panel_enable_tv,
 178         .platform_disable       = sdp3430_panel_disable_tv,
 179 };
 180
 181
 182 static struct omap_dss_device *sdp3430_dss_devices[] = {
 183         &sdp3430_lcd_device,
 184         &sdp3430_dvi_device,
 185         &sdp3430_tv_device,
 186 };
 187
 188 static struct omap_dss_board_info sdp3430_dss_data = {
 189         .num_devices    = ARRAY_SIZE(sdp3430_dss_devices),
 190         .devices        = sdp3430_dss_devices,
 191         .default_device = &sdp3430_lcd_device,
 192 };
 193
 194 static struct omap2_hsmmc_info mmc[] = {
 195         {
 196                 .mmc            = 1,
 197                 /* 8 bits (default) requires S6.3 == ON,
 198                  * so the SIM card isn't used; else 4 bits.
 199                  */
 200                 .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
 201                 .gpio_wp        = 4,
 202                 .deferred       = true,
 203         },
 204         {
 205                 .mmc            = 2,
 206                 .caps           = MMC_CAP_4_BIT_DATA | MMC_CAP_8_BIT_DATA,
 207                 .gpio_wp        = 7,
 208                 .deferred       = true,
 209         },
 210         {}      /* Terminator */
 211 };
 212
 213 static struct omap_tw4030_pdata omap_twl4030_audio_data = {
 214         .voice_connected = true,
 215         .custom_routing = true,
 216
 217         .has_hs         = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
 218         .has_hf         = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
 219
 220         .has_mainmic    = true,
 221         .has_submic     = true,
 222         .has_hsmic      = true,
 223         .has_linein     = OMAP_TWL4030_LEFT | OMAP_TWL4030_RIGHT,
 224 };
 225
 226 static int sdp3430_twl_gpio_setup(struct device *dev,
 227                 unsigned gpio, unsigned ngpio)
 228 {
 229         /* gpio + 0 is "mmc0_cd" (input/IRQ),
 230          * gpio + 1 is "mmc1_cd" (input/IRQ)
 231          */
 232         mmc[0].gpio_cd = gpio + 0;
 233         mmc[1].gpio_cd = gpio + 1;
 234         omap_hsmmc_late_init(mmc);
 235
 236         /* gpio + 7 is "sub_lcd_en_bkl" (output/PWM1) */
 237         gpio_request_one(gpio + 7, GPIOF_OUT_INIT_LOW, "sub_lcd_en_bkl");
 238
 239         /* gpio + 15 is "sub_lcd_nRST" (output) */
 240         gpio_request_one(gpio + 15, GPIOF_OUT_INIT_LOW, "sub_lcd_nRST");
 241
 242         omap_twl4030_audio_data.jack_detect = gpio + 2;
 243         omap_twl4030_audio_init("SDP3430", &omap_twl4030_audio_data);
 244
 245         return 0;
 246 }
 247
 248 static struct twl4030_gpio_platform_data sdp3430_gpio_data = {
 249         .pulldowns      = BIT(2) | BIT(6) | BIT(8) | BIT(13)
 250                                 | BIT(16) | BIT(17),
 251         .setup          = sdp3430_twl_gpio_setup,
 252 };
 253
 254 /* regulator consumer mappings */
 255
 256 /* ads7846 on SPI */
 257 static struct regulator_consumer_supply sdp3430_vaux3_supplies[] = {
 258         REGULATOR_SUPPLY("vcc", "spi1.0"),
 259 };
 260
 261 static struct regulator_consumer_supply sdp3430_vmmc1_supplies[] = {
 262         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.0"),
 263 };
 264
 265 static struct regulator_consumer_supply sdp3430_vsim_supplies[] = {
 266         REGULATOR_SUPPLY("vmmc_aux", "omap_hsmmc.0"),
 267 };
 268
 269 static struct regulator_consumer_supply sdp3430_vmmc2_supplies[] = {
 270         REGULATOR_SUPPLY("vmmc", "omap_hsmmc.1"),
 271 };
 272
 273 /*
 274  * Apply all the fixed voltages since most versions of U-Boot
 275  * don't bother with that initialization.
 276  */
 277
 278 /* VAUX1 for mainboard (irda and sub-lcd) */
 279 static struct regulator_init_data sdp3430_vaux1 = {
 280         .constraints = {
 281                 .min_uV                 = 2800000,
 282                 .max_uV                 = 2800000,
 283                 .apply_uV               = true,
 284                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 285                                         | REGULATOR_MODE_STANDBY,
 286                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 287                                         | REGULATOR_CHANGE_STATUS,
 288         },
 289 };
 290
 291 /* VAUX2 for camera module */
 292 static struct regulator_init_data sdp3430_vaux2 = {
 293         .constraints = {
 294                 .min_uV                 = 2800000,
 295                 .max_uV                 = 2800000,
 296                 .apply_uV               = true,
 297                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 298                                         | REGULATOR_MODE_STANDBY,
 299                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 300                                         | REGULATOR_CHANGE_STATUS,
 301         },
 302 };
 303
 304 /* VAUX3 for LCD board */
 305 static struct regulator_init_data sdp3430_vaux3 = {
 306         .constraints = {
 307                 .min_uV                 = 2800000,
 308                 .max_uV                 = 2800000,
 309                 .apply_uV               = true,
 310                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 311                                         | REGULATOR_MODE_STANDBY,
 312                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 313                                         | REGULATOR_CHANGE_STATUS,
 314         },
 315         .num_consumer_supplies          = ARRAY_SIZE(sdp3430_vaux3_supplies),
 316         .consumer_supplies              = sdp3430_vaux3_supplies,
 317 };
 318
 319 /* VAUX4 for OMAP VDD_CSI2 (camera) */
 320 static struct regulator_init_data sdp3430_vaux4 = {
 321         .constraints = {
 322                 .min_uV                 = 1800000,
 323                 .max_uV                 = 1800000,
 324                 .apply_uV               = true,
 325                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 326                                         | REGULATOR_MODE_STANDBY,
 327                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 328                                         | REGULATOR_CHANGE_STATUS,
 329         },
 330 };
 331
 332 /* VMMC1 for OMAP VDD_MMC1 (i/o) and MMC1 card */
 333 static struct regulator_init_data sdp3430_vmmc1 = {
 334         .constraints = {
 335                 .min_uV                 = 1850000,
 336                 .max_uV                 = 3150000,
 337                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 338                                         | REGULATOR_MODE_STANDBY,
 339                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
 340                                         | REGULATOR_CHANGE_MODE
 341                                         | REGULATOR_CHANGE_STATUS,
 342         },
 343         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vmmc1_supplies),
 344         .consumer_supplies      = sdp3430_vmmc1_supplies,
 345 };
 346
 347 /* VMMC2 for MMC2 card */
 348 static struct regulator_init_data sdp3430_vmmc2 = {
 349         .constraints = {
 350                 .min_uV                 = 1850000,
 351                 .max_uV                 = 1850000,
 352                 .apply_uV               = true,
 353                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 354                                         | REGULATOR_MODE_STANDBY,
 355                 .valid_ops_mask         = REGULATOR_CHANGE_MODE
 356                                         | REGULATOR_CHANGE_STATUS,
 357         },
 358         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vmmc2_supplies),
 359         .consumer_supplies      = sdp3430_vmmc2_supplies,
 360 };
 361
 362 /* VSIM for OMAP VDD_MMC1A (i/o for DAT4..DAT7) */
 363 static struct regulator_init_data sdp3430_vsim = {
 364         .constraints = {
 365                 .min_uV                 = 1800000,
 366                 .max_uV                 = 3000000,
 367                 .valid_modes_mask       = REGULATOR_MODE_NORMAL
 368                                         | REGULATOR_MODE_STANDBY,
 369                 .valid_ops_mask         = REGULATOR_CHANGE_VOLTAGE
 370                                         | REGULATOR_CHANGE_MODE
 371                                         | REGULATOR_CHANGE_STATUS,
 372         },
 373         .num_consumer_supplies  = ARRAY_SIZE(sdp3430_vsim_supplies),
 374         .consumer_supplies      = sdp3430_vsim_supplies,
 375 };
 376
 377 static struct twl4030_platform_data sdp3430_twldata = {
 378         /* platform_data for children goes here */
 379         .gpio           = &sdp3430_gpio_data,
 380         .keypad         = &sdp3430_kp_data,
 381
 382         .vaux1          = &sdp3430_vaux1,
 383         .vaux2          = &sdp3430_vaux2,
 384         .vaux3          = &sdp3430_vaux3,
 385         .vaux4          = &sdp3430_vaux4,
 386         .vmmc1          = &sdp3430_vmmc1,
 387         .vmmc2          = &sdp3430_vmmc2,
 388         .vsim           = &sdp3430_vsim,
 389 };
 390
 391 static int __init omap3430_i2c_init(void)
 392 {
 393         /* i2c1 for PMIC only */
 394         omap3_pmic_get_config(&sdp3430_twldata,
 395                         TWL_COMMON_PDATA_USB | TWL_COMMON_PDATA_BCI |
 396                         TWL_COMMON_PDATA_MADC | TWL_COMMON_PDATA_AUDIO,
 397                         TWL_COMMON_REGULATOR_VDAC | TWL_COMMON_REGULATOR_VPLL2);
 398         sdp3430_twldata.vdac->constraints.apply_uV = true;
 399         sdp3430_twldata.vpll2->constraints.apply_uV = true;
 400         sdp3430_twldata.vpll2->constraints.name = "VDVI";
 401
 402         sdp3430_twldata.audio->codec->hs_extmute = 1;
 403         sdp3430_twldata.audio->codec->hs_extmute_gpio = -EINVAL;
 404
 405         omap3_pmic_init("twl4030", &sdp3430_twldata);
 406
 407         /* i2c2 on camera connector (for sensor control) and optional isp1301 */
 408         omap_register_i2c_bus(2, 400, NULL, 0);
 409         /* i2c3 on display connector (for DVI, tfp410) */
 410         omap_register_i2c_bus(3, 400, NULL, 0);
 411         return 0;
 412 }
 413
 414 #if defined(CONFIG_SMC91X) || defined(CONFIG_SMC91X_MODULE)
 415
 416 static struct omap_smc91x_platform_data board_smc91x_data = {
 417         .cs             = 3,
 418         .flags          = GPMC_MUX_ADD_DATA | GPMC_TIMINGS_SMC91C96 |
 419                                 IORESOURCE_IRQ_LOWLEVEL,
 420 };
 421
 422 static void __init board_smc91x_init(void)
 423 {
 424         if (omap_rev() > OMAP3430_REV_ES1_0)
 425                 board_smc91x_data.gpio_irq = 6;
 426         else
 427                 board_smc91x_data.gpio_irq = 29;
 428
 429         gpmc_smc91x_init(&board_smc91x_data);
 430 }
 431
 432 #else
 433
 434 static inline void board_smc91x_init(void)
 435 {
 436 }
 437
 438 #endif
 439
 440 static void enable_board_wakeup_source(void)
 441 {
 442         /* T2 interrupt line (keypad) */
 443         omap_mux_init_signal("sys_nirq",
 444                 OMAP_WAKEUP_EN | OMAP_PIN_INPUT_PULLUP);
 445 }
 446
 447 static const struct usbhs_omap_board_data usbhs_bdata __initconst = {
 448
 449         .port_mode[0] = OMAP_EHCI_PORT_MODE_PHY,
 450         .port_mode[1] = OMAP_EHCI_PORT_MODE_PHY,
 451         .port_mode[2] = OMAP_USBHS_PORT_MODE_UNUSED,
 452
 453         .phy_reset  = true,
 454         .reset_gpio_port[0]  = 57,
 455         .reset_gpio_port[1]  = 61,
 456         .reset_gpio_port[2]  = -EINVAL
 457 };
 458
 459 #ifdef CONFIG_OMAP_MUX
 460 static struct omap_board_mux board_mux[] __initdata = {
 461         { .reg_offset = OMAP_MUX_TERMINATOR },
 462 };
 463 #else
 464 #define board_mux       NULL
 465 #endif
 466
 467 /*
 468  * SDP3430 V2 Board CS organization
 469  * Different from SDP3430 V1. Now 4 switches used to specify CS
 470  *
 471  * See also the Switch S8 settings in the comments.
 472  */
 473 static char chip_sel_3430[][GPMC_CS_NUM] = {
 474         {PDC_NOR, PDC_NAND, PDC_ONENAND, DBG_MPDB, 0, 0, 0, 0}, /* S8:1111 */
 475         {PDC_ONENAND, PDC_NAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1110 */
 476         {PDC_NAND, PDC_ONENAND, PDC_NOR, DBG_MPDB, 0, 0, 0, 0}, /* S8:1101 */
 477 };
 478
 479 static struct mtd_partition sdp_nor_partitions[] = {
 480         /* bootloader (U-Boot, etc) in first sector */
 481         {
 482                 .name           = "Bootloader-NOR",
 483                 .offset         = 0,
 484                 .size           = SZ_256K,
 485                 .mask_flags     = MTD_WRITEABLE, /* force read-only */
 486         },
 487         /* bootloader params in the next sector */
 488         {
 489                 .name           = "Params-NOR",
 490                 .offset         = MTDPART_OFS_APPEND,
 491                 .size           = SZ_256K,
 492                 .mask_flags     = 0,
 493         },
 494         /* kernel */
 495         {
 496                 .name           = "Kernel-NOR",
 497                 .offset         = MTDPART_OFS_APPEND,
 498                 .size           = SZ_2M,
 499                 .mask_flags     = 0
 500         },
 501         /* file system */
 502         {
 503                 .name           = "Filesystem-NOR",
 504                 .offset         = MTDPART_OFS_APPEND,
 505                 .size           = MTDPART_SIZ_FULL,
 506                 .mask_flags     = 0
 507         }
 508 };
 509
 510 static struct mtd_partition sdp_onenand_partitions[] = {
 511         {
 512                 .name           = "X-Loader-OneNAND",
 513                 .offset         = 0,
 514                 .size           = 4 * (64 * 2048),
 515                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
 516         },
 517         {
 518                 .name           = "U-Boot-OneNAND",
 519                 .offset         = MTDPART_OFS_APPEND,
 520                 .size           = 2 * (64 * 2048),
 521                 .mask_flags     = MTD_WRITEABLE  /* force read-only */
 522         },
 523         {
 524                 .name           = "U-Boot Environment-OneNAND",
 525                 .offset         = MTDPART_OFS_APPEND,
 526                 .size           = 1 * (64 * 2048),
 527         },
 528         {
 529                 .name           = "Kernel-OneNAND",
 530                 .offset         = MTDPART_OFS_APPEND,
 531                 .size           = 16 * (64 * 2048),
 532         },
 533         {
 534                 .name           = "File System-OneNAND",
 535                 .offset         = MTDPART_OFS_APPEND,
 536                 .size           = MTDPART_SIZ_FULL,
 537         },
 538 };
 539
 540 static struct mtd_partition sdp_nand_partitions[] = {
 541         /* All the partition sizes are listed in terms of NAND block size */
 542         {
 543                 .name           = "X-Loader-NAND",
 544                 .offset         = 0,
 545                 .size           = 4 * (64 * 2048),
 546                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 547         },
 548         {
 549                 .name           = "U-Boot-NAND",
 550                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x80000 */
 551                 .size           = 10 * (64 * 2048),
 552                 .mask_flags     = MTD_WRITEABLE,        /* force read-only */
 553         },
 554         {
 555                 .name           = "Boot Env-NAND",
 556
 557                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x1c0000 */
 558                 .size           = 6 * (64 * 2048),
 559         },
 560         {
 561                 .name           = "Kernel-NAND",
 562                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x280000 */
 563                 .size           = 40 * (64 * 2048),
 564         },
 565         {
 566                 .name           = "File System - NAND",
 567                 .size           = MTDPART_SIZ_FULL,
 568                 .offset         = MTDPART_OFS_APPEND,   /* Offset = 0x780000 */
 569         },
 570 };
 571
 572 static struct flash_partitions sdp_flash_partitions[] = {
 573         {
 574                 .parts = sdp_nor_partitions,
 575                 .nr_parts = ARRAY_SIZE(sdp_nor_partitions),
 576         },
 577         {
 578                 .parts = sdp_onenand_partitions,
 579                 .nr_parts = ARRAY_SIZE(sdp_onenand_partitions),
 580         },
 581         {
 582                 .parts = sdp_nand_partitions,
 583                 .nr_parts = ARRAY_SIZE(sdp_nand_partitions),
 584         },
 585 };
 586
 587 static void __init omap_3430sdp_init(void)
 588 {
 589         int gpio_pendown;
 590
 591         omap3_mux_init(board_mux, OMAP_PACKAGE_CBB);
 592         omap_hsmmc_init(mmc);
 593         omap3430_i2c_init();
 594         omap_display_init(&sdp3430_dss_data);
 595         if (omap_rev() > OMAP3430_REV_ES1_0)
 596                 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV2;
 597         else
 598                 gpio_pendown = SDP3430_TS_GPIO_IRQ_SDPV1;
 599         omap_ads7846_init(1, gpio_pendown, 310, NULL);
 600         omap_serial_init();
 601         omap_sdrc_init(hyb18m512160af6_sdrc_params, NULL);
 602         usb_musb_init(NULL);
 603         board_smc91x_init();
 604         board_flash_init(sdp_flash_partitions, chip_sel_3430, 0);
 605         sdp3430_display_init();
 606         enable_board_wakeup_source();
 607         usbhs_init(&usbhs_bdata);
 608 }
 609
 610 MACHINE_START(OMAP_3430SDP, "OMAP3430 3430SDP board")
 611         /* Maintainer: Syed Khasim - Texas Instruments Inc */
 612         .atag_offset    = 0x100,
 613         .reserve        = omap_reserve,
 614         .map_io         = omap3_map_io,
 615         .init_early     = omap3430_init_early,
 616         .init_irq       = omap3_init_irq,
 617         .handle_irq     = omap3_intc_handle_irq,
 618         .init_machine   = omap_3430sdp_init,
 619         .init_late      = omap3430_init_late,
 620         .timer          = &omap3_timer,
 621         .restart        = omap3xxx_restart,
 622 MACHINE_END