arch/arm/mach-omap2/devices.c

   1 /*
   2  * linux/arch/arm/mach-omap2/devices.c
   3  *
   4  * OMAP2 platform device setup/initialization
   5  *
   6  * This program is free software; you can redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; either version 2 of the License, or
   9  * (at your option) any later version.
  10  */
  11
  12 #include <linux/module.h>
  13 #include <linux/kernel.h>
  14 #include <linux/init.h>
  15 #include <linux/platform_device.h>
  16 #include <linux/io.h>
  17 #include <linux/clk.h>
  18
  19 #include <mach/hardware.h>
  20 #include <mach/irqs.h>
  21 #include <asm/mach-types.h>
  22 #include <asm/mach/map.h>
  23 #include <asm/pmu.h>
  24
  25 #include <plat/control.h>
  26 #include <plat/tc.h>
  27 #include <plat/board.h>
  28 #include <plat/mux.h>
  29 #include <mach/gpio.h>
  30 #include <plat/mmc.h>
  31 #include <plat/dma.h>
  32 #include <plat/mcbsp.h>
  33
  34 #include "mux.h"
  35
  36 #if defined(CONFIG_VIDEO_OMAP2) || defined(CONFIG_VIDEO_OMAP2_MODULE)
  37
  38 static struct resource cam_resources[] = {
  39         {
  40                 .start          = OMAP24XX_CAMERA_BASE,
  41                 .end            = OMAP24XX_CAMERA_BASE + 0xfff,
  42                 .flags          = IORESOURCE_MEM,
  43         },
  44         {
  45                 .start          = INT_24XX_CAM_IRQ,
  46                 .flags          = IORESOURCE_IRQ,
  47         }
  48 };
  49
  50 static struct platform_device omap_cam_device = {
  51         .name           = "omap24xxcam",
  52         .id             = -1,
  53         .num_resources  = ARRAY_SIZE(cam_resources),
  54         .resource       = cam_resources,
  55 };
  56
  57 static inline void omap_init_camera(void)
  58 {
  59         platform_device_register(&omap_cam_device);
  60 }
  61
  62 #elif defined(CONFIG_VIDEO_OMAP3) || defined(CONFIG_VIDEO_OMAP3_MODULE)
  63
  64 static struct resource omap3isp_resources[] = {
  65         {
  66                 .start          = OMAP3430_ISP_BASE,
  67                 .end            = OMAP3430_ISP_END,
  68                 .flags          = IORESOURCE_MEM,
  69         },
  70         {
  71                 .start          = OMAP3430_ISP_CBUFF_BASE,
  72                 .end            = OMAP3430_ISP_CBUFF_END,
  73                 .flags          = IORESOURCE_MEM,
  74         },
  75         {
  76                 .start          = OMAP3430_ISP_CCP2_BASE,
  77                 .end            = OMAP3430_ISP_CCP2_END,
  78                 .flags          = IORESOURCE_MEM,
  79         },
  80         {
  81                 .start          = OMAP3430_ISP_CCDC_BASE,
  82                 .end            = OMAP3430_ISP_CCDC_END,
  83                 .flags          = IORESOURCE_MEM,
  84         },
  85         {
  86                 .start          = OMAP3430_ISP_HIST_BASE,
  87                 .end            = OMAP3430_ISP_HIST_END,
  88                 .flags          = IORESOURCE_MEM,
  89         },
  90         {
  91                 .start          = OMAP3430_ISP_H3A_BASE,
  92                 .end            = OMAP3430_ISP_H3A_END,
  93                 .flags          = IORESOURCE_MEM,
  94         },
  95         {
  96                 .start          = OMAP3430_ISP_PREV_BASE,
  97                 .end            = OMAP3430_ISP_PREV_END,
  98                 .flags          = IORESOURCE_MEM,
  99         },
 100         {
 101                 .start          = OMAP3430_ISP_RESZ_BASE,
 102                 .end            = OMAP3430_ISP_RESZ_END,
 103                 .flags          = IORESOURCE_MEM,
 104         },
 105         {
 106                 .start          = OMAP3430_ISP_SBL_BASE,
 107                 .end            = OMAP3430_ISP_SBL_END,
 108                 .flags          = IORESOURCE_MEM,
 109         },
 110         {
 111                 .start          = OMAP3430_ISP_CSI2A_BASE,
 112                 .end            = OMAP3430_ISP_CSI2A_END,
 113                 .flags          = IORESOURCE_MEM,
 114         },
 115         {
 116                 .start          = OMAP3430_ISP_CSI2PHY_BASE,
 117                 .end            = OMAP3430_ISP_CSI2PHY_END,
 118                 .flags          = IORESOURCE_MEM,
 119         },
 120         {
 121                 .start          = INT_34XX_CAM_IRQ,
 122                 .flags          = IORESOURCE_IRQ,
 123         }
 124 };
 125
 126 static struct platform_device omap3isp_device = {
 127         .name           = "omap3isp",
 128         .id             = -1,
 129         .num_resources  = ARRAY_SIZE(omap3isp_resources),
 130         .resource       = omap3isp_resources,
 131 };
 132
 133 static inline void omap_init_camera(void)
 134 {
 135         platform_device_register(&omap3isp_device);
 136 }
 137 #else
 138 static inline void omap_init_camera(void)
 139 {
 140 }
 141 #endif
 142
 143 #if defined(CONFIG_OMAP_MBOX_FWK) || defined(CONFIG_OMAP_MBOX_FWK_MODULE)
 144
 145 #define MBOX_REG_SIZE   0x120
 146
 147 #ifdef CONFIG_ARCH_OMAP2
 148 static struct resource omap2_mbox_resources[] = {
 149         {
 150                 .start          = OMAP24XX_MAILBOX_BASE,
 151                 .end            = OMAP24XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 152                 .flags          = IORESOURCE_MEM,
 153         },
 154         {
 155                 .start          = INT_24XX_MAIL_U0_MPU,
 156                 .flags          = IORESOURCE_IRQ,
 157         },
 158         {
 159                 .start          = INT_24XX_MAIL_U3_MPU,
 160                 .flags          = IORESOURCE_IRQ,
 161         },
 162 };
 163 static int omap2_mbox_resources_sz = ARRAY_SIZE(omap2_mbox_resources);
 164 #else
 165 #define omap2_mbox_resources            NULL
 166 #define omap2_mbox_resources_sz         0
 167 #endif
 168
 169 #ifdef CONFIG_ARCH_OMAP3
 170 static struct resource omap3_mbox_resources[] = {
 171         {
 172                 .start          = OMAP34XX_MAILBOX_BASE,
 173                 .end            = OMAP34XX_MAILBOX_BASE + MBOX_REG_SIZE - 1,
 174                 .flags          = IORESOURCE_MEM,
 175         },
 176         {
 177                 .start          = INT_24XX_MAIL_U0_MPU,
 178                 .flags          = IORESOURCE_IRQ,
 179         },
 180 };
 181 static int omap3_mbox_resources_sz = ARRAY_SIZE(omap3_mbox_resources);
 182 #else
 183 #define omap3_mbox_resources            NULL
 184 #define omap3_mbox_resources_sz         0
 185 #endif
 186
 187 #ifdef CONFIG_ARCH_OMAP4
 188
 189 #define OMAP4_MBOX_REG_SIZE     0x130
 190 static struct resource omap4_mbox_resources[] = {
 191         {
 192                 .start          = OMAP44XX_MAILBOX_BASE,
 193                 .end            = OMAP44XX_MAILBOX_BASE +
 194                                         OMAP4_MBOX_REG_SIZE - 1,
 195                 .flags          = IORESOURCE_MEM,
 196         },
 197         {
 198                 .start          = OMAP44XX_IRQ_MAIL_U0,
 199                 .flags          = IORESOURCE_IRQ,
 200         },
 201 };
 202 static int omap4_mbox_resources_sz = ARRAY_SIZE(omap4_mbox_resources);
 203 #else
 204 #define omap4_mbox_resources            NULL
 205 #define omap4_mbox_resources_sz         0
 206 #endif
 207
 208 static struct platform_device mbox_device = {
 209         .name           = "omap2-mailbox",
 210         .id             = -1,
 211 };
 212
 213 static inline void omap_init_mbox(void)
 214 {
 215         if (cpu_is_omap24xx()) {
 216                 mbox_device.resource = omap2_mbox_resources;
 217                 mbox_device.num_resources = omap2_mbox_resources_sz;
 218         } else if (cpu_is_omap34xx()) {
 219                 mbox_device.resource = omap3_mbox_resources;
 220                 mbox_device.num_resources = omap3_mbox_resources_sz;
 221         } else if (cpu_is_omap44xx()) {
 222                 mbox_device.resource = omap4_mbox_resources;
 223                 mbox_device.num_resources = omap4_mbox_resources_sz;
 224         } else {
 225                 pr_err("%s: platform not supported\n", __func__);
 226                 return;
 227         }
 228         platform_device_register(&mbox_device);
 229 }
 230 #else
 231 static inline void omap_init_mbox(void) { }
 232 #endif /* CONFIG_OMAP_MBOX_FWK */
 233
 234 #if defined(CONFIG_OMAP_STI)
 235
 236 #if defined(CONFIG_ARCH_OMAP2)
 237
 238 #define OMAP2_STI_BASE          0x48068000
 239 #define OMAP2_STI_CHANNEL_BASE  0x54000000
 240 #define OMAP2_STI_IRQ           4
 241
 242 static struct resource sti_resources[] = {
 243         {
 244                 .start          = OMAP2_STI_BASE,
 245                 .end            = OMAP2_STI_BASE + 0x7ff,
 246                 .flags          = IORESOURCE_MEM,
 247         },
 248         {
 249                 .start          = OMAP2_STI_CHANNEL_BASE,
 250                 .end            = OMAP2_STI_CHANNEL_BASE + SZ_64K - 1,
 251                 .flags          = IORESOURCE_MEM,
 252         },
 253         {
 254                 .start          = OMAP2_STI_IRQ,
 255                 .flags          = IORESOURCE_IRQ,
 256         }
 257 };
 258 #elif defined(CONFIG_ARCH_OMAP3)
 259
 260 #define OMAP3_SDTI_BASE         0x54500000
 261 #define OMAP3_SDTI_CHANNEL_BASE 0x54600000
 262
 263 static struct resource sti_resources[] = {
 264         {
 265                 .start          = OMAP3_SDTI_BASE,
 266                 .end            = OMAP3_SDTI_BASE + 0xFFF,
 267                 .flags          = IORESOURCE_MEM,
 268         },
 269         {
 270                 .start          = OMAP3_SDTI_CHANNEL_BASE,
 271                 .end            = OMAP3_SDTI_CHANNEL_BASE + SZ_1M - 1,
 272                 .flags          = IORESOURCE_MEM,
 273         }
 274 };
 275
 276 #endif
 277
 278 static struct platform_device sti_device = {
 279         .name           = "sti",
 280         .id             = -1,
 281         .num_resources  = ARRAY_SIZE(sti_resources),
 282         .resource       = sti_resources,
 283 };
 284
 285 static inline void omap_init_sti(void)
 286 {
 287         platform_device_register(&sti_device);
 288 }
 289 #else
 290 static inline void omap_init_sti(void) {}
 291 #endif
 292
 293 #if defined(CONFIG_SND_SOC) || defined(CONFIG_SND_SOC_MODULE)
 294
 295 static struct platform_device omap_pcm = {
 296         .name   = "omap-pcm-audio",
 297         .id     = -1,
 298 };
 299
 300 /*
 301  * OMAP2420 has 2 McBSP ports
 302  * OMAP2430 has 5 McBSP ports
 303  * OMAP3 has 5 McBSP ports
 304  * OMAP4 has 4 McBSP ports
 305  */
 306 OMAP_MCBSP_PLATFORM_DEVICE(1);
 307 OMAP_MCBSP_PLATFORM_DEVICE(2);
 308 OMAP_MCBSP_PLATFORM_DEVICE(3);
 309 OMAP_MCBSP_PLATFORM_DEVICE(4);
 310 OMAP_MCBSP_PLATFORM_DEVICE(5);
 311
 312 static void omap_init_audio(void)
 313 {
 314         platform_device_register(&omap_mcbsp1);
 315         platform_device_register(&omap_mcbsp2);
 316         if (cpu_is_omap243x() || cpu_is_omap34xx() || cpu_is_omap44xx()) {
 317                 platform_device_register(&omap_mcbsp3);
 318                 platform_device_register(&omap_mcbsp4);
 319         }
 320         if (cpu_is_omap243x() || cpu_is_omap34xx())
 321                 platform_device_register(&omap_mcbsp5);
 322
 323         platform_device_register(&omap_pcm);
 324 }
 325
 326 #else
 327 static inline void omap_init_audio(void) {}
 328 #endif
 329
 330 #if defined(CONFIG_SPI_OMAP24XX) || defined(CONFIG_SPI_OMAP24XX_MODULE)
 331
 332 #include <plat/mcspi.h>
 333
 334 #define OMAP2_MCSPI1_BASE               0x48098000
 335 #define OMAP2_MCSPI2_BASE               0x4809a000
 336 #define OMAP2_MCSPI3_BASE               0x480b8000
 337 #define OMAP2_MCSPI4_BASE               0x480ba000
 338
 339 #define OMAP4_MCSPI1_BASE               0x48098100
 340 #define OMAP4_MCSPI2_BASE               0x4809a100
 341 #define OMAP4_MCSPI3_BASE               0x480b8100
 342 #define OMAP4_MCSPI4_BASE               0x480ba100
 343
 344 static struct omap2_mcspi_platform_config omap2_mcspi1_config = {
 345         .num_cs         = 4,
 346 };
 347
 348 static struct resource omap2_mcspi1_resources[] = {
 349         {
 350                 .start          = OMAP2_MCSPI1_BASE,
 351                 .end            = OMAP2_MCSPI1_BASE + 0xff,
 352                 .flags          = IORESOURCE_MEM,
 353         },
 354 };
 355
 356 static struct platform_device omap2_mcspi1 = {
 357         .name           = "omap2_mcspi",
 358         .id             = 1,
 359         .num_resources  = ARRAY_SIZE(omap2_mcspi1_resources),
 360         .resource       = omap2_mcspi1_resources,
 361         .dev            = {
 362                 .platform_data = &omap2_mcspi1_config,
 363         },
 364 };
 365
 366 static struct omap2_mcspi_platform_config omap2_mcspi2_config = {
 367         .num_cs         = 2,
 368 };
 369
 370 static struct resource omap2_mcspi2_resources[] = {
 371         {
 372                 .start          = OMAP2_MCSPI2_BASE,
 373                 .end            = OMAP2_MCSPI2_BASE + 0xff,
 374                 .flags          = IORESOURCE_MEM,
 375         },
 376 };
 377
 378 static struct platform_device omap2_mcspi2 = {
 379         .name           = "omap2_mcspi",
 380         .id             = 2,
 381         .num_resources  = ARRAY_SIZE(omap2_mcspi2_resources),
 382         .resource       = omap2_mcspi2_resources,
 383         .dev            = {
 384                 .platform_data = &omap2_mcspi2_config,
 385         },
 386 };
 387
 388 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 389         defined(CONFIG_ARCH_OMAP4)
 390 static struct omap2_mcspi_platform_config omap2_mcspi3_config = {
 391         .num_cs         = 2,
 392 };
 393
 394 static struct resource omap2_mcspi3_resources[] = {
 395         {
 396         .start          = OMAP2_MCSPI3_BASE,
 397         .end            = OMAP2_MCSPI3_BASE + 0xff,
 398         .flags          = IORESOURCE_MEM,
 399         },
 400 };
 401
 402 static struct platform_device omap2_mcspi3 = {
 403         .name           = "omap2_mcspi",
 404         .id             = 3,
 405         .num_resources  = ARRAY_SIZE(omap2_mcspi3_resources),
 406         .resource       = omap2_mcspi3_resources,
 407         .dev            = {
 408                 .platform_data = &omap2_mcspi3_config,
 409         },
 410 };
 411 #endif
 412
 413 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 414 static struct omap2_mcspi_platform_config omap2_mcspi4_config = {
 415         .num_cs         = 1,
 416 };
 417
 418 static struct resource omap2_mcspi4_resources[] = {
 419         {
 420                 .start          = OMAP2_MCSPI4_BASE,
 421                 .end            = OMAP2_MCSPI4_BASE + 0xff,
 422                 .flags          = IORESOURCE_MEM,
 423         },
 424 };
 425
 426 static struct platform_device omap2_mcspi4 = {
 427         .name           = "omap2_mcspi",
 428         .id             = 4,
 429         .num_resources  = ARRAY_SIZE(omap2_mcspi4_resources),
 430         .resource       = omap2_mcspi4_resources,
 431         .dev            = {
 432                 .platform_data = &omap2_mcspi4_config,
 433         },
 434 };
 435 #endif
 436
 437 #ifdef CONFIG_ARCH_OMAP4
 438 static inline void omap4_mcspi_fixup(void)
 439 {
 440         omap2_mcspi1_resources[0].start = OMAP4_MCSPI1_BASE;
 441         omap2_mcspi1_resources[0].end   = OMAP4_MCSPI1_BASE + 0xff;
 442         omap2_mcspi2_resources[0].start = OMAP4_MCSPI2_BASE;
 443         omap2_mcspi2_resources[0].end   = OMAP4_MCSPI2_BASE + 0xff;
 444         omap2_mcspi3_resources[0].start = OMAP4_MCSPI3_BASE;
 445         omap2_mcspi3_resources[0].end   = OMAP4_MCSPI3_BASE + 0xff;
 446         omap2_mcspi4_resources[0].start = OMAP4_MCSPI4_BASE;
 447         omap2_mcspi4_resources[0].end   = OMAP4_MCSPI4_BASE + 0xff;
 448 }
 449 #else
 450 static inline void omap4_mcspi_fixup(void)
 451 {
 452 }
 453 #endif
 454
 455 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3) || \
 456         defined(CONFIG_ARCH_OMAP4)
 457 static inline void omap2_mcspi3_init(void)
 458 {
 459         platform_device_register(&omap2_mcspi3);
 460 }
 461 #else
 462 static inline void omap2_mcspi3_init(void)
 463 {
 464 }
 465 #endif
 466
 467 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 468 static inline void omap2_mcspi4_init(void)
 469 {
 470         platform_device_register(&omap2_mcspi4);
 471 }
 472 #else
 473 static inline void omap2_mcspi4_init(void)
 474 {
 475 }
 476 #endif
 477
 478 static void omap_init_mcspi(void)
 479 {
 480         if (cpu_is_omap44xx())
 481                 omap4_mcspi_fixup();
 482
 483         platform_device_register(&omap2_mcspi1);
 484         platform_device_register(&omap2_mcspi2);
 485
 486         if (cpu_is_omap2430() || cpu_is_omap343x() || cpu_is_omap44xx())
 487                 omap2_mcspi3_init();
 488
 489         if (cpu_is_omap343x() || cpu_is_omap44xx())
 490                 omap2_mcspi4_init();
 491 }
 492
 493 #else
 494 static inline void omap_init_mcspi(void) {}
 495 #endif
 496
 497 static struct resource omap2_pmu_resource = {
 498         .start  = 3,
 499         .end    = 3,
 500         .flags  = IORESOURCE_IRQ,
 501 };
 502
 503 static struct resource omap3_pmu_resource = {
 504         .start  = INT_34XX_BENCH_MPU_EMUL,
 505         .end    = INT_34XX_BENCH_MPU_EMUL,
 506         .flags  = IORESOURCE_IRQ,
 507 };
 508
 509 static struct platform_device omap_pmu_device = {
 510         .name           = "arm-pmu",
 511         .id             = ARM_PMU_DEVICE_CPU,
 512         .num_resources  = 1,
 513 };
 514
 515 static void omap_init_pmu(void)
 516 {
 517         if (cpu_is_omap24xx())
 518                 omap_pmu_device.resource = &omap2_pmu_resource;
 519         else if (cpu_is_omap34xx())
 520                 omap_pmu_device.resource = &omap3_pmu_resource;
 521         else
 522                 return;
 523
 524         platform_device_register(&omap_pmu_device);
 525 }
 526
 527
 528 #if defined(CONFIG_CRYPTO_DEV_OMAP_SHAM) || defined(CONFIG_CRYPTO_DEV_OMAP_SHAM_MODULE)
 529
 530 #ifdef CONFIG_ARCH_OMAP2
 531 static struct resource omap2_sham_resources[] = {
 532         {
 533                 .start  = OMAP24XX_SEC_SHA1MD5_BASE,
 534                 .end    = OMAP24XX_SEC_SHA1MD5_BASE + 0x64,
 535                 .flags  = IORESOURCE_MEM,
 536         },
 537         {
 538                 .start  = INT_24XX_SHA1MD5,
 539                 .flags  = IORESOURCE_IRQ,
 540         }
 541 };
 542 static int omap2_sham_resources_sz = ARRAY_SIZE(omap2_sham_resources);
 543 #else
 544 #define omap2_sham_resources            NULL
 545 #define omap2_sham_resources_sz         0
 546 #endif
 547
 548 #ifdef CONFIG_ARCH_OMAP3
 549 static struct resource omap3_sham_resources[] = {
 550         {
 551                 .start  = OMAP34XX_SEC_SHA1MD5_BASE,
 552                 .end    = OMAP34XX_SEC_SHA1MD5_BASE + 0x64,
 553                 .flags  = IORESOURCE_MEM,
 554         },
 555         {
 556                 .start  = INT_34XX_SHA1MD52_IRQ,
 557                 .flags  = IORESOURCE_IRQ,
 558         },
 559         {
 560                 .start  = OMAP34XX_DMA_SHA1MD5_RX,
 561                 .flags  = IORESOURCE_DMA,
 562         }
 563 };
 564 static int omap3_sham_resources_sz = ARRAY_SIZE(omap3_sham_resources);
 565 #else
 566 #define omap3_sham_resources            NULL
 567 #define omap3_sham_resources_sz         0
 568 #endif
 569
 570 static struct platform_device sham_device = {
 571         .name           = "omap-sham",
 572         .id             = -1,
 573 };
 574
 575 static void omap_init_sham(void)
 576 {
 577         if (cpu_is_omap24xx()) {
 578                 sham_device.resource = omap2_sham_resources;
 579                 sham_device.num_resources = omap2_sham_resources_sz;
 580         } else if (cpu_is_omap34xx()) {
 581                 sham_device.resource = omap3_sham_resources;
 582                 sham_device.num_resources = omap3_sham_resources_sz;
 583         } else {
 584                 pr_err("%s: platform not supported\n", __func__);
 585                 return;
 586         }
 587         platform_device_register(&sham_device);
 588 }
 589 #else
 590 static inline void omap_init_sham(void) { }
 591 #endif
 592
 593 /*-------------------------------------------------------------------------*/
 594
 595 #if defined(CONFIG_ARCH_OMAP3) || defined(CONFIG_ARCH_OMAP4)
 596
 597 #define MMCHS_SYSCONFIG                 0x0010
 598 #define MMCHS_SYSCONFIG_SWRESET         (1 << 1)
 599 #define MMCHS_SYSSTATUS                 0x0014
 600 #define MMCHS_SYSSTATUS_RESETDONE       (1 << 0)
 601
 602 static struct platform_device dummy_pdev = {
 603         .dev = {
 604                 .bus = &platform_bus_type,
 605         },
 606 };
 607
 608 /**
 609  * omap_hsmmc_reset() - Full reset of each HS-MMC controller
 610  *
 611  * Ensure that each MMC controller is fully reset.  Controllers
 612  * left in an unknown state (by bootloader) may prevent retention
 613  * or OFF-mode.  This is especially important in cases where the
 614  * MMC driver is not enabled, _or_ built as a module.
 615  *
 616  * In order for reset to work, interface, functional and debounce
 617  * clocks must be enabled.  The debounce clock comes from func_32k_clk
 618  * and is not under SW control, so we only enable i- and f-clocks.
 619  **/
 620 static void __init omap_hsmmc_reset(void)
 621 {
 622         u32 i, nr_controllers;
 623
 624         if (cpu_is_omap242x())
 625                 return;
 626
 627         nr_controllers = cpu_is_omap44xx() ? OMAP44XX_NR_MMC :
 628                 (cpu_is_omap34xx() ? OMAP34XX_NR_MMC : OMAP24XX_NR_MMC);
 629
 630         for (i = 0; i < nr_controllers; i++) {
 631                 u32 v, base = 0;
 632                 struct clk *iclk, *fclk;
 633                 struct device *dev = &dummy_pdev.dev;
 634
 635                 switch (i) {
 636                 case 0:
 637                         base = OMAP2_MMC1_BASE;
 638                         break;
 639                 case 1:
 640                         base = OMAP2_MMC2_BASE;
 641                         break;
 642                 case 2:
 643                         base = OMAP3_MMC3_BASE;
 644                         break;
 645                 case 3:
 646                         if (!cpu_is_omap44xx())
 647                                 return;
 648                         base = OMAP4_MMC4_BASE;
 649                         break;
 650                 case 4:
 651                         if (!cpu_is_omap44xx())
 652                                 return;
 653                         base = OMAP4_MMC5_BASE;
 654                         break;
 655                 }
 656
 657                 if (cpu_is_omap44xx())
 658                         base += OMAP4_MMC_REG_OFFSET;
 659
 660                 dummy_pdev.id = i;
 661                 dev_set_name(&dummy_pdev.dev, "mmci-omap-hs.%d", i);
 662                 iclk = clk_get(dev, "ick");
 663                 if (iclk && clk_enable(iclk))
 664                         iclk = NULL;
 665
 666                 fclk = clk_get(dev, "fck");
 667                 if (fclk && clk_enable(fclk))
 668                         fclk = NULL;
 669
 670                 if (!iclk || !fclk) {
 671                         printk(KERN_WARNING
 672                                "%s: Unable to enable clocks for MMC%d, "
 673                                "cannot reset.\n",  __func__, i);
 674                         break;
 675                 }
 676
 677                 omap_writel(MMCHS_SYSCONFIG_SWRESET, base + MMCHS_SYSCONFIG);
 678                 v = omap_readl(base + MMCHS_SYSSTATUS);
 679                 while (!(omap_readl(base + MMCHS_SYSSTATUS) &
 680                          MMCHS_SYSSTATUS_RESETDONE))
 681                         cpu_relax();
 682
 683                 if (fclk) {
 684                         clk_disable(fclk);
 685                         clk_put(fclk);
 686                 }
 687                 if (iclk) {
 688                         clk_disable(iclk);
 689                         clk_put(iclk);
 690                 }
 691         }
 692 }
 693 #else
 694 static inline void omap_hsmmc_reset(void) {}
 695 #endif
 696
 697 #if defined(CONFIG_MMC_OMAP) || defined(CONFIG_MMC_OMAP_MODULE) || \
 698         defined(CONFIG_MMC_OMAP_HS) || defined(CONFIG_MMC_OMAP_HS_MODULE)
 699
 700 static inline void omap2_mmc_mux(struct omap_mmc_platform_data *mmc_controller,
 701                         int controller_nr)
 702 {
 703         if ((mmc_controller->slots[0].switch_pin > 0) && \
 704                 (mmc_controller->slots[0].switch_pin < OMAP_MAX_GPIO_LINES))
 705                 omap_mux_init_gpio(mmc_controller->slots[0].switch_pin,
 706                                         OMAP_PIN_INPUT_PULLUP);
 707         if ((mmc_controller->slots[0].gpio_wp > 0) && \
 708                 (mmc_controller->slots[0].gpio_wp < OMAP_MAX_GPIO_LINES))
 709                 omap_mux_init_gpio(mmc_controller->slots[0].gpio_wp,
 710                                         OMAP_PIN_INPUT_PULLUP);
 711
 712         if (cpu_is_omap2420() && controller_nr == 0) {
 713                 omap_cfg_reg(H18_24XX_MMC_CMD);
 714                 omap_cfg_reg(H15_24XX_MMC_CLKI);
 715                 omap_cfg_reg(G19_24XX_MMC_CLKO);
 716                 omap_cfg_reg(F20_24XX_MMC_DAT0);
 717                 omap_cfg_reg(F19_24XX_MMC_DAT_DIR0);
 718                 omap_cfg_reg(G18_24XX_MMC_CMD_DIR);
 719                 if (mmc_controller->slots[0].wires == 4) {
 720                         omap_cfg_reg(H14_24XX_MMC_DAT1);
 721                         omap_cfg_reg(E19_24XX_MMC_DAT2);
 722                         omap_cfg_reg(D19_24XX_MMC_DAT3);
 723                         omap_cfg_reg(E20_24XX_MMC_DAT_DIR1);
 724                         omap_cfg_reg(F18_24XX_MMC_DAT_DIR2);
 725                         omap_cfg_reg(E18_24XX_MMC_DAT_DIR3);
 726                 }
 727
 728                 /*
 729                  * Use internal loop-back in MMC/SDIO Module Input Clock
 730                  * selection
 731                  */
 732                 if (mmc_controller->slots[0].internal_clock) {
 733                         u32 v = omap_ctrl_readl(OMAP2_CONTROL_DEVCONF0);
 734                         v |= (1 << 24);
 735                         omap_ctrl_writel(v, OMAP2_CONTROL_DEVCONF0);
 736                 }
 737         }
 738
 739         if (cpu_is_omap34xx()) {
 740                 if (controller_nr == 0) {
 741                         omap_mux_init_signal("sdmmc1_clk",
 742                                 OMAP_PIN_INPUT_PULLUP);
 743                         omap_mux_init_signal("sdmmc1_cmd",
 744                                 OMAP_PIN_INPUT_PULLUP);
 745                         omap_mux_init_signal("sdmmc1_dat0",
 746                                 OMAP_PIN_INPUT_PULLUP);
 747                         if (mmc_controller->slots[0].wires == 4 ||
 748                                 mmc_controller->slots[0].wires == 8) {
 749                                 omap_mux_init_signal("sdmmc1_dat1",
 750                                         OMAP_PIN_INPUT_PULLUP);
 751                                 omap_mux_init_signal("sdmmc1_dat2",
 752                                         OMAP_PIN_INPUT_PULLUP);
 753                                 omap_mux_init_signal("sdmmc1_dat3",
 754                                         OMAP_PIN_INPUT_PULLUP);
 755                         }
 756                         if (mmc_controller->slots[0].wires == 8) {
 757                                 omap_mux_init_signal("sdmmc1_dat4",
 758                                         OMAP_PIN_INPUT_PULLUP);
 759                                 omap_mux_init_signal("sdmmc1_dat5",
 760                                         OMAP_PIN_INPUT_PULLUP);
 761                                 omap_mux_init_signal("sdmmc1_dat6",
 762                                         OMAP_PIN_INPUT_PULLUP);
 763                                 omap_mux_init_signal("sdmmc1_dat7",
 764                                         OMAP_PIN_INPUT_PULLUP);
 765                         }
 766                 }
 767                 if (controller_nr == 1) {
 768                         /* MMC2 */
 769                         omap_mux_init_signal("sdmmc2_clk",
 770                                 OMAP_PIN_INPUT_PULLUP);
 771                         omap_mux_init_signal("sdmmc2_cmd",
 772                                 OMAP_PIN_INPUT_PULLUP);
 773                         omap_mux_init_signal("sdmmc2_dat0",
 774                                 OMAP_PIN_INPUT_PULLUP);
 775
 776                         /*
 777                          * For 8 wire configurations, Lines DAT4, 5, 6 and 7 need to be muxed
 778                          * in the board-*.c files
 779                          */
 780                         if (mmc_controller->slots[0].wires == 4 ||
 781                                 mmc_controller->slots[0].wires == 8) {
 782                                 omap_mux_init_signal("sdmmc2_dat1",
 783                                         OMAP_PIN_INPUT_PULLUP);
 784                                 omap_mux_init_signal("sdmmc2_dat2",
 785                                         OMAP_PIN_INPUT_PULLUP);
 786                                 omap_mux_init_signal("sdmmc2_dat3",
 787                                         OMAP_PIN_INPUT_PULLUP);
 788                         }
 789                         if (mmc_controller->slots[0].wires == 8) {
 790                                 omap_mux_init_signal("sdmmc2_dat4.sdmmc2_dat4",
 791                                         OMAP_PIN_INPUT_PULLUP);
 792                                 omap_mux_init_signal("sdmmc2_dat5.sdmmc2_dat5",
 793                                         OMAP_PIN_INPUT_PULLUP);
 794                                 omap_mux_init_signal("sdmmc2_dat6.sdmmc2_dat6",
 795                                         OMAP_PIN_INPUT_PULLUP);
 796                                 omap_mux_init_signal("sdmmc2_dat7.sdmmc2_dat7",
 797                                         OMAP_PIN_INPUT_PULLUP);
 798                         }
 799                 }
 800
 801                 /*
 802                  * For MMC3 the pins need to be muxed in the board-*.c files
 803                  */
 804         }
 805 }
 806
 807 void __init omap2_init_mmc(struct omap_mmc_platform_data **mmc_data,
 808                         int nr_controllers)
 809 {
 810         int i;
 811         char *name;
 812
 813         for (i = 0; i < nr_controllers; i++) {
 814                 unsigned long base, size;
 815                 unsigned int irq = 0;
 816
 817                 if (!mmc_data[i])
 818                         continue;
 819
 820                 omap2_mmc_mux(mmc_data[i], i);
 821
 822                 switch (i) {
 823                 case 0:
 824                         base = OMAP2_MMC1_BASE;
 825                         irq = INT_24XX_MMC_IRQ;
 826                         break;
 827                 case 1:
 828                         base = OMAP2_MMC2_BASE;
 829                         irq = INT_24XX_MMC2_IRQ;
 830                         break;
 831                 case 2:
 832                         if (!cpu_is_omap44xx() && !cpu_is_omap34xx())
 833                                 return;
 834                         base = OMAP3_MMC3_BASE;
 835                         irq = INT_34XX_MMC3_IRQ;
 836                         break;
 837                 case 3:
 838                         if (!cpu_is_omap44xx())
 839                                 return;
 840                         base = OMAP4_MMC4_BASE + OMAP4_MMC_REG_OFFSET;
 841                         irq = OMAP44XX_IRQ_MMC4;
 842                         break;
 843                 case 4:
 844                         if (!cpu_is_omap44xx())
 845                                 return;
 846                         base = OMAP4_MMC5_BASE + OMAP4_MMC_REG_OFFSET;
 847                         irq = OMAP44XX_IRQ_MMC5;
 848                         break;
 849                 default:
 850                         continue;
 851                 }
 852
 853                 if (cpu_is_omap2420()) {
 854                         size = OMAP2420_MMC_SIZE;
 855                         name = "mmci-omap";
 856                 } else if (cpu_is_omap44xx()) {
 857                         if (i < 3) {
 858                                 base += OMAP4_MMC_REG_OFFSET;
 859                                 irq += OMAP44XX_IRQ_GIC_START;
 860                         }
 861                         size = OMAP4_HSMMC_SIZE;
 862                         name = "mmci-omap-hs";
 863                 } else {
 864                         size = OMAP3_HSMMC_SIZE;
 865                         name = "mmci-omap-hs";
 866                 }
 867                 omap_mmc_add(name, i, base, size, irq, mmc_data[i]);
 868         };
 869 }
 870
 871 #endif
 872
 873 /*-------------------------------------------------------------------------*/
 874
 875 #if defined(CONFIG_HDQ_MASTER_OMAP) || defined(CONFIG_HDQ_MASTER_OMAP_MODULE)
 876 #if defined(CONFIG_ARCH_OMAP2430) || defined(CONFIG_ARCH_OMAP3430)
 877 #define OMAP_HDQ_BASE   0x480B2000
 878 #endif
 879 static struct resource omap_hdq_resources[] = {
 880         {
 881                 .start          = OMAP_HDQ_BASE,
 882                 .end            = OMAP_HDQ_BASE + 0x1C,
 883                 .flags          = IORESOURCE_MEM,
 884         },
 885         {
 886                 .start          = INT_24XX_HDQ_IRQ,
 887                 .flags          = IORESOURCE_IRQ,
 888         },
 889 };
 890 static struct platform_device omap_hdq_dev = {
 891         .name = "omap_hdq",
 892         .id = 0,
 893         .dev = {
 894                 .platform_data = NULL,
 895         },
 896         .num_resources  = ARRAY_SIZE(omap_hdq_resources),
 897         .resource       = omap_hdq_resources,
 898 };
 899 static inline void omap_hdq_init(void)
 900 {
 901         (void) platform_device_register(&omap_hdq_dev);
 902 }
 903 #else
 904 static inline void omap_hdq_init(void) {}
 905 #endif
 906
 907 /*---------------------------------------------------------------------------*/
 908
 909 #if defined(CONFIG_VIDEO_OMAP2_VOUT) || \
 910         defined(CONFIG_VIDEO_OMAP2_VOUT_MODULE)
 911 #if defined(CONFIG_FB_OMAP2) || defined(CONFIG_FB_OMAP2_MODULE)
 912 static struct resource omap_vout_resource[3 - CONFIG_FB_OMAP2_NUM_FBS] = {
 913 };
 914 #else
 915 static struct resource omap_vout_resource[2] = {
 916 };
 917 #endif
 918
 919 static struct platform_device omap_vout_device = {
 920         .name           = "omap_vout",
 921         .num_resources  = ARRAY_SIZE(omap_vout_resource),
 922         .resource       = &omap_vout_resource[0],
 923         .id             = -1,
 924 };
 925 static void omap_init_vout(void)
 926 {
 927         if (platform_device_register(&omap_vout_device) < 0)
 928                 printk(KERN_ERR "Unable to register OMAP-VOUT device\n");
 929 }
 930 #else
 931 static inline void omap_init_vout(void) {}
 932 #endif
 933
 934 /*-------------------------------------------------------------------------*/
 935
 936 static int __init omap2_init_devices(void)
 937 {
 938         /* please keep these calls, and their implementations above,
 939          * in alphabetical order so they're easier to sort through.
 940          */
 941         omap_hsmmc_reset();
 942         omap_init_audio();
 943         omap_init_camera();
 944         omap_init_mbox();
 945         omap_init_mcspi();
 946         omap_init_pmu();
 947         omap_hdq_init();
 948         omap_init_sti();
 949         omap_init_sham();
 950         omap_init_vout();
 951
 952         return 0;
 953 }
 954 arch_initcall(omap2_init_devices);