arch/arm/mach-omap2/io.c

   1 /*
   2  * linux/arch/arm/mach-omap2/io.c
   3  *
   4  * OMAP2 I/O mapping code
   5  *
   6  * Copyright (C) 2005 Nokia Corporation
   7  * Copyright (C) 2007-2009 Texas Instruments
   8  *
   9  * Author:
  10  *      Juha Yrjola <juha.yrjola@nokia.com>
  11  *      Syed Khasim <x0khasim@ti.com>
  12  *
  13  * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
  14  *
  15  * This program is free software; you can redistribute it and/or modify
  16  * it under the terms of the GNU General Public License version 2 as
  17  * published by the Free Software Foundation.
  18  */
  19 #include <linux/module.h>
  20 #include <linux/kernel.h>
  21 #include <linux/init.h>
  22 #include <linux/io.h>
  23 #include <linux/clk.h>
  24
  25 #include <asm/tlb.h>
  26
  27 #include <asm/mach/map.h>
  28
  29 #include <plat/sram.h>
  30 #include <plat/sdrc.h>
  31 #include <plat/serial.h>
  32
  33 #include "clock2xxx.h"
  34 #include "clock3xxx.h"
  35 #include "clock44xx.h"
  36
  37 #include "common.h"
  38 #include <plat/omap-pm.h>
  39 #include "voltage.h"
  40 #include "powerdomain.h"
  41
  42 #include "clockdomain.h"
  43 #include <plat/omap_hwmod.h>
  44 #include <plat/multi.h>
  45
  46 /*
  47  * The machine specific code may provide the extra mapping besides the
  48  * default mapping provided here.
  49  */
  50
  51 #if defined(CONFIG_SOC_OMAP2420) || defined(CONFIG_SOC_OMAP2430)
  52 static struct map_desc omap24xx_io_desc[] __initdata = {
  53         {
  54                 .virtual        = L3_24XX_VIRT,
  55                 .pfn            = __phys_to_pfn(L3_24XX_PHYS),
  56                 .length         = L3_24XX_SIZE,
  57                 .type           = MT_DEVICE
  58         },
  59         {
  60                 .virtual        = L4_24XX_VIRT,
  61                 .pfn            = __phys_to_pfn(L4_24XX_PHYS),
  62                 .length         = L4_24XX_SIZE,
  63                 .type           = MT_DEVICE
  64         },
  65 };
  66
  67 #ifdef CONFIG_SOC_OMAP2420
  68 static struct map_desc omap242x_io_desc[] __initdata = {
  69         {
  70                 .virtual        = DSP_MEM_2420_VIRT,
  71                 .pfn            = __phys_to_pfn(DSP_MEM_2420_PHYS),
  72                 .length         = DSP_MEM_2420_SIZE,
  73                 .type           = MT_DEVICE
  74         },
  75         {
  76                 .virtual        = DSP_IPI_2420_VIRT,
  77                 .pfn            = __phys_to_pfn(DSP_IPI_2420_PHYS),
  78                 .length         = DSP_IPI_2420_SIZE,
  79                 .type           = MT_DEVICE
  80         },
  81         {
  82                 .virtual        = DSP_MMU_2420_VIRT,
  83                 .pfn            = __phys_to_pfn(DSP_MMU_2420_PHYS),
  84                 .length         = DSP_MMU_2420_SIZE,
  85                 .type           = MT_DEVICE
  86         },
  87 };
  88
  89 #endif
  90
  91 #ifdef CONFIG_SOC_OMAP2430
  92 static struct map_desc omap243x_io_desc[] __initdata = {
  93         {
  94                 .virtual        = L4_WK_243X_VIRT,
  95                 .pfn            = __phys_to_pfn(L4_WK_243X_PHYS),
  96                 .length         = L4_WK_243X_SIZE,
  97                 .type           = MT_DEVICE
  98         },
  99         {
 100                 .virtual        = OMAP243X_GPMC_VIRT,
 101                 .pfn            = __phys_to_pfn(OMAP243X_GPMC_PHYS),
 102                 .length         = OMAP243X_GPMC_SIZE,
 103                 .type           = MT_DEVICE
 104         },
 105         {
 106                 .virtual        = OMAP243X_SDRC_VIRT,
 107                 .pfn            = __phys_to_pfn(OMAP243X_SDRC_PHYS),
 108                 .length         = OMAP243X_SDRC_SIZE,
 109                 .type           = MT_DEVICE
 110         },
 111         {
 112                 .virtual        = OMAP243X_SMS_VIRT,
 113                 .pfn            = __phys_to_pfn(OMAP243X_SMS_PHYS),
 114                 .length         = OMAP243X_SMS_SIZE,
 115                 .type           = MT_DEVICE
 116         },
 117 };
 118 #endif
 119 #endif
 120
 121 #ifdef  CONFIG_ARCH_OMAP3
 122 static struct map_desc omap34xx_io_desc[] __initdata = {
 123         {
 124                 .virtual        = L3_34XX_VIRT,
 125                 .pfn            = __phys_to_pfn(L3_34XX_PHYS),
 126                 .length         = L3_34XX_SIZE,
 127                 .type           = MT_DEVICE
 128         },
 129         {
 130                 .virtual        = L4_34XX_VIRT,
 131                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 132                 .length         = L4_34XX_SIZE,
 133                 .type           = MT_DEVICE
 134         },
 135         {
 136                 .virtual        = OMAP34XX_GPMC_VIRT,
 137                 .pfn            = __phys_to_pfn(OMAP34XX_GPMC_PHYS),
 138                 .length         = OMAP34XX_GPMC_SIZE,
 139                 .type           = MT_DEVICE
 140         },
 141         {
 142                 .virtual        = OMAP343X_SMS_VIRT,
 143                 .pfn            = __phys_to_pfn(OMAP343X_SMS_PHYS),
 144                 .length         = OMAP343X_SMS_SIZE,
 145                 .type           = MT_DEVICE
 146         },
 147         {
 148                 .virtual        = OMAP343X_SDRC_VIRT,
 149                 .pfn            = __phys_to_pfn(OMAP343X_SDRC_PHYS),
 150                 .length         = OMAP343X_SDRC_SIZE,
 151                 .type           = MT_DEVICE
 152         },
 153         {
 154                 .virtual        = L4_PER_34XX_VIRT,
 155                 .pfn            = __phys_to_pfn(L4_PER_34XX_PHYS),
 156                 .length         = L4_PER_34XX_SIZE,
 157                 .type           = MT_DEVICE
 158         },
 159         {
 160                 .virtual        = L4_EMU_34XX_VIRT,
 161                 .pfn            = __phys_to_pfn(L4_EMU_34XX_PHYS),
 162                 .length         = L4_EMU_34XX_SIZE,
 163                 .type           = MT_DEVICE
 164         },
 165 #if defined(CONFIG_DEBUG_LL) &&                                                 \
 166         (defined(CONFIG_MACH_OMAP_ZOOM2) || defined(CONFIG_MACH_OMAP_ZOOM3))
 167         {
 168                 .virtual        = ZOOM_UART_VIRT,
 169                 .pfn            = __phys_to_pfn(ZOOM_UART_BASE),
 170                 .length         = SZ_1M,
 171                 .type           = MT_DEVICE
 172         },
 173 #endif
 174 };
 175 #endif
 176
 177 #ifdef CONFIG_SOC_OMAPTI81XX
 178 static struct map_desc omapti81xx_io_desc[] __initdata = {
 179         {
 180                 .virtual        = L4_34XX_VIRT,
 181                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 182                 .length         = L4_34XX_SIZE,
 183                 .type           = MT_DEVICE
 184         }
 185 };
 186 #endif
 187
 188 #ifdef CONFIG_SOC_OMAPAM33XX
 189 static struct map_desc omapam33xx_io_desc[] __initdata = {
 190         {
 191                 .virtual        = L4_34XX_VIRT,
 192                 .pfn            = __phys_to_pfn(L4_34XX_PHYS),
 193                 .length         = L4_34XX_SIZE,
 194                 .type           = MT_DEVICE
 195         },
 196         {
 197                 .virtual        = L4_WK_AM33XX_VIRT,
 198                 .pfn            = __phys_to_pfn(L4_WK_AM33XX_PHYS),
 199                 .length         = L4_WK_AM33XX_SIZE,
 200                 .type           = MT_DEVICE
 201         }
 202 };
 203 #endif
 204
 205 #ifdef  CONFIG_ARCH_OMAP4
 206 static struct map_desc omap44xx_io_desc[] __initdata = {
 207         {
 208                 .virtual        = L3_44XX_VIRT,
 209                 .pfn            = __phys_to_pfn(L3_44XX_PHYS),
 210                 .length         = L3_44XX_SIZE,
 211                 .type           = MT_DEVICE,
 212         },
 213         {
 214                 .virtual        = L4_44XX_VIRT,
 215                 .pfn            = __phys_to_pfn(L4_44XX_PHYS),
 216                 .length         = L4_44XX_SIZE,
 217                 .type           = MT_DEVICE,
 218         },
 219         {
 220                 .virtual        = OMAP44XX_GPMC_VIRT,
 221                 .pfn            = __phys_to_pfn(OMAP44XX_GPMC_PHYS),
 222                 .length         = OMAP44XX_GPMC_SIZE,
 223                 .type           = MT_DEVICE,
 224         },
 225         {
 226                 .virtual        = OMAP44XX_EMIF1_VIRT,
 227                 .pfn            = __phys_to_pfn(OMAP44XX_EMIF1_PHYS),
 228                 .length         = OMAP44XX_EMIF1_SIZE,
 229                 .type           = MT_DEVICE,
 230         },
 231         {
 232                 .virtual        = OMAP44XX_EMIF2_VIRT,
 233                 .pfn            = __phys_to_pfn(OMAP44XX_EMIF2_PHYS),
 234                 .length         = OMAP44XX_EMIF2_SIZE,
 235                 .type           = MT_DEVICE,
 236         },
 237         {
 238                 .virtual        = OMAP44XX_DMM_VIRT,
 239                 .pfn            = __phys_to_pfn(OMAP44XX_DMM_PHYS),
 240                 .length         = OMAP44XX_DMM_SIZE,
 241                 .type           = MT_DEVICE,
 242         },
 243         {
 244                 .virtual        = L4_PER_44XX_VIRT,
 245                 .pfn            = __phys_to_pfn(L4_PER_44XX_PHYS),
 246                 .length         = L4_PER_44XX_SIZE,
 247                 .type           = MT_DEVICE,
 248         },
 249         {
 250                 .virtual        = L4_EMU_44XX_VIRT,
 251                 .pfn            = __phys_to_pfn(L4_EMU_44XX_PHYS),
 252                 .length         = L4_EMU_44XX_SIZE,
 253                 .type           = MT_DEVICE,
 254         },
 255 #ifdef CONFIG_OMAP4_ERRATA_I688
 256         {
 257                 .virtual        = OMAP4_SRAM_VA,
 258                 .pfn            = __phys_to_pfn(OMAP4_SRAM_PA),
 259                 .length         = PAGE_SIZE,
 260                 .type           = MT_MEMORY_SO,
 261         },
 262 #endif
 263
 264 };
 265 #endif
 266
 267 #ifdef CONFIG_SOC_OMAP2420
 268 void __init omap242x_map_common_io(void)
 269 {
 270         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 271         iotable_init(omap242x_io_desc, ARRAY_SIZE(omap242x_io_desc));
 272 }
 273 #endif
 274
 275 #ifdef CONFIG_SOC_OMAP2430
 276 void __init omap243x_map_common_io(void)
 277 {
 278         iotable_init(omap24xx_io_desc, ARRAY_SIZE(omap24xx_io_desc));
 279         iotable_init(omap243x_io_desc, ARRAY_SIZE(omap243x_io_desc));
 280 }
 281 #endif
 282
 283 #ifdef CONFIG_ARCH_OMAP3
 284 void __init omap34xx_map_common_io(void)
 285 {
 286         iotable_init(omap34xx_io_desc, ARRAY_SIZE(omap34xx_io_desc));
 287 }
 288 #endif
 289
 290 #ifdef CONFIG_SOC_OMAPTI81XX
 291 void __init omapti81xx_map_common_io(void)
 292 {
 293         iotable_init(omapti81xx_io_desc, ARRAY_SIZE(omapti81xx_io_desc));
 294 }
 295 #endif
 296
 297 #ifdef CONFIG_SOC_OMAPAM33XX
 298 void __init omapam33xx_map_common_io(void)
 299 {
 300         iotable_init(omapam33xx_io_desc, ARRAY_SIZE(omapam33xx_io_desc));
 301 }
 302 #endif
 303
 304 #ifdef CONFIG_ARCH_OMAP4
 305 void __init omap44xx_map_common_io(void)
 306 {
 307         iotable_init(omap44xx_io_desc, ARRAY_SIZE(omap44xx_io_desc));
 308         omap_barriers_init();
 309 }
 310 #endif
 311
 312 /*
 313  * omap2_init_reprogram_sdrc - reprogram SDRC timing parameters
 314  *
 315  * Sets the CORE DPLL3 M2 divider to the same value that it's at
 316  * currently.  This has the effect of setting the SDRC SDRAM AC timing
 317  * registers to the values currently defined by the kernel.  Currently
 318  * only defined for OMAP3; will return 0 if called on OMAP2.  Returns
 319  * -EINVAL if the dpll3_m2_ck cannot be found, 0 if called on OMAP2,
 320  * or passes along the return value of clk_set_rate().
 321  */
 322 static int __init _omap2_init_reprogram_sdrc(void)
 323 {
 324         struct clk *dpll3_m2_ck;
 325         int v = -EINVAL;
 326         long rate;
 327
 328         if (!cpu_is_omap34xx())
 329                 return 0;
 330
 331         dpll3_m2_ck = clk_get(NULL, "dpll3_m2_ck");
 332         if (IS_ERR(dpll3_m2_ck))
 333                 return -EINVAL;
 334
 335         rate = clk_get_rate(dpll3_m2_ck);
 336         pr_info("Reprogramming SDRC clock to %ld Hz\n", rate);
 337         v = clk_set_rate(dpll3_m2_ck, rate);
 338         if (v)
 339                 pr_err("dpll3_m2_clk rate change failed: %d\n", v);
 340
 341         clk_put(dpll3_m2_ck);
 342
 343         return v;
 344 }
 345
 346 static int _set_hwmod_postsetup_state(struct omap_hwmod *oh, void *data)
 347 {
 348         return omap_hwmod_set_postsetup_state(oh, *(u8 *)data);
 349 }
 350
 351 static void __init omap_common_init_early(void)
 352 {
 353         omap2_check_revision();
 354         omap_init_consistent_dma_size();
 355 }
 356
 357 static void __init omap_hwmod_init_postsetup(void)
 358 {
 359         u8 postsetup_state;
 360
 361         /* Set the default postsetup state for all hwmods */
 362 #ifdef CONFIG_PM_RUNTIME
 363         postsetup_state = _HWMOD_STATE_IDLE;
 364 #else
 365         postsetup_state = _HWMOD_STATE_ENABLED;
 366 #endif
 367         omap_hwmod_for_each(_set_hwmod_postsetup_state, &postsetup_state);
 368
 369         /*
 370          * Set the default postsetup state for unusual modules (like
 371          * MPU WDT).
 372          *
 373          * The postsetup_state is not actually used until
 374          * omap_hwmod_late_init(), so boards that desire full watchdog
 375          * coverage of kernel initialization can reprogram the
 376          * postsetup_state between the calls to
 377          * omap2_init_common_infra() and omap_sdrc_init().
 378          *
 379          * XXX ideally we could detect whether the MPU WDT was currently
 380          * enabled here and make this conditional
 381          */
 382         postsetup_state = _HWMOD_STATE_DISABLED;
 383         omap_hwmod_for_each_by_class("wd_timer",
 384                                      _set_hwmod_postsetup_state,
 385                                      &postsetup_state);
 386
 387         omap_pm_if_early_init();
 388 }
 389
 390 #ifdef CONFIG_SOC_OMAP2420
 391 void __init omap2420_init_early(void)
 392 {
 393         omap2_set_globals_242x();
 394         omap_common_init_early();
 395         omap2xxx_voltagedomains_init();
 396         omap242x_powerdomains_init();
 397         omap242x_clockdomains_init();
 398         omap2420_hwmod_init();
 399         omap_hwmod_init_postsetup();
 400         omap2420_clk_init();
 401 }
 402 #endif
 403
 404 #ifdef CONFIG_SOC_OMAP2430
 405 void __init omap2430_init_early(void)
 406 {
 407         omap2_set_globals_243x();
 408         omap_common_init_early();
 409         omap2xxx_voltagedomains_init();
 410         omap243x_powerdomains_init();
 411         omap243x_clockdomains_init();
 412         omap2430_hwmod_init();
 413         omap_hwmod_init_postsetup();
 414         omap2430_clk_init();
 415 }
 416 #endif
 417
 418 /*
 419  * Currently only board-omap3beagle.c should call this because of the
 420  * same machine_id for 34xx and 36xx beagle.. Will get fixed with DT.
 421  */
 422 #ifdef CONFIG_ARCH_OMAP3
 423 void __init omap3_init_early(void)
 424 {
 425         omap2_set_globals_3xxx();
 426         omap_common_init_early();
 427         omap3xxx_voltagedomains_init();
 428         omap3xxx_powerdomains_init();
 429         omap3xxx_clockdomains_init();
 430         omap3xxx_hwmod_init();
 431         omap_hwmod_init_postsetup();
 432         omap3xxx_clk_init();
 433 }
 434
 435 void __init omap3430_init_early(void)
 436 {
 437         omap3_init_early();
 438 }
 439
 440 void __init omap35xx_init_early(void)
 441 {
 442         omap3_init_early();
 443 }
 444
 445 void __init omap3630_init_early(void)
 446 {
 447         omap3_init_early();
 448 }
 449
 450 void __init am35xx_init_early(void)
 451 {
 452         omap3_init_early();
 453 }
 454
 455 void __init ti81xx_init_early(void)
 456 {
 457         omap2_set_globals_ti81xx();
 458         omap_common_init_early();
 459         omap3xxx_voltagedomains_init();
 460         omap3xxx_powerdomains_init();
 461         omap3xxx_clockdomains_init();
 462         omap3xxx_hwmod_init();
 463         omap_hwmod_init_postsetup();
 464         omap3xxx_clk_init();
 465 }
 466 #endif
 467
 468 #ifdef CONFIG_ARCH_OMAP4
 469 void __init omap4430_init_early(void)
 470 {
 471         omap2_set_globals_443x();
 472         omap_common_init_early();
 473         omap44xx_voltagedomains_init();
 474         omap44xx_powerdomains_init();
 475         omap44xx_clockdomains_init();
 476         omap44xx_hwmod_init();
 477         omap_hwmod_init_postsetup();
 478         omap4xxx_clk_init();
 479 }
 480 #endif
 481
 482 void __init omap_sdrc_init(struct omap_sdrc_params *sdrc_cs0,
 483                                       struct omap_sdrc_params *sdrc_cs1)
 484 {
 485         omap_sram_init();
 486
 487         if (cpu_is_omap24xx() || omap3_has_sdrc()) {
 488                 omap2_sdrc_init(sdrc_cs0, sdrc_cs1);
 489                 _omap2_init_reprogram_sdrc();
 490         }
 491 }
 492
 493 /*
 494  * NOTE: Please use ioremap + __raw_read/write where possible instead of these
 495  */
 496
 497 u8 omap_readb(u32 pa)
 498 {
 499         return __raw_readb(OMAP2_L4_IO_ADDRESS(pa));
 500 }
 501 EXPORT_SYMBOL(omap_readb);
 502
 503 u16 omap_readw(u32 pa)
 504 {
 505         return __raw_readw(OMAP2_L4_IO_ADDRESS(pa));
 506 }
 507 EXPORT_SYMBOL(omap_readw);
 508
 509 u32 omap_readl(u32 pa)
 510 {
 511         return __raw_readl(OMAP2_L4_IO_ADDRESS(pa));
 512 }
 513 EXPORT_SYMBOL(omap_readl);
 514
 515 void omap_writeb(u8 v, u32 pa)
 516 {
 517         __raw_writeb(v, OMAP2_L4_IO_ADDRESS(pa));
 518 }
 519 EXPORT_SYMBOL(omap_writeb);
 520
 521 void omap_writew(u16 v, u32 pa)
 522 {
 523         __raw_writew(v, OMAP2_L4_IO_ADDRESS(pa));
 524 }
 525 EXPORT_SYMBOL(omap_writew);
 526
 527 void omap_writel(u32 v, u32 pa)
 528 {
 529         __raw_writel(v, OMAP2_L4_IO_ADDRESS(pa));
 530 }
 531 EXPORT_SYMBOL(omap_writel);