arch/arm/mach-omap2/pm.c

   1 /*
   2  * pm.c - Common OMAP2+ power management-related code
   3  *
   4  * Copyright (C) 2010 Texas Instruments, Inc.
   5  * Copyright (C) 2010 Nokia Corporation
   6  *
   7  * This program is free software; you can redistribute it and/or modify
   8  * it under the terms of the GNU General Public License version 2 as
   9  * published by the Free Software Foundation.
  10  */
  11
  12 #include <linux/kernel.h>
  13 #include <linux/init.h>
  14 #include <linux/io.h>
  15 #include <linux/err.h>
  16 #include <linux/opp.h>
  17 #include <linux/export.h>
  18 #include <linux/suspend.h>
  19 #include <linux/cpu.h>
  20
  21 #include <asm/system_misc.h>
  22
  23 #include "omap-pm.h"
  24 #include "omap_device.h"
  25 #include "common.h"
  26
  27 #include "soc.h"
  28 #include "prcm-common.h"
  29 #include "voltage.h"
  30 #include "powerdomain.h"
  31 #include "clockdomain.h"
  32 #include "pm.h"
  33 #include "twl-common.h"
  34
  35 static struct omap_device_pm_latency *pm_lats;
  36
  37 /*
  38  * omap_pm_suspend: points to a function that does the SoC-specific
  39  * suspend work
  40  */
  41 int (*omap_pm_suspend)(void);
  42
  43 /**
  44  * struct omap2_oscillator - Describe the board main oscillator latencies
  45  * @startup_time: oscillator startup latency
  46  * @shutdown_time: oscillator shutdown latency
  47  */
  48 struct omap2_oscillator {
  49         u32 startup_time;
  50         u32 shutdown_time;
  51 };
  52
  53 static struct omap2_oscillator oscillator = {
  54         .startup_time = ULONG_MAX,
  55         .shutdown_time = ULONG_MAX,
  56 };
  57
  58 void omap_pm_setup_oscillator(u32 tstart, u32 tshut)
  59 {
  60         oscillator.startup_time = tstart;
  61         oscillator.shutdown_time = tshut;
  62 }
  63
  64 void omap_pm_get_oscillator(u32 *tstart, u32 *tshut)
  65 {
  66         if (!tstart || !tshut)
  67                 return;
  68
  69         *tstart = oscillator.startup_time;
  70         *tshut = oscillator.shutdown_time;
  71 }
  72
  73 static int __init _init_omap_device(char *name)
  74 {
  75         struct omap_hwmod *oh;
  76         struct platform_device *pdev;
  77
  78         oh = omap_hwmod_lookup(name);
  79         if (WARN(!oh, "%s: could not find omap_hwmod for %s\n",
  80                  __func__, name))
  81                 return -ENODEV;
  82
  83         pdev = omap_device_build(oh->name, 0, oh, NULL, 0, pm_lats, 0, false);
  84         if (WARN(IS_ERR(pdev), "%s: could not build omap_device for %s\n",
  85                  __func__, name))
  86                 return -ENODEV;
  87
  88         return 0;
  89 }
  90
  91 /*
  92  * Build omap_devices for processors and bus.
  93  */
  94 static void __init omap2_init_processor_devices(void)
  95 {
  96         _init_omap_device("mpu");
  97         if (omap3_has_iva())
  98                 _init_omap_device("iva");
  99
 100         if (cpu_is_omap44xx()) {
 101                 _init_omap_device("l3_main_1");
 102                 _init_omap_device("dsp");
 103                 _init_omap_device("iva");
 104         } else {
 105                 _init_omap_device("l3_main");
 106         }
 107 }
 108
 109 /* Types of sleep_switch used in omap_set_pwrdm_state */
 110 #define FORCEWAKEUP_SWITCH      0
 111 #define LOWPOWERSTATE_SWITCH    1
 112
 113 int __init omap_pm_clkdms_setup(struct clockdomain *clkdm, void *unused)
 114 {
 115         if ((clkdm->flags & CLKDM_CAN_ENABLE_AUTO) &&
 116             !(clkdm->flags & CLKDM_MISSING_IDLE_REPORTING))
 117                 clkdm_allow_idle(clkdm);
 118         else if (clkdm->flags & CLKDM_CAN_FORCE_SLEEP &&
 119                  atomic_read(&clkdm->usecount) == 0)
 120                 clkdm_sleep(clkdm);
 121         return 0;
 122 }
 123
 124 /*
 125  * This sets pwrdm state (other than mpu & core. Currently only ON &
 126  * RET are supported.
 127  */
 128 int omap_set_pwrdm_state(struct powerdomain *pwrdm, u32 pwrst)
 129 {
 130         u8 curr_pwrst, next_pwrst;
 131         int sleep_switch = -1, ret = 0, hwsup = 0;
 132
 133         if (!pwrdm || IS_ERR(pwrdm))
 134                 return -EINVAL;
 135
 136         while (!(pwrdm->pwrsts & (1 << pwrst))) {
 137                 if (pwrst == PWRDM_POWER_OFF)
 138                         return ret;
 139                 pwrst--;
 140         }
 141
 142         next_pwrst = pwrdm_read_next_pwrst(pwrdm);
 143         if (next_pwrst == pwrst)
 144                 return ret;
 145
 146         curr_pwrst = pwrdm_read_pwrst(pwrdm);
 147         if (curr_pwrst < PWRDM_POWER_ON) {
 148                 if ((curr_pwrst > pwrst) &&
 149                         (pwrdm->flags & PWRDM_HAS_LOWPOWERSTATECHANGE)) {
 150                         sleep_switch = LOWPOWERSTATE_SWITCH;
 151                 } else {
 152                         hwsup = clkdm_in_hwsup(pwrdm->pwrdm_clkdms[0]);
 153                         clkdm_wakeup(pwrdm->pwrdm_clkdms[0]);
 154                         sleep_switch = FORCEWAKEUP_SWITCH;
 155                 }
 156         }
 157
 158         ret = pwrdm_set_next_pwrst(pwrdm, pwrst);
 159         if (ret)
 160                 pr_err("%s: unable to set power state of powerdomain: %s\n",
 161                        __func__, pwrdm->name);
 162
 163         switch (sleep_switch) {
 164         case FORCEWAKEUP_SWITCH:
 165                 if (hwsup)
 166                         clkdm_allow_idle(pwrdm->pwrdm_clkdms[0]);
 167                 else
 168                         clkdm_sleep(pwrdm->pwrdm_clkdms[0]);
 169                 break;
 170         case LOWPOWERSTATE_SWITCH:
 171                 pwrdm_set_lowpwrstchange(pwrdm);
 172                 pwrdm_wait_transition(pwrdm);
 173                 pwrdm_state_switch(pwrdm);
 174                 break;
 175         }
 176
 177         return ret;
 178 }
 179
 180
 181
 182 /*
 183  * This API is to be called during init to set the various voltage
 184  * domains to the voltage as per the opp table. Typically we boot up
 185  * at the nominal voltage. So this function finds out the rate of
 186  * the clock associated with the voltage domain, finds out the correct
 187  * opp entry and sets the voltage domain to the voltage specified
 188  * in the opp entry
 189  */
 190 static int __init omap2_set_init_voltage(char *vdd_name, char *clk_name,
 191                                          const char *oh_name)
 192 {
 193         struct voltagedomain *voltdm;
 194         struct clk *clk;
 195         struct opp *opp;
 196         unsigned long freq, bootup_volt;
 197         struct device *dev;
 198
 199         if (!vdd_name || !clk_name || !oh_name) {
 200                 pr_err("%s: invalid parameters\n", __func__);
 201                 goto exit;
 202         }
 203
 204         if (!strncmp(oh_name, "mpu", 3))
 205                 /*
 206                  * All current OMAPs share voltage rail and clock
 207                  * source, so CPU0 is used to represent the MPU-SS.
 208                  */
 209                 dev = get_cpu_device(0);
 210         else
 211                 dev = omap_device_get_by_hwmod_name(oh_name);
 212
 213         if (IS_ERR(dev)) {
 214                 pr_err("%s: Unable to get dev pointer for hwmod %s\n",
 215                         __func__, oh_name);
 216                 goto exit;
 217         }
 218
 219         voltdm = voltdm_lookup(vdd_name);
 220         if (!voltdm) {
 221                 pr_err("%s: unable to get vdd pointer for vdd_%s\n",
 222                         __func__, vdd_name);
 223                 goto exit;
 224         }
 225
 226         clk =  clk_get(NULL, clk_name);
 227         if (IS_ERR(clk)) {
 228                 pr_err("%s: unable to get clk %s\n", __func__, clk_name);
 229                 goto exit;
 230         }
 231
 232         freq = clk_get_rate(clk);
 233         clk_put(clk);
 234
 235         rcu_read_lock();
 236         opp = opp_find_freq_ceil(dev, &freq);
 237         if (IS_ERR(opp)) {
 238                 rcu_read_unlock();
 239                 pr_err("%s: unable to find boot up OPP for vdd_%s\n",
 240                         __func__, vdd_name);
 241                 goto exit;
 242         }
 243
 244         bootup_volt = opp_get_voltage(opp);
 245         rcu_read_unlock();
 246         if (!bootup_volt) {
 247                 pr_err("%s: unable to find voltage corresponding to the bootup OPP for vdd_%s\n",
 248                        __func__, vdd_name);
 249                 goto exit;
 250         }
 251
 252         voltdm_scale(voltdm, bootup_volt);
 253         return 0;
 254
 255 exit:
 256         pr_err("%s: unable to set vdd_%s\n", __func__, vdd_name);
 257         return -EINVAL;
 258 }
 259
 260 #ifdef CONFIG_SUSPEND
 261 static int omap_pm_enter(suspend_state_t suspend_state)
 262 {
 263         int ret = 0;
 264
 265         if (!omap_pm_suspend)
 266                 return -ENOENT; /* XXX doublecheck */
 267
 268         switch (suspend_state) {
 269         case PM_SUSPEND_STANDBY:
 270         case PM_SUSPEND_MEM:
 271                 ret = omap_pm_suspend();
 272                 break;
 273         default:
 274                 ret = -EINVAL;
 275         }
 276
 277         return ret;
 278 }
 279
 280 static int omap_pm_begin(suspend_state_t state)
 281 {
 282         disable_hlt();
 283         if (cpu_is_omap34xx())
 284                 omap_prcm_irq_prepare();
 285         return 0;
 286 }
 287
 288 static void omap_pm_end(void)
 289 {
 290         enable_hlt();
 291         return;
 292 }
 293
 294 static void omap_pm_finish(void)
 295 {
 296         if (cpu_is_omap34xx())
 297                 omap_prcm_irq_complete();
 298 }
 299
 300 static const struct platform_suspend_ops omap_pm_ops = {
 301         .begin          = omap_pm_begin,
 302         .end            = omap_pm_end,
 303         .enter          = omap_pm_enter,
 304         .finish         = omap_pm_finish,
 305         .valid          = suspend_valid_only_mem,
 306 };
 307
 308 #endif /* CONFIG_SUSPEND */
 309
 310 static void __init omap3_init_voltages(void)
 311 {
 312         if (!cpu_is_omap34xx())
 313                 return;
 314
 315         omap2_set_init_voltage("mpu_iva", "dpll1_ck", "mpu");
 316         omap2_set_init_voltage("core", "l3_ick", "l3_main");
 317 }
 318
 319 static void __init omap4_init_voltages(void)
 320 {
 321         if (!cpu_is_omap44xx())
 322                 return;
 323
 324         omap2_set_init_voltage("mpu", "dpll_mpu_ck", "mpu");
 325         omap2_set_init_voltage("core", "l3_div_ck", "l3_main_1");
 326         omap2_set_init_voltage("iva", "dpll_iva_m5x2_ck", "iva");
 327 }
 328
 329 static int __init omap2_common_pm_init(void)
 330 {
 331         if (!of_have_populated_dt())
 332                 omap2_init_processor_devices();
 333         omap_pm_if_init();
 334
 335         return 0;
 336 }
 337 postcore_initcall(omap2_common_pm_init);
 338
 339 int __init omap2_common_pm_late_init(void)
 340 {
 341         /*
 342          * In the case of DT, the PMIC and SR initialization will be done using
 343          * a completely different mechanism.
 344          * Disable this part if a DT blob is available.
 345          */
 346         if (of_have_populated_dt())
 347                 return 0;
 348
 349         /* Init the voltage layer */
 350         omap_pmic_late_init();
 351         omap_voltage_late_init();
 352
 353         /* Initialize the voltages */
 354         omap3_init_voltages();
 355         omap4_init_voltages();
 356
 357         /* Smartreflex device init */
 358         omap_devinit_smartreflex();
 359
 360 #ifdef CONFIG_SUSPEND
 361         suspend_set_ops(&omap_pm_ops);
 362 #endif
 363
 364         return 0;
 365 }