1 /* linux/arch/arm/mach-s3c2440/mach-anubis.c
3 * Copyright 2003-2009 Simtec Electronics
4 * http://armlinux.simtec.co.uk/
5 * Ben Dooks <ben@simtec.co.uk>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/kernel.h>
13 #include <linux/types.h>
14 #include <linux/interrupt.h>
15 #include <linux/list.h>
16 #include <linux/timer.h>
17 #include <linux/init.h>
18 #include <linux/gpio.h>
19 #include <linux/serial_core.h>
20 #include <linux/platform_device.h>
21 #include <linux/ata_platform.h>
22 #include <linux/i2c.h>
24 #include <linux/sm501.h>
25 #include <linux/sm501-regs.h>
27 #include <asm/mach/arch.h>
28 #include <asm/mach/map.h>
29 #include <asm/mach/irq.h>
31 #include <mach/anubis-map.h>
32 #include <mach/anubis-irq.h>
33 #include <mach/anubis-cpld.h>
35 #include <mach/hardware.h>
37 #include <asm/mach-types.h>
39 #include <plat/regs-serial.h>
40 #include <mach/regs-gpio.h>
41 #include <mach/regs-mem.h>
42 #include <mach/regs-lcd.h>
43 #include <plat/nand.h>
46 #include <linux/mtd/mtd.h>
47 #include <linux/mtd/nand.h>
48 #include <linux/mtd/nand_ecc.h>
49 #include <linux/mtd/partitions.h>
51 #include <net/ax88796.h>
53 #include <plat/clock.h>
54 #include <plat/devs.h>
56 #include <plat/audio-simtec.h>
60 #define COPYRIGHT ", Copyright 2005-2009 Simtec Electronics"
62 static struct map_desc anubis_iodesc[] __initdata = {
66 .virtual = (u32)S3C24XX_VA_ISA_BYTE,
67 .pfn = __phys_to_pfn(0x0),
71 .virtual = (u32)S3C24XX_VA_ISA_WORD,
72 .pfn = __phys_to_pfn(0x0),
77 /* we could possibly compress the next set down into a set of smaller tables
78 * pagetables, but that would mean using an L2 section, and it still means
79 * we cannot actually feed the same register to an LDR due to 16K spacing
82 /* CPLD control registers */
85 .virtual = (u32)ANUBIS_VA_CTRL1,
86 .pfn = __phys_to_pfn(ANUBIS_PA_CTRL1),
90 .virtual = (u32)ANUBIS_VA_IDREG,
91 .pfn = __phys_to_pfn(ANUBIS_PA_IDREG),
97 #define UCON S3C2410_UCON_DEFAULT | S3C2410_UCON_UCLK
98 #define ULCON S3C2410_LCON_CS8 | S3C2410_LCON_PNONE | S3C2410_LCON_STOPB
99 #define UFCON S3C2410_UFCON_RXTRIG8 | S3C2410_UFCON_FIFOMODE
101 static struct s3c2410_uartcfg anubis_uartcfgs[] __initdata = {
108 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
116 .clk_sel = S3C2410_UCON_CLKSEL1 | S3C2410_UCON_CLKSEL2,
120 /* NAND Flash on Anubis board */
122 static int external_map[] = { 2 };
123 static int chip0_map[] = { 0 };
124 static int chip1_map[] = { 1 };
126 static struct mtd_partition __initdata anubis_default_nand_part[] = {
128 .name = "Boot Agent",
134 .size = SZ_4M - SZ_16K,
140 .size = SZ_32M - SZ_4M,
145 .size = MTDPART_SIZ_FULL,
149 static struct mtd_partition __initdata anubis_default_nand_part_large[] = {
151 .name = "Boot Agent",
157 .size = SZ_4M - SZ_128K,
163 .size = SZ_32M - SZ_4M,
168 .size = MTDPART_SIZ_FULL,
172 /* the Anubis has 3 selectable slots for nand-flash, the two
173 * on-board chip areas, as well as the external slot.
175 * Note, there is no current hot-plug support for the External
179 static struct s3c2410_nand_set __initdata anubis_nand_sets[] = {
183 .nr_map = external_map,
184 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part),
185 .partitions = anubis_default_nand_part,
191 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part),
192 .partitions = anubis_default_nand_part,
198 .nr_partitions = ARRAY_SIZE(anubis_default_nand_part),
199 .partitions = anubis_default_nand_part,
203 static void anubis_nand_select(struct s3c2410_nand_set *set, int slot)
207 slot = set->nr_map[slot] & 3;
209 pr_debug("anubis_nand: selecting slot %d (set %p,%p)\n",
210 slot, set, set->nr_map);
212 tmp = __raw_readb(ANUBIS_VA_CTRL1);
213 tmp &= ~ANUBIS_CTRL1_NANDSEL;
216 pr_debug("anubis_nand: ctrl1 now %02x\n", tmp);
218 __raw_writeb(tmp, ANUBIS_VA_CTRL1);
221 static struct s3c2410_platform_nand __initdata anubis_nand_info = {
225 .nr_sets = ARRAY_SIZE(anubis_nand_sets),
226 .sets = anubis_nand_sets,
227 .select_chip = anubis_nand_select,
232 static struct pata_platform_info anubis_ide_platdata = {
236 static struct resource anubis_ide0_resource[] = {
238 .start = S3C2410_CS3,
239 .end = S3C2410_CS3 + (8*32) - 1,
240 .flags = IORESOURCE_MEM,
242 .start = S3C2410_CS3 + (1<<26) + (6*32),
243 .end = S3C2410_CS3 + (1<<26) + (7*32) - 1,
244 .flags = IORESOURCE_MEM,
248 .flags = IORESOURCE_IRQ,
252 static struct platform_device anubis_device_ide0 = {
253 .name = "pata_platform",
255 .num_resources = ARRAY_SIZE(anubis_ide0_resource),
256 .resource = anubis_ide0_resource,
258 .platform_data = &anubis_ide_platdata,
259 .coherent_dma_mask = ~0,
263 static struct resource anubis_ide1_resource[] = {
265 .start = S3C2410_CS4,
266 .end = S3C2410_CS4 + (8*32) - 1,
267 .flags = IORESOURCE_MEM,
269 .start = S3C2410_CS4 + (1<<26) + (6*32),
270 .end = S3C2410_CS4 + (1<<26) + (7*32) - 1,
271 .flags = IORESOURCE_MEM,
275 .flags = IORESOURCE_IRQ,
279 static struct platform_device anubis_device_ide1 = {
280 .name = "pata_platform",
282 .num_resources = ARRAY_SIZE(anubis_ide1_resource),
283 .resource = anubis_ide1_resource,
285 .platform_data = &anubis_ide_platdata,
286 .coherent_dma_mask = ~0,
290 /* Asix AX88796 10/100 ethernet controller */
292 static struct ax_plat_data anubis_asix_platdata = {
293 .flags = AXFLG_MAC_FROMDEV,
299 static struct resource anubis_asix_resource[] = {
301 .start = S3C2410_CS5,
302 .end = S3C2410_CS5 + (0x20 * 0x20) -1,
303 .flags = IORESOURCE_MEM
308 .flags = IORESOURCE_IRQ
312 static struct platform_device anubis_device_asix = {
315 .num_resources = ARRAY_SIZE(anubis_asix_resource),
316 .resource = anubis_asix_resource,
318 .platform_data = &anubis_asix_platdata,
324 static struct resource anubis_sm501_resource[] = {
326 .start = S3C2410_CS2,
327 .end = S3C2410_CS2 + SZ_8M,
328 .flags = IORESOURCE_MEM,
331 .start = S3C2410_CS2 + SZ_64M - SZ_2M,
332 .end = S3C2410_CS2 + SZ_64M - 1,
333 .flags = IORESOURCE_MEM,
338 .flags = IORESOURCE_IRQ,
342 static struct sm501_initdata anubis_sm501_initdata = {
344 .set = 0x3F000000, /* 24bit panel */
348 .set = 0x010100, /* SDRAM timing */
352 .set = SM501_MISC_PNL_24BIT,
356 .devices = SM501_USE_GPIO,
358 /* set the SDRAM and bus clocks */
363 static struct sm501_platdata_gpio_i2c anubis_sm501_gpio_i2c[] = {
376 static struct sm501_platdata anubis_sm501_platdata = {
377 .init = &anubis_sm501_initdata,
379 .gpio_i2c = anubis_sm501_gpio_i2c,
380 .gpio_i2c_nr = ARRAY_SIZE(anubis_sm501_gpio_i2c),
383 static struct platform_device anubis_device_sm501 = {
386 .num_resources = ARRAY_SIZE(anubis_sm501_resource),
387 .resource = anubis_sm501_resource,
389 .platform_data = &anubis_sm501_platdata,
393 /* Standard Anubis devices */
395 static struct platform_device *anubis_devices[] __initdata = {
405 &anubis_device_sm501,
408 static struct clk *anubis_clocks[] __initdata = {
418 static struct i2c_board_info anubis_i2c_devs[] __initdata = {
420 I2C_BOARD_INFO("tps65011", 0x48),
426 static struct s3c24xx_audio_simtec_pdata __initdata anubis_audio = {
431 .amp_gpio = S3C2410_GPB(2),
432 .amp_gain[0] = S3C2410_GPD(10),
433 .amp_gain[1] = S3C2410_GPD(11),
436 static void __init anubis_map_io(void)
438 /* initialise the clocks */
440 s3c24xx_dclk0.parent = &clk_upll;
441 s3c24xx_dclk0.rate = 12*1000*1000;
443 s3c24xx_dclk1.parent = &clk_upll;
444 s3c24xx_dclk1.rate = 24*1000*1000;
446 s3c24xx_clkout0.parent = &s3c24xx_dclk0;
447 s3c24xx_clkout1.parent = &s3c24xx_dclk1;
449 s3c24xx_uclk.parent = &s3c24xx_clkout1;
451 s3c24xx_register_clocks(anubis_clocks, ARRAY_SIZE(anubis_clocks));
453 s3c24xx_init_io(anubis_iodesc, ARRAY_SIZE(anubis_iodesc));
454 s3c24xx_init_clocks(0);
455 s3c24xx_init_uarts(anubis_uartcfgs, ARRAY_SIZE(anubis_uartcfgs));
457 /* check for the newer revision boards with large page nand */
459 if ((__raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK) >= 4) {
460 printk(KERN_INFO "ANUBIS-B detected (revision %d)\n",
461 __raw_readb(ANUBIS_VA_IDREG) & ANUBIS_IDREG_REVMASK);
462 anubis_nand_sets[0].partitions = anubis_default_nand_part_large;
463 anubis_nand_sets[0].nr_partitions = ARRAY_SIZE(anubis_default_nand_part_large);
465 /* ensure that the GPIO is setup */
466 s3c2410_gpio_setpin(S3C2410_GPA(0), 1);
470 static void __init anubis_init(void)
472 s3c_i2c0_set_platdata(NULL);
473 s3c_nand_set_platdata(&anubis_nand_info);
474 simtec_audio_add(NULL, false, &anubis_audio);
476 platform_add_devices(anubis_devices, ARRAY_SIZE(anubis_devices));
478 i2c_register_board_info(0, anubis_i2c_devs,
479 ARRAY_SIZE(anubis_i2c_devs));
483 MACHINE_START(ANUBIS, "Simtec-Anubis")
484 /* Maintainer: Ben Dooks <ben@simtec.co.uk> */
485 .atag_offset = 0x100,
486 .map_io = anubis_map_io,
487 .init_machine = anubis_init,
488 .init_irq = s3c24xx_init_irq,
489 .timer = &s3c24xx_timer,
490 .restart = s3c2440_restart,