2 * linux/arch/arm/plat-omap/dmtimer.c
4 * OMAP Dual-Mode Timers
6 * Copyright (C) 2010 Texas Instruments Incorporated - http://www.ti.com/
7 * Tarun Kanti DebBarma <tarun.kanti@ti.com>
8 * Thara Gopinath <thara@ti.com>
10 * dmtimer adaptation to platform_driver.
12 * Copyright (C) 2005 Nokia Corporation
13 * OMAP2 support by Juha Yrjola
14 * API improvements and OMAP2 clock framework support by Timo Teras
16 * Copyright (C) 2009 Texas Instruments
17 * Added OMAP4 support - Santosh Shilimkar <santosh.shilimkar@ti.com>
19 * This program is free software; you can redistribute it and/or modify it
20 * under the terms of the GNU General Public License as published by the
21 * Free Software Foundation; either version 2 of the License, or (at your
22 * option) any later version.
24 * THIS SOFTWARE IS PROVIDED ``AS IS'' AND ANY EXPRESS OR IMPLIED
25 * WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES OF
26 * MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED. IN
27 * NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
28 * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING, BUT
29 * ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY, OR TORT
30 * (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY OUT OF THE USE OF
31 * THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF SUCH DAMAGE.
33 * You should have received a copy of the GNU General Public License along
34 * with this program; if not, write to the Free Software Foundation, Inc.,
35 * 675 Mass Ave, Cambridge, MA 02139, USA.
38 #include <linux/module.h>
40 #include <linux/slab.h>
41 #include <linux/err.h>
42 #include <linux/pm_runtime.h>
44 #include <plat/dmtimer.h>
46 static LIST_HEAD(omap_timer_list);
47 static DEFINE_SPINLOCK(dm_timer_lock);
50 * omap_dm_timer_read_reg - read timer registers in posted and non-posted mode
51 * @timer: timer pointer over which read operation to perform
52 * @reg: lowest byte holds the register offset
54 * The posted mode bit is encoded in reg. Note that in posted mode write
55 * pending bit must be checked. Otherwise a read of a non completed write
56 * will produce an error.
58 static inline u32 omap_dm_timer_read_reg(struct omap_dm_timer *timer, u32 reg)
60 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
61 return __omap_dm_timer_read(timer, reg, timer->posted);
65 * omap_dm_timer_write_reg - write timer registers in posted and non-posted mode
66 * @timer: timer pointer over which write operation is to perform
67 * @reg: lowest byte holds the register offset
68 * @value: data to write into the register
70 * The posted mode bit is encoded in reg. Note that in posted mode the write
71 * pending bit must be checked. Otherwise a write on a register which has a
72 * pending write will be lost.
74 static void omap_dm_timer_write_reg(struct omap_dm_timer *timer, u32 reg,
77 WARN_ON((reg & 0xff) < _OMAP_TIMER_WAKEUP_EN_OFFSET);
78 __omap_dm_timer_write(timer, reg, value, timer->posted);
81 static void omap_timer_restore_context(struct omap_dm_timer *timer)
83 omap_dm_timer_write_reg(timer, OMAP_TIMER_OCP_CFG_OFFSET,
84 timer->context.tiocp_cfg);
85 if (timer->revision > 1)
86 __raw_writel(timer->context.tistat, timer->sys_stat);
88 __raw_writel(timer->context.tisr, timer->irq_stat);
89 omap_dm_timer_write_reg(timer, OMAP_TIMER_WAKEUP_EN_REG,
91 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG,
93 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG,
95 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG,
97 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG,
98 timer->context.tsicr);
99 __raw_writel(timer->context.tier, timer->irq_ena);
100 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG,
101 timer->context.tclr);
104 static void omap_dm_timer_wait_for_reset(struct omap_dm_timer *timer)
108 if (!timer->sys_stat)
112 while (!(__raw_readl(timer->sys_stat) & 1)) {
115 printk(KERN_ERR "Timer failed to reset\n");
121 static void omap_dm_timer_reset(struct omap_dm_timer *timer)
123 omap_dm_timer_enable(timer);
124 if (timer->pdev->id != 1) {
125 omap_dm_timer_write_reg(timer, OMAP_TIMER_IF_CTRL_REG, 0x06);
126 omap_dm_timer_wait_for_reset(timer);
129 __omap_dm_timer_reset(timer, 0, 0);
130 omap_dm_timer_disable(timer);
134 int omap_dm_timer_prepare(struct omap_dm_timer *timer)
136 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
139 timer->fclk = clk_get(&timer->pdev->dev, "fck");
140 if (WARN_ON_ONCE(IS_ERR_OR_NULL(timer->fclk))) {
142 dev_err(&timer->pdev->dev, ": No fclk handle.\n");
146 if (pdata->needs_manual_reset)
147 omap_dm_timer_reset(timer);
149 ret = omap_dm_timer_set_source(timer, OMAP_TIMER_SRC_32_KHZ);
155 struct omap_dm_timer *omap_dm_timer_request(void)
157 struct omap_dm_timer *timer = NULL, *t;
161 spin_lock_irqsave(&dm_timer_lock, flags);
162 list_for_each_entry(t, &omap_timer_list, node) {
172 ret = omap_dm_timer_prepare(timer);
178 spin_unlock_irqrestore(&dm_timer_lock, flags);
181 pr_debug("%s: timer request failed!\n", __func__);
185 EXPORT_SYMBOL_GPL(omap_dm_timer_request);
187 struct omap_dm_timer *omap_dm_timer_request_specific(int id)
189 struct omap_dm_timer *timer = NULL, *t;
193 spin_lock_irqsave(&dm_timer_lock, flags);
194 list_for_each_entry(t, &omap_timer_list, node) {
195 if (t->pdev->id == id && !t->reserved) {
203 ret = omap_dm_timer_prepare(timer);
209 spin_unlock_irqrestore(&dm_timer_lock, flags);
212 pr_debug("%s: timer%d request failed!\n", __func__, id);
216 EXPORT_SYMBOL_GPL(omap_dm_timer_request_specific);
218 int omap_dm_timer_free(struct omap_dm_timer *timer)
220 if (unlikely(!timer))
223 clk_put(timer->fclk);
225 WARN_ON(!timer->reserved);
229 EXPORT_SYMBOL_GPL(omap_dm_timer_free);
231 void omap_dm_timer_enable(struct omap_dm_timer *timer)
233 pm_runtime_get_sync(&timer->pdev->dev);
235 EXPORT_SYMBOL_GPL(omap_dm_timer_enable);
237 void omap_dm_timer_disable(struct omap_dm_timer *timer)
239 pm_runtime_put(&timer->pdev->dev);
241 EXPORT_SYMBOL_GPL(omap_dm_timer_disable);
243 int omap_dm_timer_get_irq(struct omap_dm_timer *timer)
249 EXPORT_SYMBOL_GPL(omap_dm_timer_get_irq);
251 #if defined(CONFIG_ARCH_OMAP1)
254 * omap_dm_timer_modify_idlect_mask - Check if any running timers use ARMXOR
255 * @inputmask: current value of idlect mask
257 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
260 struct omap_dm_timer *timer = NULL;
263 /* If ARMXOR cannot be idled this function call is unnecessary */
264 if (!(inputmask & (1 << 1)))
267 /* If any active timer is using ARMXOR return modified mask */
268 spin_lock_irqsave(&dm_timer_lock, flags);
269 list_for_each_entry(timer, &omap_timer_list, node) {
272 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
273 if (l & OMAP_TIMER_CTRL_ST) {
274 if (((omap_readl(MOD_CONF_CTRL_1) >> (i * 2)) & 0x03) == 0)
275 inputmask &= ~(1 << 1);
277 inputmask &= ~(1 << 2);
281 spin_unlock_irqrestore(&dm_timer_lock, flags);
285 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
289 struct clk *omap_dm_timer_get_fclk(struct omap_dm_timer *timer)
295 EXPORT_SYMBOL_GPL(omap_dm_timer_get_fclk);
297 __u32 omap_dm_timer_modify_idlect_mask(__u32 inputmask)
303 EXPORT_SYMBOL_GPL(omap_dm_timer_modify_idlect_mask);
307 int omap_dm_timer_trigger(struct omap_dm_timer *timer)
309 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
310 pr_err("%s: timer not available or enabled.\n", __func__);
314 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
317 EXPORT_SYMBOL_GPL(omap_dm_timer_trigger);
319 int omap_dm_timer_start(struct omap_dm_timer *timer)
323 if (unlikely(!timer))
326 omap_dm_timer_enable(timer);
328 if (timer->loses_context) {
329 u32 ctx_loss_cnt_after =
330 timer->get_context_loss_count(&timer->pdev->dev);
331 if (ctx_loss_cnt_after != timer->ctx_loss_count)
332 omap_timer_restore_context(timer);
335 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
336 if (!(l & OMAP_TIMER_CTRL_ST)) {
337 l |= OMAP_TIMER_CTRL_ST;
338 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
341 /* Save the context */
342 timer->context.tclr = l;
345 EXPORT_SYMBOL_GPL(omap_dm_timer_start);
347 int omap_dm_timer_stop(struct omap_dm_timer *timer)
349 unsigned long rate = 0;
350 struct dmtimer_platform_data *pdata = timer->pdev->dev.platform_data;
352 if (unlikely(!timer))
355 if (!pdata->needs_manual_reset)
356 rate = clk_get_rate(timer->fclk);
358 __omap_dm_timer_stop(timer, timer->posted, rate);
362 EXPORT_SYMBOL_GPL(omap_dm_timer_stop);
364 int omap_dm_timer_set_source(struct omap_dm_timer *timer, int source)
367 struct dmtimer_platform_data *pdata;
369 if (unlikely(!timer))
372 pdata = timer->pdev->dev.platform_data;
374 if (source < 0 || source >= 3)
377 ret = pdata->set_timer_src(timer->pdev, source);
381 EXPORT_SYMBOL_GPL(omap_dm_timer_set_source);
383 int omap_dm_timer_set_load(struct omap_dm_timer *timer, int autoreload,
388 if (unlikely(!timer))
391 omap_dm_timer_enable(timer);
392 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
394 l |= OMAP_TIMER_CTRL_AR;
396 l &= ~OMAP_TIMER_CTRL_AR;
397 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
398 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
400 omap_dm_timer_write_reg(timer, OMAP_TIMER_TRIGGER_REG, 0);
401 /* Save the context */
402 timer->context.tclr = l;
403 timer->context.tldr = load;
404 omap_dm_timer_disable(timer);
407 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load);
409 /* Optimized set_load which removes costly spin wait in timer_start */
410 int omap_dm_timer_set_load_start(struct omap_dm_timer *timer, int autoreload,
415 if (unlikely(!timer))
418 omap_dm_timer_enable(timer);
420 if (timer->loses_context) {
421 u32 ctx_loss_cnt_after =
422 timer->get_context_loss_count(&timer->pdev->dev);
423 if (ctx_loss_cnt_after != timer->ctx_loss_count)
424 omap_timer_restore_context(timer);
427 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
429 l |= OMAP_TIMER_CTRL_AR;
430 omap_dm_timer_write_reg(timer, OMAP_TIMER_LOAD_REG, load);
432 l &= ~OMAP_TIMER_CTRL_AR;
434 l |= OMAP_TIMER_CTRL_ST;
436 __omap_dm_timer_load_start(timer, l, load, timer->posted);
438 /* Save the context */
439 timer->context.tclr = l;
440 timer->context.tldr = load;
441 timer->context.tcrr = load;
444 EXPORT_SYMBOL_GPL(omap_dm_timer_set_load_start);
446 int omap_dm_timer_set_match(struct omap_dm_timer *timer, int enable,
451 if (unlikely(!timer))
454 omap_dm_timer_enable(timer);
455 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
457 l |= OMAP_TIMER_CTRL_CE;
459 l &= ~OMAP_TIMER_CTRL_CE;
460 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
461 omap_dm_timer_write_reg(timer, OMAP_TIMER_MATCH_REG, match);
463 /* Save the context */
464 timer->context.tclr = l;
465 timer->context.tmar = match;
466 omap_dm_timer_disable(timer);
469 EXPORT_SYMBOL_GPL(omap_dm_timer_set_match);
471 int omap_dm_timer_set_pwm(struct omap_dm_timer *timer, int def_on,
472 int toggle, int trigger)
476 if (unlikely(!timer))
479 omap_dm_timer_enable(timer);
480 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
481 l &= ~(OMAP_TIMER_CTRL_GPOCFG | OMAP_TIMER_CTRL_SCPWM |
482 OMAP_TIMER_CTRL_PT | (0x03 << 10));
484 l |= OMAP_TIMER_CTRL_SCPWM;
486 l |= OMAP_TIMER_CTRL_PT;
488 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
490 /* Save the context */
491 timer->context.tclr = l;
492 omap_dm_timer_disable(timer);
495 EXPORT_SYMBOL_GPL(omap_dm_timer_set_pwm);
497 int omap_dm_timer_set_prescaler(struct omap_dm_timer *timer, int prescaler)
501 if (unlikely(!timer))
504 omap_dm_timer_enable(timer);
505 l = omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG);
506 l &= ~(OMAP_TIMER_CTRL_PRE | (0x07 << 2));
507 if (prescaler >= 0x00 && prescaler <= 0x07) {
508 l |= OMAP_TIMER_CTRL_PRE;
511 omap_dm_timer_write_reg(timer, OMAP_TIMER_CTRL_REG, l);
513 /* Save the context */
514 timer->context.tclr = l;
515 omap_dm_timer_disable(timer);
518 EXPORT_SYMBOL_GPL(omap_dm_timer_set_prescaler);
520 int omap_dm_timer_set_int_enable(struct omap_dm_timer *timer,
523 if (unlikely(!timer))
526 omap_dm_timer_enable(timer);
527 __omap_dm_timer_int_enable(timer, value);
529 /* Save the context */
530 timer->context.tier = value;
531 timer->context.twer = value;
532 omap_dm_timer_disable(timer);
535 EXPORT_SYMBOL_GPL(omap_dm_timer_set_int_enable);
537 unsigned int omap_dm_timer_read_status(struct omap_dm_timer *timer)
541 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
542 pr_err("%s: timer not available or enabled.\n", __func__);
546 l = __raw_readl(timer->irq_stat);
550 EXPORT_SYMBOL_GPL(omap_dm_timer_read_status);
552 int omap_dm_timer_write_status(struct omap_dm_timer *timer, unsigned int value)
554 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev)))
557 __omap_dm_timer_write_status(timer, value);
558 /* Save the context */
559 timer->context.tisr = value;
562 EXPORT_SYMBOL_GPL(omap_dm_timer_write_status);
564 unsigned int omap_dm_timer_read_counter(struct omap_dm_timer *timer)
566 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
567 pr_err("%s: timer not iavailable or enabled.\n", __func__);
571 return __omap_dm_timer_read_counter(timer, timer->posted);
573 EXPORT_SYMBOL_GPL(omap_dm_timer_read_counter);
575 int omap_dm_timer_write_counter(struct omap_dm_timer *timer, unsigned int value)
577 if (unlikely(!timer || pm_runtime_suspended(&timer->pdev->dev))) {
578 pr_err("%s: timer not available or enabled.\n", __func__);
582 omap_dm_timer_write_reg(timer, OMAP_TIMER_COUNTER_REG, value);
584 /* Save the context */
585 timer->context.tcrr = value;
588 EXPORT_SYMBOL_GPL(omap_dm_timer_write_counter);
590 int omap_dm_timers_active(void)
592 struct omap_dm_timer *timer;
594 list_for_each_entry(timer, &omap_timer_list, node) {
595 if (!timer->reserved)
598 if (omap_dm_timer_read_reg(timer, OMAP_TIMER_CTRL_REG) &
599 OMAP_TIMER_CTRL_ST) {
605 EXPORT_SYMBOL_GPL(omap_dm_timers_active);
608 * omap_dm_timer_probe - probe function called for every registered device
609 * @pdev: pointer to current timer platform device
611 * Called by driver framework at the end of device registration for all
614 static int __devinit omap_dm_timer_probe(struct platform_device *pdev)
618 struct omap_dm_timer *timer;
619 struct resource *mem, *irq, *ioarea;
620 struct dmtimer_platform_data *pdata = pdev->dev.platform_data;
623 dev_err(&pdev->dev, "%s: no platform data.\n", __func__);
627 irq = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
628 if (unlikely(!irq)) {
629 dev_err(&pdev->dev, "%s: no IRQ resource.\n", __func__);
633 mem = platform_get_resource(pdev, IORESOURCE_MEM, 0);
634 if (unlikely(!mem)) {
635 dev_err(&pdev->dev, "%s: no memory resource.\n", __func__);
639 ioarea = request_mem_region(mem->start, resource_size(mem),
642 dev_err(&pdev->dev, "%s: region already claimed.\n", __func__);
646 timer = kzalloc(sizeof(struct omap_dm_timer), GFP_KERNEL);
648 dev_err(&pdev->dev, "%s: no memory for omap_dm_timer.\n",
651 goto err_free_ioregion;
654 timer->io_base = ioremap(mem->start, resource_size(mem));
655 if (!timer->io_base) {
656 dev_err(&pdev->dev, "%s: ioremap failed.\n", __func__);
661 timer->id = pdev->id;
662 timer->irq = irq->start;
663 timer->reserved = pdata->reserved;
665 timer->loses_context = pdata->loses_context;
666 timer->get_context_loss_count = pdata->get_context_loss_count;
668 /* Skip pm_runtime_enable for OMAP1 */
669 if (!pdata->needs_manual_reset) {
670 pm_runtime_enable(&pdev->dev);
671 pm_runtime_irq_safe(&pdev->dev);
674 if (!timer->reserved) {
675 pm_runtime_get_sync(&pdev->dev);
676 __omap_dm_timer_init_regs(timer);
677 pm_runtime_put(&pdev->dev);
680 /* add the timer element to the list */
681 spin_lock_irqsave(&dm_timer_lock, flags);
682 list_add_tail(&timer->node, &omap_timer_list);
683 spin_unlock_irqrestore(&dm_timer_lock, flags);
685 dev_dbg(&pdev->dev, "Device Probed.\n");
693 release_mem_region(mem->start, resource_size(mem));
699 * omap_dm_timer_remove - cleanup a registered timer device
700 * @pdev: pointer to current timer platform device
702 * Called by driver framework whenever a timer device is unregistered.
703 * In addition to freeing platform resources it also deletes the timer
704 * entry from the local list.
706 static int __devexit omap_dm_timer_remove(struct platform_device *pdev)
708 struct omap_dm_timer *timer;
712 spin_lock_irqsave(&dm_timer_lock, flags);
713 list_for_each_entry(timer, &omap_timer_list, node)
714 if (timer->pdev->id == pdev->id) {
715 list_del(&timer->node);
720 spin_unlock_irqrestore(&dm_timer_lock, flags);
725 static struct platform_driver omap_dm_timer_driver = {
726 .probe = omap_dm_timer_probe,
727 .remove = __devexit_p(omap_dm_timer_remove),
729 .name = "omap_timer",
733 static int __init omap_dm_timer_driver_init(void)
735 return platform_driver_register(&omap_dm_timer_driver);
738 static void __exit omap_dm_timer_driver_exit(void)
740 platform_driver_unregister(&omap_dm_timer_driver);
743 early_platform_init("earlytimer", &omap_dm_timer_driver);
744 module_init(omap_dm_timer_driver_init);
745 module_exit(omap_dm_timer_driver_exit);
747 MODULE_DESCRIPTION("OMAP Dual-Mode Timer Driver");
748 MODULE_LICENSE("GPL");
749 MODULE_ALIAS("platform:" DRIVER_NAME);
750 MODULE_AUTHOR("Texas Instruments Inc");