1 /* linux/arch/arm/plat-samsung/devs.c
3 * Copyright (c) 2011 Samsung Electronics Co., Ltd.
4 * http://www.samsung.com
6 * Base SAMSUNG platform device definitions
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License version 2 as
10 * published by the Free Software Foundation.
13 #include <linux/amba/pl330.h>
14 #include <linux/kernel.h>
15 #include <linux/types.h>
16 #include <linux/interrupt.h>
17 #include <linux/list.h>
18 #include <linux/timer.h>
19 #include <linux/init.h>
20 #include <linux/serial_core.h>
21 #include <linux/platform_device.h>
23 #include <linux/slab.h>
24 #include <linux/string.h>
25 #include <linux/dma-mapping.h>
27 #include <linux/gfp.h>
28 #include <linux/mtd/mtd.h>
29 #include <linux/mtd/onenand.h>
30 #include <linux/mtd/partitions.h>
31 #include <linux/mmc/host.h>
32 #include <linux/ioport.h>
33 #include <linux/platform_data/s3c-hsudc.h>
34 #include <linux/platform_data/s3c-hsotg.h>
36 #include <media/s5p_hdmi.h>
39 #include <asm/mach/arch.h>
40 #include <asm/mach/map.h>
41 #include <asm/mach/irq.h>
43 #include <mach/hardware.h>
45 #include <mach/irqs.h>
49 #include <plat/devs.h>
51 #include <linux/platform_data/ata-samsung_cf.h>
52 #include <linux/platform_data/usb-ehci-s5p.h>
54 #include <plat/fb-s3c2410.h>
55 #include <plat/hdmi.h>
56 #include <linux/platform_data/hwmon-s3c.h>
57 #include <linux/platform_data/i2c-s3c2410.h>
58 #include <plat/keypad.h>
59 #include <linux/platform_data/mmc-s3cmci.h>
60 #include <linux/platform_data/mtd-nand-s3c2410.h>
61 #include <plat/sdhci.h>
62 #include <linux/platform_data/touchscreen-s3c2410.h>
63 #include <linux/platform_data/usb-s3c2410_udc.h>
64 #include <linux/platform_data/usb-ohci-s3c2410.h>
65 #include <plat/usb-phy.h>
66 #include <plat/regs-serial.h>
67 #include <plat/regs-spi.h>
68 #include <linux/platform_data/spi-s3c64xx.h>
70 static u64 samsung_device_dma_mask = DMA_BIT_MASK(32);
73 #ifdef CONFIG_CPU_S3C2440
74 static struct resource s3c_ac97_resource[] = {
75 [0] = DEFINE_RES_MEM(S3C2440_PA_AC97, S3C2440_SZ_AC97),
76 [1] = DEFINE_RES_IRQ(IRQ_S3C244X_AC97),
77 [2] = DEFINE_RES_DMA_NAMED(DMACH_PCM_OUT, "PCM out"),
78 [3] = DEFINE_RES_DMA_NAMED(DMACH_PCM_IN, "PCM in"),
79 [4] = DEFINE_RES_DMA_NAMED(DMACH_MIC_IN, "Mic in"),
82 struct platform_device s3c_device_ac97 = {
83 .name = "samsung-ac97",
85 .num_resources = ARRAY_SIZE(s3c_ac97_resource),
86 .resource = s3c_ac97_resource,
88 .dma_mask = &samsung_device_dma_mask,
89 .coherent_dma_mask = DMA_BIT_MASK(32),
92 #endif /* CONFIG_CPU_S3C2440 */
96 #ifdef CONFIG_PLAT_S3C24XX
97 static struct resource s3c_adc_resource[] = {
98 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
99 [1] = DEFINE_RES_IRQ(IRQ_TC),
100 [2] = DEFINE_RES_IRQ(IRQ_ADC),
103 struct platform_device s3c_device_adc = {
104 .name = "s3c24xx-adc",
106 .num_resources = ARRAY_SIZE(s3c_adc_resource),
107 .resource = s3c_adc_resource,
109 #endif /* CONFIG_PLAT_S3C24XX */
111 #if defined(CONFIG_SAMSUNG_DEV_ADC)
112 static struct resource s3c_adc_resource[] = {
113 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
114 [1] = DEFINE_RES_IRQ(IRQ_TC),
115 [2] = DEFINE_RES_IRQ(IRQ_ADC),
118 struct platform_device s3c_device_adc = {
119 .name = "samsung-adc",
121 .num_resources = ARRAY_SIZE(s3c_adc_resource),
122 .resource = s3c_adc_resource,
124 #endif /* CONFIG_SAMSUNG_DEV_ADC */
126 /* Camif Controller */
128 #ifdef CONFIG_CPU_S3C2440
129 static struct resource s3c_camif_resource[] = {
130 [0] = DEFINE_RES_MEM(S3C2440_PA_CAMIF, S3C2440_SZ_CAMIF),
131 [1] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_C),
132 [2] = DEFINE_RES_IRQ(IRQ_S3C2440_CAM_P),
135 struct platform_device s3c_device_camif = {
136 .name = "s3c2440-camif",
138 .num_resources = ARRAY_SIZE(s3c_camif_resource),
139 .resource = s3c_camif_resource,
141 .dma_mask = &samsung_device_dma_mask,
142 .coherent_dma_mask = DMA_BIT_MASK(32),
145 #endif /* CONFIG_CPU_S3C2440 */
149 struct platform_device samsung_asoc_idma = {
150 .name = "samsung-idma",
153 .dma_mask = &samsung_device_dma_mask,
154 .coherent_dma_mask = DMA_BIT_MASK(32),
160 #ifdef CONFIG_S3C_DEV_FB
161 static struct resource s3c_fb_resource[] = {
162 [0] = DEFINE_RES_MEM(S3C_PA_FB, SZ_16K),
163 [1] = DEFINE_RES_IRQ(IRQ_LCD_VSYNC),
164 [2] = DEFINE_RES_IRQ(IRQ_LCD_FIFO),
165 [3] = DEFINE_RES_IRQ(IRQ_LCD_SYSTEM),
168 struct platform_device s3c_device_fb = {
171 .num_resources = ARRAY_SIZE(s3c_fb_resource),
172 .resource = s3c_fb_resource,
174 .dma_mask = &samsung_device_dma_mask,
175 .coherent_dma_mask = DMA_BIT_MASK(32),
179 void __init s3c_fb_set_platdata(struct s3c_fb_platdata *pd)
181 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
184 #endif /* CONFIG_S3C_DEV_FB */
188 #ifdef CONFIG_S5P_DEV_FIMC0
189 static struct resource s5p_fimc0_resource[] = {
190 [0] = DEFINE_RES_MEM(S5P_PA_FIMC0, SZ_4K),
191 [1] = DEFINE_RES_IRQ(IRQ_FIMC0),
194 struct platform_device s5p_device_fimc0 = {
197 .num_resources = ARRAY_SIZE(s5p_fimc0_resource),
198 .resource = s5p_fimc0_resource,
200 .dma_mask = &samsung_device_dma_mask,
201 .coherent_dma_mask = DMA_BIT_MASK(32),
205 struct platform_device s5p_device_fimc_md = {
206 .name = "s5p-fimc-md",
209 #endif /* CONFIG_S5P_DEV_FIMC0 */
211 #ifdef CONFIG_S5P_DEV_FIMC1
212 static struct resource s5p_fimc1_resource[] = {
213 [0] = DEFINE_RES_MEM(S5P_PA_FIMC1, SZ_4K),
214 [1] = DEFINE_RES_IRQ(IRQ_FIMC1),
217 struct platform_device s5p_device_fimc1 = {
220 .num_resources = ARRAY_SIZE(s5p_fimc1_resource),
221 .resource = s5p_fimc1_resource,
223 .dma_mask = &samsung_device_dma_mask,
224 .coherent_dma_mask = DMA_BIT_MASK(32),
227 #endif /* CONFIG_S5P_DEV_FIMC1 */
229 #ifdef CONFIG_S5P_DEV_FIMC2
230 static struct resource s5p_fimc2_resource[] = {
231 [0] = DEFINE_RES_MEM(S5P_PA_FIMC2, SZ_4K),
232 [1] = DEFINE_RES_IRQ(IRQ_FIMC2),
235 struct platform_device s5p_device_fimc2 = {
238 .num_resources = ARRAY_SIZE(s5p_fimc2_resource),
239 .resource = s5p_fimc2_resource,
241 .dma_mask = &samsung_device_dma_mask,
242 .coherent_dma_mask = DMA_BIT_MASK(32),
245 #endif /* CONFIG_S5P_DEV_FIMC2 */
247 #ifdef CONFIG_S5P_DEV_FIMC3
248 static struct resource s5p_fimc3_resource[] = {
249 [0] = DEFINE_RES_MEM(S5P_PA_FIMC3, SZ_4K),
250 [1] = DEFINE_RES_IRQ(IRQ_FIMC3),
253 struct platform_device s5p_device_fimc3 = {
256 .num_resources = ARRAY_SIZE(s5p_fimc3_resource),
257 .resource = s5p_fimc3_resource,
259 .dma_mask = &samsung_device_dma_mask,
260 .coherent_dma_mask = DMA_BIT_MASK(32),
263 #endif /* CONFIG_S5P_DEV_FIMC3 */
267 #ifdef CONFIG_S5P_DEV_G2D
268 static struct resource s5p_g2d_resource[] = {
269 [0] = DEFINE_RES_MEM(S5P_PA_G2D, SZ_4K),
270 [1] = DEFINE_RES_IRQ(IRQ_2D),
273 struct platform_device s5p_device_g2d = {
276 .num_resources = ARRAY_SIZE(s5p_g2d_resource),
277 .resource = s5p_g2d_resource,
279 .dma_mask = &samsung_device_dma_mask,
280 .coherent_dma_mask = DMA_BIT_MASK(32),
283 #endif /* CONFIG_S5P_DEV_G2D */
285 #ifdef CONFIG_S5P_DEV_JPEG
286 static struct resource s5p_jpeg_resource[] = {
287 [0] = DEFINE_RES_MEM(S5P_PA_JPEG, SZ_4K),
288 [1] = DEFINE_RES_IRQ(IRQ_JPEG),
291 struct platform_device s5p_device_jpeg = {
294 .num_resources = ARRAY_SIZE(s5p_jpeg_resource),
295 .resource = s5p_jpeg_resource,
297 .dma_mask = &samsung_device_dma_mask,
298 .coherent_dma_mask = DMA_BIT_MASK(32),
301 #endif /* CONFIG_S5P_DEV_JPEG */
305 #ifdef CONFIG_S5P_DEV_FIMD0
306 static struct resource s5p_fimd0_resource[] = {
307 [0] = DEFINE_RES_MEM(S5P_PA_FIMD0, SZ_32K),
308 [1] = DEFINE_RES_IRQ(IRQ_FIMD0_VSYNC),
309 [2] = DEFINE_RES_IRQ(IRQ_FIMD0_FIFO),
310 [3] = DEFINE_RES_IRQ(IRQ_FIMD0_SYSTEM),
313 struct platform_device s5p_device_fimd0 = {
316 .num_resources = ARRAY_SIZE(s5p_fimd0_resource),
317 .resource = s5p_fimd0_resource,
319 .dma_mask = &samsung_device_dma_mask,
320 .coherent_dma_mask = DMA_BIT_MASK(32),
324 void __init s5p_fimd0_set_platdata(struct s3c_fb_platdata *pd)
326 s3c_set_platdata(pd, sizeof(struct s3c_fb_platdata),
329 #endif /* CONFIG_S5P_DEV_FIMD0 */
333 #ifdef CONFIG_S3C_DEV_HWMON
334 struct platform_device s3c_device_hwmon = {
337 .dev.parent = &s3c_device_adc.dev,
340 void __init s3c_hwmon_set_platdata(struct s3c_hwmon_pdata *pd)
342 s3c_set_platdata(pd, sizeof(struct s3c_hwmon_pdata),
345 #endif /* CONFIG_S3C_DEV_HWMON */
349 #ifdef CONFIG_S3C_DEV_HSMMC
350 static struct resource s3c_hsmmc_resource[] = {
351 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC0, SZ_4K),
352 [1] = DEFINE_RES_IRQ(IRQ_HSMMC0),
355 struct s3c_sdhci_platdata s3c_hsmmc0_def_platdata = {
357 .host_caps = (MMC_CAP_4_BIT_DATA |
358 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
361 struct platform_device s3c_device_hsmmc0 = {
364 .num_resources = ARRAY_SIZE(s3c_hsmmc_resource),
365 .resource = s3c_hsmmc_resource,
367 .dma_mask = &samsung_device_dma_mask,
368 .coherent_dma_mask = DMA_BIT_MASK(32),
369 .platform_data = &s3c_hsmmc0_def_platdata,
373 void s3c_sdhci0_set_platdata(struct s3c_sdhci_platdata *pd)
375 s3c_sdhci_set_platdata(pd, &s3c_hsmmc0_def_platdata);
377 #endif /* CONFIG_S3C_DEV_HSMMC */
379 #ifdef CONFIG_S3C_DEV_HSMMC1
380 static struct resource s3c_hsmmc1_resource[] = {
381 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC1, SZ_4K),
382 [1] = DEFINE_RES_IRQ(IRQ_HSMMC1),
385 struct s3c_sdhci_platdata s3c_hsmmc1_def_platdata = {
387 .host_caps = (MMC_CAP_4_BIT_DATA |
388 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
391 struct platform_device s3c_device_hsmmc1 = {
394 .num_resources = ARRAY_SIZE(s3c_hsmmc1_resource),
395 .resource = s3c_hsmmc1_resource,
397 .dma_mask = &samsung_device_dma_mask,
398 .coherent_dma_mask = DMA_BIT_MASK(32),
399 .platform_data = &s3c_hsmmc1_def_platdata,
403 void s3c_sdhci1_set_platdata(struct s3c_sdhci_platdata *pd)
405 s3c_sdhci_set_platdata(pd, &s3c_hsmmc1_def_platdata);
407 #endif /* CONFIG_S3C_DEV_HSMMC1 */
411 #ifdef CONFIG_S3C_DEV_HSMMC2
412 static struct resource s3c_hsmmc2_resource[] = {
413 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC2, SZ_4K),
414 [1] = DEFINE_RES_IRQ(IRQ_HSMMC2),
417 struct s3c_sdhci_platdata s3c_hsmmc2_def_platdata = {
419 .host_caps = (MMC_CAP_4_BIT_DATA |
420 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
423 struct platform_device s3c_device_hsmmc2 = {
426 .num_resources = ARRAY_SIZE(s3c_hsmmc2_resource),
427 .resource = s3c_hsmmc2_resource,
429 .dma_mask = &samsung_device_dma_mask,
430 .coherent_dma_mask = DMA_BIT_MASK(32),
431 .platform_data = &s3c_hsmmc2_def_platdata,
435 void s3c_sdhci2_set_platdata(struct s3c_sdhci_platdata *pd)
437 s3c_sdhci_set_platdata(pd, &s3c_hsmmc2_def_platdata);
439 #endif /* CONFIG_S3C_DEV_HSMMC2 */
441 #ifdef CONFIG_S3C_DEV_HSMMC3
442 static struct resource s3c_hsmmc3_resource[] = {
443 [0] = DEFINE_RES_MEM(S3C_PA_HSMMC3, SZ_4K),
444 [1] = DEFINE_RES_IRQ(IRQ_HSMMC3),
447 struct s3c_sdhci_platdata s3c_hsmmc3_def_platdata = {
449 .host_caps = (MMC_CAP_4_BIT_DATA |
450 MMC_CAP_MMC_HIGHSPEED | MMC_CAP_SD_HIGHSPEED),
453 struct platform_device s3c_device_hsmmc3 = {
456 .num_resources = ARRAY_SIZE(s3c_hsmmc3_resource),
457 .resource = s3c_hsmmc3_resource,
459 .dma_mask = &samsung_device_dma_mask,
460 .coherent_dma_mask = DMA_BIT_MASK(32),
461 .platform_data = &s3c_hsmmc3_def_platdata,
465 void s3c_sdhci3_set_platdata(struct s3c_sdhci_platdata *pd)
467 s3c_sdhci_set_platdata(pd, &s3c_hsmmc3_def_platdata);
469 #endif /* CONFIG_S3C_DEV_HSMMC3 */
473 static struct resource s3c_i2c0_resource[] = {
474 [0] = DEFINE_RES_MEM(S3C_PA_IIC, SZ_4K),
475 [1] = DEFINE_RES_IRQ(IRQ_IIC),
478 struct platform_device s3c_device_i2c0 = {
479 .name = "s3c2410-i2c",
481 .num_resources = ARRAY_SIZE(s3c_i2c0_resource),
482 .resource = s3c_i2c0_resource,
485 struct s3c2410_platform_i2c default_i2c_data __initdata = {
488 .frequency = 100*1000,
492 void __init s3c_i2c0_set_platdata(struct s3c2410_platform_i2c *pd)
494 struct s3c2410_platform_i2c *npd;
497 pd = &default_i2c_data;
501 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
505 npd->cfg_gpio = s3c_i2c0_cfg_gpio;
508 #ifdef CONFIG_S3C_DEV_I2C1
509 static struct resource s3c_i2c1_resource[] = {
510 [0] = DEFINE_RES_MEM(S3C_PA_IIC1, SZ_4K),
511 [1] = DEFINE_RES_IRQ(IRQ_IIC1),
514 struct platform_device s3c_device_i2c1 = {
515 .name = "s3c2410-i2c",
517 .num_resources = ARRAY_SIZE(s3c_i2c1_resource),
518 .resource = s3c_i2c1_resource,
521 void __init s3c_i2c1_set_platdata(struct s3c2410_platform_i2c *pd)
523 struct s3c2410_platform_i2c *npd;
526 pd = &default_i2c_data;
530 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
534 npd->cfg_gpio = s3c_i2c1_cfg_gpio;
536 #endif /* CONFIG_S3C_DEV_I2C1 */
538 #ifdef CONFIG_S3C_DEV_I2C2
539 static struct resource s3c_i2c2_resource[] = {
540 [0] = DEFINE_RES_MEM(S3C_PA_IIC2, SZ_4K),
541 [1] = DEFINE_RES_IRQ(IRQ_IIC2),
544 struct platform_device s3c_device_i2c2 = {
545 .name = "s3c2410-i2c",
547 .num_resources = ARRAY_SIZE(s3c_i2c2_resource),
548 .resource = s3c_i2c2_resource,
551 void __init s3c_i2c2_set_platdata(struct s3c2410_platform_i2c *pd)
553 struct s3c2410_platform_i2c *npd;
556 pd = &default_i2c_data;
560 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
564 npd->cfg_gpio = s3c_i2c2_cfg_gpio;
566 #endif /* CONFIG_S3C_DEV_I2C2 */
568 #ifdef CONFIG_S3C_DEV_I2C3
569 static struct resource s3c_i2c3_resource[] = {
570 [0] = DEFINE_RES_MEM(S3C_PA_IIC3, SZ_4K),
571 [1] = DEFINE_RES_IRQ(IRQ_IIC3),
574 struct platform_device s3c_device_i2c3 = {
575 .name = "s3c2440-i2c",
577 .num_resources = ARRAY_SIZE(s3c_i2c3_resource),
578 .resource = s3c_i2c3_resource,
581 void __init s3c_i2c3_set_platdata(struct s3c2410_platform_i2c *pd)
583 struct s3c2410_platform_i2c *npd;
586 pd = &default_i2c_data;
590 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
594 npd->cfg_gpio = s3c_i2c3_cfg_gpio;
596 #endif /*CONFIG_S3C_DEV_I2C3 */
598 #ifdef CONFIG_S3C_DEV_I2C4
599 static struct resource s3c_i2c4_resource[] = {
600 [0] = DEFINE_RES_MEM(S3C_PA_IIC4, SZ_4K),
601 [1] = DEFINE_RES_IRQ(IRQ_IIC4),
604 struct platform_device s3c_device_i2c4 = {
605 .name = "s3c2440-i2c",
607 .num_resources = ARRAY_SIZE(s3c_i2c4_resource),
608 .resource = s3c_i2c4_resource,
611 void __init s3c_i2c4_set_platdata(struct s3c2410_platform_i2c *pd)
613 struct s3c2410_platform_i2c *npd;
616 pd = &default_i2c_data;
620 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
624 npd->cfg_gpio = s3c_i2c4_cfg_gpio;
626 #endif /*CONFIG_S3C_DEV_I2C4 */
628 #ifdef CONFIG_S3C_DEV_I2C5
629 static struct resource s3c_i2c5_resource[] = {
630 [0] = DEFINE_RES_MEM(S3C_PA_IIC5, SZ_4K),
631 [1] = DEFINE_RES_IRQ(IRQ_IIC5),
634 struct platform_device s3c_device_i2c5 = {
635 .name = "s3c2440-i2c",
637 .num_resources = ARRAY_SIZE(s3c_i2c5_resource),
638 .resource = s3c_i2c5_resource,
641 void __init s3c_i2c5_set_platdata(struct s3c2410_platform_i2c *pd)
643 struct s3c2410_platform_i2c *npd;
646 pd = &default_i2c_data;
650 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
654 npd->cfg_gpio = s3c_i2c5_cfg_gpio;
656 #endif /*CONFIG_S3C_DEV_I2C5 */
658 #ifdef CONFIG_S3C_DEV_I2C6
659 static struct resource s3c_i2c6_resource[] = {
660 [0] = DEFINE_RES_MEM(S3C_PA_IIC6, SZ_4K),
661 [1] = DEFINE_RES_IRQ(IRQ_IIC6),
664 struct platform_device s3c_device_i2c6 = {
665 .name = "s3c2440-i2c",
667 .num_resources = ARRAY_SIZE(s3c_i2c6_resource),
668 .resource = s3c_i2c6_resource,
671 void __init s3c_i2c6_set_platdata(struct s3c2410_platform_i2c *pd)
673 struct s3c2410_platform_i2c *npd;
676 pd = &default_i2c_data;
680 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
684 npd->cfg_gpio = s3c_i2c6_cfg_gpio;
686 #endif /* CONFIG_S3C_DEV_I2C6 */
688 #ifdef CONFIG_S3C_DEV_I2C7
689 static struct resource s3c_i2c7_resource[] = {
690 [0] = DEFINE_RES_MEM(S3C_PA_IIC7, SZ_4K),
691 [1] = DEFINE_RES_IRQ(IRQ_IIC7),
694 struct platform_device s3c_device_i2c7 = {
695 .name = "s3c2440-i2c",
697 .num_resources = ARRAY_SIZE(s3c_i2c7_resource),
698 .resource = s3c_i2c7_resource,
701 void __init s3c_i2c7_set_platdata(struct s3c2410_platform_i2c *pd)
703 struct s3c2410_platform_i2c *npd;
706 pd = &default_i2c_data;
710 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
714 npd->cfg_gpio = s3c_i2c7_cfg_gpio;
716 #endif /* CONFIG_S3C_DEV_I2C7 */
720 #ifdef CONFIG_S5P_DEV_I2C_HDMIPHY
721 static struct resource s5p_i2c_resource[] = {
722 [0] = DEFINE_RES_MEM(S5P_PA_IIC_HDMIPHY, SZ_4K),
723 [1] = DEFINE_RES_IRQ(IRQ_IIC_HDMIPHY),
726 struct platform_device s5p_device_i2c_hdmiphy = {
727 .name = "s3c2440-hdmiphy-i2c",
729 .num_resources = ARRAY_SIZE(s5p_i2c_resource),
730 .resource = s5p_i2c_resource,
733 void __init s5p_i2c_hdmiphy_set_platdata(struct s3c2410_platform_i2c *pd)
735 struct s3c2410_platform_i2c *npd;
738 pd = &default_i2c_data;
740 if (soc_is_exynos4210() ||
741 soc_is_exynos4212() || soc_is_exynos4412())
743 else if (soc_is_s5pv210())
749 npd = s3c_set_platdata(pd, sizeof(struct s3c2410_platform_i2c),
750 &s5p_device_i2c_hdmiphy);
753 static struct s5p_hdmi_platform_data s5p_hdmi_def_platdata;
755 void __init s5p_hdmi_set_platdata(struct i2c_board_info *hdmiphy_info,
756 struct i2c_board_info *mhl_info, int mhl_bus)
758 struct s5p_hdmi_platform_data *pd = &s5p_hdmi_def_platdata;
760 if (soc_is_exynos4210() ||
761 soc_is_exynos4212() || soc_is_exynos4412())
763 else if (soc_is_s5pv210())
768 pd->hdmiphy_info = hdmiphy_info;
769 pd->mhl_info = mhl_info;
770 pd->mhl_bus = mhl_bus;
772 s3c_set_platdata(pd, sizeof(struct s5p_hdmi_platform_data),
776 #endif /* CONFIG_S5P_DEV_I2C_HDMIPHY */
780 #ifdef CONFIG_PLAT_S3C24XX
781 static struct resource s3c_iis_resource[] = {
782 [0] = DEFINE_RES_MEM(S3C24XX_PA_IIS, S3C24XX_SZ_IIS),
785 struct platform_device s3c_device_iis = {
786 .name = "s3c24xx-iis",
788 .num_resources = ARRAY_SIZE(s3c_iis_resource),
789 .resource = s3c_iis_resource,
791 .dma_mask = &samsung_device_dma_mask,
792 .coherent_dma_mask = DMA_BIT_MASK(32),
795 #endif /* CONFIG_PLAT_S3C24XX */
799 #ifdef CONFIG_SAMSUNG_DEV_IDE
800 static struct resource s3c_cfcon_resource[] = {
801 [0] = DEFINE_RES_MEM(SAMSUNG_PA_CFCON, SZ_16K),
802 [1] = DEFINE_RES_IRQ(IRQ_CFCON),
805 struct platform_device s3c_device_cfcon = {
807 .num_resources = ARRAY_SIZE(s3c_cfcon_resource),
808 .resource = s3c_cfcon_resource,
811 void __init s3c_ide_set_platdata(struct s3c_ide_platdata *pdata)
813 s3c_set_platdata(pdata, sizeof(struct s3c_ide_platdata),
816 #endif /* CONFIG_SAMSUNG_DEV_IDE */
820 #ifdef CONFIG_SAMSUNG_DEV_KEYPAD
821 static struct resource samsung_keypad_resources[] = {
822 [0] = DEFINE_RES_MEM(SAMSUNG_PA_KEYPAD, SZ_32),
823 [1] = DEFINE_RES_IRQ(IRQ_KEYPAD),
826 struct platform_device samsung_device_keypad = {
827 .name = "samsung-keypad",
829 .num_resources = ARRAY_SIZE(samsung_keypad_resources),
830 .resource = samsung_keypad_resources,
833 void __init samsung_keypad_set_platdata(struct samsung_keypad_platdata *pd)
835 struct samsung_keypad_platdata *npd;
837 npd = s3c_set_platdata(pd, sizeof(struct samsung_keypad_platdata),
838 &samsung_device_keypad);
841 npd->cfg_gpio = samsung_keypad_cfg_gpio;
843 #endif /* CONFIG_SAMSUNG_DEV_KEYPAD */
847 #ifdef CONFIG_PLAT_S3C24XX
848 static struct resource s3c_lcd_resource[] = {
849 [0] = DEFINE_RES_MEM(S3C24XX_PA_LCD, S3C24XX_SZ_LCD),
850 [1] = DEFINE_RES_IRQ(IRQ_LCD),
853 struct platform_device s3c_device_lcd = {
854 .name = "s3c2410-lcd",
856 .num_resources = ARRAY_SIZE(s3c_lcd_resource),
857 .resource = s3c_lcd_resource,
859 .dma_mask = &samsung_device_dma_mask,
860 .coherent_dma_mask = DMA_BIT_MASK(32),
864 void __init s3c24xx_fb_set_platdata(struct s3c2410fb_mach_info *pd)
866 struct s3c2410fb_mach_info *npd;
868 npd = s3c_set_platdata(pd, sizeof(*npd), &s3c_device_lcd);
870 npd->displays = kmemdup(pd->displays,
871 sizeof(struct s3c2410fb_display) * npd->num_displays,
874 printk(KERN_ERR "no memory for LCD display data\n");
876 printk(KERN_ERR "no memory for LCD platform data\n");
879 #endif /* CONFIG_PLAT_S3C24XX */
883 #ifdef CONFIG_S5P_DEV_CSIS0
884 static struct resource s5p_mipi_csis0_resource[] = {
885 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS0, SZ_16K),
886 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS0),
889 struct platform_device s5p_device_mipi_csis0 = {
890 .name = "s5p-mipi-csis",
892 .num_resources = ARRAY_SIZE(s5p_mipi_csis0_resource),
893 .resource = s5p_mipi_csis0_resource,
895 #endif /* CONFIG_S5P_DEV_CSIS0 */
897 #ifdef CONFIG_S5P_DEV_CSIS1
898 static struct resource s5p_mipi_csis1_resource[] = {
899 [0] = DEFINE_RES_MEM(S5P_PA_MIPI_CSIS1, SZ_16K),
900 [1] = DEFINE_RES_IRQ(IRQ_MIPI_CSIS1),
903 struct platform_device s5p_device_mipi_csis1 = {
904 .name = "s5p-mipi-csis",
906 .num_resources = ARRAY_SIZE(s5p_mipi_csis1_resource),
907 .resource = s5p_mipi_csis1_resource,
913 #ifdef CONFIG_S3C_DEV_NAND
914 static struct resource s3c_nand_resource[] = {
915 [0] = DEFINE_RES_MEM(S3C_PA_NAND, SZ_1M),
918 struct platform_device s3c_device_nand = {
919 .name = "s3c2410-nand",
921 .num_resources = ARRAY_SIZE(s3c_nand_resource),
922 .resource = s3c_nand_resource,
926 * s3c_nand_copy_set() - copy nand set data
927 * @set: The new structure, directly copied from the old.
929 * Copy all the fields from the NAND set field from what is probably __initdata
930 * to new kernel memory. The code returns 0 if the copy happened correctly or
931 * an error code for the calling function to display.
933 * Note, we currently do not try and look to see if we've already copied the
934 * data in a previous set.
936 static int __init s3c_nand_copy_set(struct s3c2410_nand_set *set)
941 size = sizeof(struct mtd_partition) * set->nr_partitions;
943 ptr = kmemdup(set->partitions, size, GFP_KERNEL);
944 set->partitions = ptr;
950 if (set->nr_map && set->nr_chips) {
951 size = sizeof(int) * set->nr_chips;
952 ptr = kmemdup(set->nr_map, size, GFP_KERNEL);
959 if (set->ecc_layout) {
960 ptr = kmemdup(set->ecc_layout,
961 sizeof(struct nand_ecclayout), GFP_KERNEL);
962 set->ecc_layout = ptr;
971 void __init s3c_nand_set_platdata(struct s3c2410_platform_nand *nand)
973 struct s3c2410_platform_nand *npd;
977 /* note, if we get a failure in allocation, we simply drop out of the
978 * function. If there is so little memory available at initialisation
979 * time then there is little chance the system is going to run.
982 npd = s3c_set_platdata(nand, sizeof(struct s3c2410_platform_nand),
987 /* now see if we need to copy any of the nand set data */
989 size = sizeof(struct s3c2410_nand_set) * npd->nr_sets;
991 struct s3c2410_nand_set *from = npd->sets;
992 struct s3c2410_nand_set *to;
995 to = kmemdup(from, size, GFP_KERNEL);
996 npd->sets = to; /* set, even if we failed */
999 printk(KERN_ERR "%s: no memory for sets\n", __func__);
1003 for (i = 0; i < npd->nr_sets; i++) {
1004 ret = s3c_nand_copy_set(to);
1006 printk(KERN_ERR "%s: failed to copy set %d\n",
1014 #endif /* CONFIG_S3C_DEV_NAND */
1018 #ifdef CONFIG_S3C_DEV_ONENAND
1019 static struct resource s3c_onenand_resources[] = {
1020 [0] = DEFINE_RES_MEM(S3C_PA_ONENAND, SZ_1K),
1021 [1] = DEFINE_RES_MEM(S3C_PA_ONENAND_BUF, S3C_SZ_ONENAND_BUF),
1022 [2] = DEFINE_RES_IRQ(IRQ_ONENAND),
1025 struct platform_device s3c_device_onenand = {
1026 .name = "samsung-onenand",
1028 .num_resources = ARRAY_SIZE(s3c_onenand_resources),
1029 .resource = s3c_onenand_resources,
1031 #endif /* CONFIG_S3C_DEV_ONENAND */
1033 #ifdef CONFIG_S3C64XX_DEV_ONENAND1
1034 static struct resource s3c64xx_onenand1_resources[] = {
1035 [0] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1, SZ_1K),
1036 [1] = DEFINE_RES_MEM(S3C64XX_PA_ONENAND1_BUF, S3C64XX_SZ_ONENAND1_BUF),
1037 [2] = DEFINE_RES_IRQ(IRQ_ONENAND1),
1040 struct platform_device s3c64xx_device_onenand1 = {
1041 .name = "samsung-onenand",
1043 .num_resources = ARRAY_SIZE(s3c64xx_onenand1_resources),
1044 .resource = s3c64xx_onenand1_resources,
1047 void __init s3c64xx_onenand1_set_platdata(struct onenand_platform_data *pdata)
1049 s3c_set_platdata(pdata, sizeof(struct onenand_platform_data),
1050 &s3c64xx_device_onenand1);
1052 #endif /* CONFIG_S3C64XX_DEV_ONENAND1 */
1054 #ifdef CONFIG_S5P_DEV_ONENAND
1055 static struct resource s5p_onenand_resources[] = {
1056 [0] = DEFINE_RES_MEM(S5P_PA_ONENAND, SZ_128K),
1057 [1] = DEFINE_RES_MEM(S5P_PA_ONENAND_DMA, SZ_8K),
1058 [2] = DEFINE_RES_IRQ(IRQ_ONENAND_AUDI),
1061 struct platform_device s5p_device_onenand = {
1062 .name = "s5pc110-onenand",
1064 .num_resources = ARRAY_SIZE(s5p_onenand_resources),
1065 .resource = s5p_onenand_resources,
1067 #endif /* CONFIG_S5P_DEV_ONENAND */
1071 #ifdef CONFIG_PLAT_S5P
1072 static struct resource s5p_pmu_resource[] = {
1073 DEFINE_RES_IRQ(IRQ_PMU)
1076 static struct platform_device s5p_device_pmu = {
1079 .num_resources = ARRAY_SIZE(s5p_pmu_resource),
1080 .resource = s5p_pmu_resource,
1083 static int __init s5p_pmu_init(void)
1085 platform_device_register(&s5p_device_pmu);
1088 arch_initcall(s5p_pmu_init);
1089 #endif /* CONFIG_PLAT_S5P */
1093 #ifdef CONFIG_SAMSUNG_DEV_PWM
1095 #define TIMER_RESOURCE_SIZE (1)
1097 #define TIMER_RESOURCE(_tmr, _irq) \
1098 (struct resource [TIMER_RESOURCE_SIZE]) { \
1102 .flags = IORESOURCE_IRQ \
1106 #define DEFINE_S3C_TIMER(_tmr_no, _irq) \
1107 .name = "s3c24xx-pwm", \
1109 .num_resources = TIMER_RESOURCE_SIZE, \
1110 .resource = TIMER_RESOURCE(_tmr_no, _irq), \
1113 * since we already have an static mapping for the timer,
1114 * we do not bother setting any IO resource for the base.
1117 struct platform_device s3c_device_timer[] = {
1118 [0] = { DEFINE_S3C_TIMER(0, IRQ_TIMER0) },
1119 [1] = { DEFINE_S3C_TIMER(1, IRQ_TIMER1) },
1120 [2] = { DEFINE_S3C_TIMER(2, IRQ_TIMER2) },
1121 [3] = { DEFINE_S3C_TIMER(3, IRQ_TIMER3) },
1122 [4] = { DEFINE_S3C_TIMER(4, IRQ_TIMER4) },
1124 #endif /* CONFIG_SAMSUNG_DEV_PWM */
1128 #ifdef CONFIG_PLAT_S3C24XX
1129 static struct resource s3c_rtc_resource[] = {
1130 [0] = DEFINE_RES_MEM(S3C24XX_PA_RTC, SZ_256),
1131 [1] = DEFINE_RES_IRQ(IRQ_RTC),
1132 [2] = DEFINE_RES_IRQ(IRQ_TICK),
1135 struct platform_device s3c_device_rtc = {
1136 .name = "s3c2410-rtc",
1138 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1139 .resource = s3c_rtc_resource,
1141 #endif /* CONFIG_PLAT_S3C24XX */
1143 #ifdef CONFIG_S3C_DEV_RTC
1144 static struct resource s3c_rtc_resource[] = {
1145 [0] = DEFINE_RES_MEM(S3C_PA_RTC, SZ_256),
1146 [1] = DEFINE_RES_IRQ(IRQ_RTC_ALARM),
1147 [2] = DEFINE_RES_IRQ(IRQ_RTC_TIC),
1150 struct platform_device s3c_device_rtc = {
1151 .name = "s3c64xx-rtc",
1153 .num_resources = ARRAY_SIZE(s3c_rtc_resource),
1154 .resource = s3c_rtc_resource,
1156 #endif /* CONFIG_S3C_DEV_RTC */
1160 #ifdef CONFIG_PLAT_S3C24XX
1161 static struct resource s3c_sdi_resource[] = {
1162 [0] = DEFINE_RES_MEM(S3C24XX_PA_SDI, S3C24XX_SZ_SDI),
1163 [1] = DEFINE_RES_IRQ(IRQ_SDI),
1166 struct platform_device s3c_device_sdi = {
1167 .name = "s3c2410-sdi",
1169 .num_resources = ARRAY_SIZE(s3c_sdi_resource),
1170 .resource = s3c_sdi_resource,
1173 void __init s3c24xx_mci_set_platdata(struct s3c24xx_mci_pdata *pdata)
1175 s3c_set_platdata(pdata, sizeof(struct s3c24xx_mci_pdata),
1178 #endif /* CONFIG_PLAT_S3C24XX */
1182 #ifdef CONFIG_PLAT_S3C24XX
1183 static struct resource s3c_spi0_resource[] = {
1184 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI, SZ_32),
1185 [1] = DEFINE_RES_IRQ(IRQ_SPI0),
1188 struct platform_device s3c_device_spi0 = {
1189 .name = "s3c2410-spi",
1191 .num_resources = ARRAY_SIZE(s3c_spi0_resource),
1192 .resource = s3c_spi0_resource,
1194 .dma_mask = &samsung_device_dma_mask,
1195 .coherent_dma_mask = DMA_BIT_MASK(32),
1199 static struct resource s3c_spi1_resource[] = {
1200 [0] = DEFINE_RES_MEM(S3C24XX_PA_SPI1, SZ_32),
1201 [1] = DEFINE_RES_IRQ(IRQ_SPI1),
1204 struct platform_device s3c_device_spi1 = {
1205 .name = "s3c2410-spi",
1207 .num_resources = ARRAY_SIZE(s3c_spi1_resource),
1208 .resource = s3c_spi1_resource,
1210 .dma_mask = &samsung_device_dma_mask,
1211 .coherent_dma_mask = DMA_BIT_MASK(32),
1214 #endif /* CONFIG_PLAT_S3C24XX */
1218 #ifdef CONFIG_PLAT_S3C24XX
1219 static struct resource s3c_ts_resource[] = {
1220 [0] = DEFINE_RES_MEM(S3C24XX_PA_ADC, S3C24XX_SZ_ADC),
1221 [1] = DEFINE_RES_IRQ(IRQ_TC),
1224 struct platform_device s3c_device_ts = {
1225 .name = "s3c2410-ts",
1227 .dev.parent = &s3c_device_adc.dev,
1228 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1229 .resource = s3c_ts_resource,
1232 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *hard_s3c2410ts_info)
1234 s3c_set_platdata(hard_s3c2410ts_info,
1235 sizeof(struct s3c2410_ts_mach_info), &s3c_device_ts);
1237 #endif /* CONFIG_PLAT_S3C24XX */
1239 #ifdef CONFIG_SAMSUNG_DEV_TS
1240 static struct resource s3c_ts_resource[] = {
1241 [0] = DEFINE_RES_MEM(SAMSUNG_PA_ADC, SZ_256),
1242 [1] = DEFINE_RES_IRQ(IRQ_TC),
1245 static struct s3c2410_ts_mach_info default_ts_data __initdata = {
1248 .oversampling_shift = 2,
1251 struct platform_device s3c_device_ts = {
1252 .name = "s3c64xx-ts",
1254 .num_resources = ARRAY_SIZE(s3c_ts_resource),
1255 .resource = s3c_ts_resource,
1258 void __init s3c24xx_ts_set_platdata(struct s3c2410_ts_mach_info *pd)
1261 pd = &default_ts_data;
1263 s3c_set_platdata(pd, sizeof(struct s3c2410_ts_mach_info),
1266 #endif /* CONFIG_SAMSUNG_DEV_TS */
1270 #ifdef CONFIG_S5P_DEV_TV
1272 static struct resource s5p_hdmi_resources[] = {
1273 [0] = DEFINE_RES_MEM(S5P_PA_HDMI, SZ_1M),
1274 [1] = DEFINE_RES_IRQ(IRQ_HDMI),
1277 struct platform_device s5p_device_hdmi = {
1280 .num_resources = ARRAY_SIZE(s5p_hdmi_resources),
1281 .resource = s5p_hdmi_resources,
1284 static struct resource s5p_sdo_resources[] = {
1285 [0] = DEFINE_RES_MEM(S5P_PA_SDO, SZ_64K),
1286 [1] = DEFINE_RES_IRQ(IRQ_SDO),
1289 struct platform_device s5p_device_sdo = {
1292 .num_resources = ARRAY_SIZE(s5p_sdo_resources),
1293 .resource = s5p_sdo_resources,
1296 static struct resource s5p_mixer_resources[] = {
1297 [0] = DEFINE_RES_MEM_NAMED(S5P_PA_MIXER, SZ_64K, "mxr"),
1298 [1] = DEFINE_RES_MEM_NAMED(S5P_PA_VP, SZ_64K, "vp"),
1299 [2] = DEFINE_RES_IRQ_NAMED(IRQ_MIXER, "irq"),
1302 struct platform_device s5p_device_mixer = {
1303 .name = "s5p-mixer",
1305 .num_resources = ARRAY_SIZE(s5p_mixer_resources),
1306 .resource = s5p_mixer_resources,
1308 .dma_mask = &samsung_device_dma_mask,
1309 .coherent_dma_mask = DMA_BIT_MASK(32),
1312 #endif /* CONFIG_S5P_DEV_TV */
1316 #ifdef CONFIG_S3C_DEV_USB_HOST
1317 static struct resource s3c_usb_resource[] = {
1318 [0] = DEFINE_RES_MEM(S3C_PA_USBHOST, SZ_256),
1319 [1] = DEFINE_RES_IRQ(IRQ_USBH),
1322 struct platform_device s3c_device_ohci = {
1323 .name = "s3c2410-ohci",
1325 .num_resources = ARRAY_SIZE(s3c_usb_resource),
1326 .resource = s3c_usb_resource,
1328 .dma_mask = &samsung_device_dma_mask,
1329 .coherent_dma_mask = DMA_BIT_MASK(32),
1334 * s3c_ohci_set_platdata - initialise OHCI device platform data
1335 * @info: The platform data.
1337 * This call copies the @info passed in and sets the device .platform_data
1338 * field to that copy. The @info is copied so that the original can be marked
1342 void __init s3c_ohci_set_platdata(struct s3c2410_hcd_info *info)
1344 s3c_set_platdata(info, sizeof(struct s3c2410_hcd_info),
1347 #endif /* CONFIG_S3C_DEV_USB_HOST */
1349 /* USB Device (Gadget) */
1351 #ifdef CONFIG_PLAT_S3C24XX
1352 static struct resource s3c_usbgadget_resource[] = {
1353 [0] = DEFINE_RES_MEM(S3C24XX_PA_USBDEV, S3C24XX_SZ_USBDEV),
1354 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1357 struct platform_device s3c_device_usbgadget = {
1358 .name = "s3c2410-usbgadget",
1360 .num_resources = ARRAY_SIZE(s3c_usbgadget_resource),
1361 .resource = s3c_usbgadget_resource,
1364 void __init s3c24xx_udc_set_platdata(struct s3c2410_udc_mach_info *pd)
1366 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usbgadget);
1368 #endif /* CONFIG_PLAT_S3C24XX */
1370 /* USB EHCI Host Controller */
1372 #ifdef CONFIG_S5P_DEV_USB_EHCI
1373 static struct resource s5p_ehci_resource[] = {
1374 [0] = DEFINE_RES_MEM(S5P_PA_EHCI, SZ_256),
1375 [1] = DEFINE_RES_IRQ(IRQ_USB_HOST),
1378 struct platform_device s5p_device_ehci = {
1381 .num_resources = ARRAY_SIZE(s5p_ehci_resource),
1382 .resource = s5p_ehci_resource,
1384 .dma_mask = &samsung_device_dma_mask,
1385 .coherent_dma_mask = DMA_BIT_MASK(32),
1389 void __init s5p_ehci_set_platdata(struct s5p_ehci_platdata *pd)
1391 struct s5p_ehci_platdata *npd;
1393 npd = s3c_set_platdata(pd, sizeof(struct s5p_ehci_platdata),
1397 npd->phy_init = s5p_usb_phy_init;
1399 npd->phy_exit = s5p_usb_phy_exit;
1401 #endif /* CONFIG_S5P_DEV_USB_EHCI */
1405 #ifdef CONFIG_S3C_DEV_USB_HSOTG
1406 static struct resource s3c_usb_hsotg_resources[] = {
1407 [0] = DEFINE_RES_MEM(S3C_PA_USB_HSOTG, SZ_128K),
1408 [1] = DEFINE_RES_IRQ(IRQ_OTG),
1411 struct platform_device s3c_device_usb_hsotg = {
1412 .name = "s3c-hsotg",
1414 .num_resources = ARRAY_SIZE(s3c_usb_hsotg_resources),
1415 .resource = s3c_usb_hsotg_resources,
1417 .dma_mask = &samsung_device_dma_mask,
1418 .coherent_dma_mask = DMA_BIT_MASK(32),
1422 void __init s3c_hsotg_set_platdata(struct s3c_hsotg_plat *pd)
1424 struct s3c_hsotg_plat *npd;
1426 npd = s3c_set_platdata(pd, sizeof(struct s3c_hsotg_plat),
1427 &s3c_device_usb_hsotg);
1430 npd->phy_init = s5p_usb_phy_init;
1432 npd->phy_exit = s5p_usb_phy_exit;
1434 #endif /* CONFIG_S3C_DEV_USB_HSOTG */
1436 /* USB High Spped 2.0 Device (Gadget) */
1438 #ifdef CONFIG_PLAT_S3C24XX
1439 static struct resource s3c_hsudc_resource[] = {
1440 [0] = DEFINE_RES_MEM(S3C2416_PA_HSUDC, S3C2416_SZ_HSUDC),
1441 [1] = DEFINE_RES_IRQ(IRQ_USBD),
1444 struct platform_device s3c_device_usb_hsudc = {
1445 .name = "s3c-hsudc",
1447 .num_resources = ARRAY_SIZE(s3c_hsudc_resource),
1448 .resource = s3c_hsudc_resource,
1450 .dma_mask = &samsung_device_dma_mask,
1451 .coherent_dma_mask = DMA_BIT_MASK(32),
1455 void __init s3c24xx_hsudc_set_platdata(struct s3c24xx_hsudc_platdata *pd)
1457 s3c_set_platdata(pd, sizeof(*pd), &s3c_device_usb_hsudc);
1459 #endif /* CONFIG_PLAT_S3C24XX */
1463 #ifdef CONFIG_S3C_DEV_WDT
1464 static struct resource s3c_wdt_resource[] = {
1465 [0] = DEFINE_RES_MEM(S3C_PA_WDT, SZ_1K),
1466 [1] = DEFINE_RES_IRQ(IRQ_WDT),
1469 struct platform_device s3c_device_wdt = {
1470 .name = "s3c2410-wdt",
1472 .num_resources = ARRAY_SIZE(s3c_wdt_resource),
1473 .resource = s3c_wdt_resource,
1475 #endif /* CONFIG_S3C_DEV_WDT */
1477 #ifdef CONFIG_S3C64XX_DEV_SPI0
1478 static struct resource s3c64xx_spi0_resource[] = {
1479 [0] = DEFINE_RES_MEM(S3C_PA_SPI0, SZ_256),
1480 [1] = DEFINE_RES_DMA(DMACH_SPI0_TX),
1481 [2] = DEFINE_RES_DMA(DMACH_SPI0_RX),
1482 [3] = DEFINE_RES_IRQ(IRQ_SPI0),
1485 struct platform_device s3c64xx_device_spi0 = {
1486 .name = "s3c6410-spi",
1488 .num_resources = ARRAY_SIZE(s3c64xx_spi0_resource),
1489 .resource = s3c64xx_spi0_resource,
1491 .dma_mask = &samsung_device_dma_mask,
1492 .coherent_dma_mask = DMA_BIT_MASK(32),
1496 void __init s3c64xx_spi0_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1499 struct s3c64xx_spi_info pd;
1501 /* Reject invalid configuration */
1502 if (!num_cs || src_clk_nr < 0) {
1503 pr_err("%s: Invalid SPI configuration\n", __func__);
1508 pd.src_clk_nr = src_clk_nr;
1509 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi0_cfg_gpio;
1510 #ifdef CONFIG_PL330_DMA
1511 pd.filter = pl330_filter;
1514 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi0);
1516 #endif /* CONFIG_S3C64XX_DEV_SPI0 */
1518 #ifdef CONFIG_S3C64XX_DEV_SPI1
1519 static struct resource s3c64xx_spi1_resource[] = {
1520 [0] = DEFINE_RES_MEM(S3C_PA_SPI1, SZ_256),
1521 [1] = DEFINE_RES_DMA(DMACH_SPI1_TX),
1522 [2] = DEFINE_RES_DMA(DMACH_SPI1_RX),
1523 [3] = DEFINE_RES_IRQ(IRQ_SPI1),
1526 struct platform_device s3c64xx_device_spi1 = {
1527 .name = "s3c6410-spi",
1529 .num_resources = ARRAY_SIZE(s3c64xx_spi1_resource),
1530 .resource = s3c64xx_spi1_resource,
1532 .dma_mask = &samsung_device_dma_mask,
1533 .coherent_dma_mask = DMA_BIT_MASK(32),
1537 void __init s3c64xx_spi1_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1540 struct s3c64xx_spi_info pd;
1542 /* Reject invalid configuration */
1543 if (!num_cs || src_clk_nr < 0) {
1544 pr_err("%s: Invalid SPI configuration\n", __func__);
1549 pd.src_clk_nr = src_clk_nr;
1550 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi1_cfg_gpio;
1551 #ifdef CONFIG_PL330_DMA
1552 pd.filter = pl330_filter;
1555 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi1);
1557 #endif /* CONFIG_S3C64XX_DEV_SPI1 */
1559 #ifdef CONFIG_S3C64XX_DEV_SPI2
1560 static struct resource s3c64xx_spi2_resource[] = {
1561 [0] = DEFINE_RES_MEM(S3C_PA_SPI2, SZ_256),
1562 [1] = DEFINE_RES_DMA(DMACH_SPI2_TX),
1563 [2] = DEFINE_RES_DMA(DMACH_SPI2_RX),
1564 [3] = DEFINE_RES_IRQ(IRQ_SPI2),
1567 struct platform_device s3c64xx_device_spi2 = {
1568 .name = "s3c6410-spi",
1570 .num_resources = ARRAY_SIZE(s3c64xx_spi2_resource),
1571 .resource = s3c64xx_spi2_resource,
1573 .dma_mask = &samsung_device_dma_mask,
1574 .coherent_dma_mask = DMA_BIT_MASK(32),
1578 void __init s3c64xx_spi2_set_platdata(int (*cfg_gpio)(void), int src_clk_nr,
1581 struct s3c64xx_spi_info pd;
1583 /* Reject invalid configuration */
1584 if (!num_cs || src_clk_nr < 0) {
1585 pr_err("%s: Invalid SPI configuration\n", __func__);
1590 pd.src_clk_nr = src_clk_nr;
1591 pd.cfg_gpio = (cfg_gpio) ? cfg_gpio : s3c64xx_spi2_cfg_gpio;
1592 #ifdef CONFIG_PL330_DMA
1593 pd.filter = pl330_filter;
1596 s3c_set_platdata(&pd, sizeof(pd), &s3c64xx_device_spi2);
1598 #endif /* CONFIG_S3C64XX_DEV_SPI2 */