2 * Copyright (C) 2016 Marvell Technology Group Ltd.
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6 * licensing only applies to this file, and not this project as a
9 * a) This library is free software; you can redistribute it and/or
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17 * GNU General Public License for more details.
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44 * Device Tree file for Marvell Armada CP110 Master.
51 compatible = "simple-bus";
52 interrupt-parent = <&gic>;
55 config-space@f2000000 {
58 compatible = "simple-bus";
59 interrupt-parent = <&gic>;
60 ranges = <0x0 0x0 0xf2000000 0x2000000>;
62 cpm_syscon0: system-controller@440000 {
63 compatible = "marvell,cp110-system-controller0",
65 reg = <0x440000 0x1000>;
67 core-clock-output-names =
68 "cpm-apll", "cpm-ppv2-core", "cpm-eip",
69 "cpm-core", "cpm-nand-core";
70 gate-clock-output-names =
71 "cpm-audio", "cpm-communit", "cpm-nand",
72 "cpm-ppv2", "cpm-sdio", "cpm-mg-domain",
73 "cpm-mg-core", "cpm-xor1", "cpm-xor0",
74 "cpm-gop-dp", "none", "cpm-pcie_x10",
75 "cpm-pcie_x11", "cpm-pcie_x4", "cpm-pcie-xor",
76 "cpm-sata", "cpm-sata-usb", "cpm-main",
77 "cpm-sd-mmc-gop", "none", "none",
78 "cpm-slow-io", "cpm-usb3h0", "cpm-usb3h1",
79 "cpm-usb3dev", "cpm-eip150", "cpm-eip197";
83 compatible = "marvell,armada-8k-rtc";
84 reg = <0x284000 0x20>, <0x284080 0x24>;
85 reg-names = "rtc", "rtc-soc";
86 interrupts = <GIC_SPI 71 IRQ_TYPE_LEVEL_HIGH>;
89 cpm_sata0: sata@540000 {
90 compatible = "marvell,armada-8k-ahci",
92 reg = <0x540000 0x30000>;
93 interrupts = <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
94 clocks = <&cpm_syscon0 1 15>;
98 cpm_usb3_0: usb3@500000 {
99 compatible = "marvell,armada-8k-xhci",
101 reg = <0x500000 0x4000>;
103 interrupts = <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>;
104 clocks = <&cpm_syscon0 1 22>;
108 cpm_usb3_1: usb3@510000 {
109 compatible = "marvell,armada-8k-xhci",
111 reg = <0x510000 0x4000>;
113 interrupts = <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>;
114 clocks = <&cpm_syscon0 1 23>;
118 cpm_xor0: xor@6a0000 {
119 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
120 reg = <0x6a0000 0x1000>,
123 msi-parent = <&gic_v2m0>;
124 clocks = <&cpm_syscon0 1 8>;
127 cpm_xor1: xor@6c0000 {
128 compatible = "marvell,armada-7k-xor", "marvell,xor-v2";
129 reg = <0x6c0000 0x1000>,
132 msi-parent = <&gic_v2m0>;
133 clocks = <&cpm_syscon0 1 7>;
136 cpm_spi0: spi@700600 {
137 compatible = "marvell,armada-380-spi";
138 reg = <0x700600 0x50>;
139 #address-cells = <0x1>;
142 clocks = <&cpm_syscon0 1 21>;
146 cpm_spi1: spi@700680 {
147 compatible = "marvell,armada-380-spi";
148 reg = <0x700680 0x50>;
149 #address-cells = <1>;
152 clocks = <&cpm_syscon0 1 21>;
156 cpm_i2c0: i2c@701000 {
157 compatible = "marvell,mv78230-i2c";
158 reg = <0x701000 0x20>;
159 #address-cells = <1>;
161 interrupts = <GIC_SPI 86 IRQ_TYPE_LEVEL_HIGH>;
162 clocks = <&cpm_syscon0 1 21>;
166 cpm_i2c1: i2c@701100 {
167 compatible = "marvell,mv78230-i2c";
168 reg = <0x701100 0x20>;
169 #address-cells = <1>;
171 interrupts = <GIC_SPI 87 IRQ_TYPE_LEVEL_HIGH>;
172 clocks = <&cpm_syscon0 1 21>;
176 cpm_trng: trng@760000 {
177 compatible = "marvell,armada-8k-rng", "inside-secure,safexcel-eip76";
178 reg = <0x760000 0x7d>;
179 interrupts = <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>;
180 clocks = <&cpm_syscon0 1 25>;
185 cpm_pcie0: pcie@f2600000 {
186 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
187 reg = <0 0xf2600000 0 0x10000>,
188 <0 0xf6f00000 0 0x80000>;
189 reg-names = "ctrl", "config";
190 #address-cells = <3>;
192 #interrupt-cells = <1>;
195 msi-parent = <&gic_v2m0>;
197 bus-range = <0 0xff>;
200 <0x81000000 0 0xf9000000 0 0xf9000000 0 0x10000
201 /* non-prefetchable memory */
202 0x82000000 0 0xf6000000 0 0xf6000000 0 0xf00000>;
203 interrupt-map-mask = <0 0 0 0>;
204 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
205 interrupts = <GIC_SPI 32 IRQ_TYPE_LEVEL_HIGH>;
207 clocks = <&cpm_syscon0 1 13>;
211 cpm_pcie1: pcie@f2620000 {
212 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
213 reg = <0 0xf2620000 0 0x10000>,
214 <0 0xf7f00000 0 0x80000>;
215 reg-names = "ctrl", "config";
216 #address-cells = <3>;
218 #interrupt-cells = <1>;
221 msi-parent = <&gic_v2m0>;
223 bus-range = <0 0xff>;
226 <0x81000000 0 0xf9010000 0 0xf9010000 0 0x10000
227 /* non-prefetchable memory */
228 0x82000000 0 0xf7000000 0 0xf7000000 0 0xf00000>;
229 interrupt-map-mask = <0 0 0 0>;
230 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
231 interrupts = <GIC_SPI 34 IRQ_TYPE_LEVEL_HIGH>;
234 clocks = <&cpm_syscon0 1 11>;
238 cpm_pcie2: pcie@f2640000 {
239 compatible = "marvell,armada8k-pcie", "snps,dw-pcie";
240 reg = <0 0xf2640000 0 0x10000>,
241 <0 0xf8f00000 0 0x80000>;
242 reg-names = "ctrl", "config";
243 #address-cells = <3>;
245 #interrupt-cells = <1>;
248 msi-parent = <&gic_v2m0>;
250 bus-range = <0 0xff>;
253 <0x81000000 0 0xf9020000 0 0xf9020000 0 0x10000
254 /* non-prefetchable memory */
255 0x82000000 0 0xf8000000 0 0xf8000000 0 0xf00000>;
256 interrupt-map-mask = <0 0 0 0>;
257 interrupt-map = <0 0 0 0 &gic 0 GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
258 interrupts = <GIC_SPI 33 IRQ_TYPE_LEVEL_HIGH>;
261 clocks = <&cpm_syscon0 1 12>;