arch/arm64/boot/dts/renesas/r8a7795.dtsi

   1 /*
   2  * Device Tree Source for the r8a7795 SoC
   3  *
   4  * Copyright (C) 2015 Renesas Electronics Corp.
   5  *
   6  * This file is licensed under the terms of the GNU General Public License
   7  * version 2.  This program is licensed "as is" without any warranty of any
   8  * kind, whether express or implied.
   9  */
  10
  11 #include <dt-bindings/clock/r8a7795-cpg-mssr.h>
  12 #include <dt-bindings/interrupt-controller/arm-gic.h>
  13
  14 / {
  15         compatible = "renesas,r8a7795";
  16         #address-cells = <2>;
  17         #size-cells = <2>;
  18
  19         aliases {
  20                 i2c0 = &i2c0;
  21                 i2c1 = &i2c1;
  22                 i2c2 = &i2c2;
  23                 i2c3 = &i2c3;
  24                 i2c4 = &i2c4;
  25                 i2c5 = &i2c5;
  26                 i2c6 = &i2c6;
  27         };
  28
  29         psci {
  30                 compatible = "arm,psci-0.2";
  31                 method = "smc";
  32         };
  33
  34         cpus {
  35                 #address-cells = <1>;
  36                 #size-cells = <0>;
  37
  38                 a57_0: cpu@0 {
  39                         compatible = "arm,cortex-a57", "arm,armv8";
  40                         reg = <0x0>;
  41                         device_type = "cpu";
  42                         next-level-cache = <&L2_CA57>;
  43                         enable-method = "psci";
  44                 };
  45
  46                 a57_1: cpu@1 {
  47                         compatible = "arm,cortex-a57","arm,armv8";
  48                         reg = <0x1>;
  49                         device_type = "cpu";
  50                         next-level-cache = <&L2_CA57>;
  51                         enable-method = "psci";
  52                 };
  53                 a57_2: cpu@2 {
  54                         compatible = "arm,cortex-a57","arm,armv8";
  55                         reg = <0x2>;
  56                         device_type = "cpu";
  57                         next-level-cache = <&L2_CA57>;
  58                         enable-method = "psci";
  59                 };
  60                 a57_3: cpu@3 {
  61                         compatible = "arm,cortex-a57","arm,armv8";
  62                         reg = <0x3>;
  63                         device_type = "cpu";
  64                         next-level-cache = <&L2_CA57>;
  65                         enable-method = "psci";
  66                 };
  67         };
  68
  69         L2_CA57: cache-controller@0 {
  70                 compatible = "cache";
  71                 cache-unified;
  72                 cache-level = <2>;
  73         };
  74
  75         L2_CA53: cache-controller@1 {
  76                 compatible = "cache";
  77                 cache-unified;
  78                 cache-level = <2>;
  79         };
  80
  81         extal_clk: extal {
  82                 compatible = "fixed-clock";
  83                 #clock-cells = <0>;
  84                 /* This value must be overridden by the board */
  85                 clock-frequency = <0>;
  86         };
  87
  88         extalr_clk: extalr {
  89                 compatible = "fixed-clock";
  90                 #clock-cells = <0>;
  91                 /* This value must be overridden by the board */
  92                 clock-frequency = <0>;
  93         };
  94
  95         /*
  96          * The external audio clocks are configured as 0 Hz fixed frequency
  97          * clocks by default.
  98          * Boards that provide audio clocks should override them.
  99          */
 100         audio_clk_a: audio_clk_a {
 101                 compatible = "fixed-clock";
 102                 #clock-cells = <0>;
 103                 clock-frequency = <0>;
 104         };
 105
 106         audio_clk_b: audio_clk_b {
 107                 compatible = "fixed-clock";
 108                 #clock-cells = <0>;
 109                 clock-frequency = <0>;
 110         };
 111
 112         audio_clk_c: audio_clk_c {
 113                 compatible = "fixed-clock";
 114                 #clock-cells = <0>;
 115                 clock-frequency = <0>;
 116         };
 117
 118         /* External CAN clock - to be overridden by boards that provide it */
 119         can_clk: can {
 120                 compatible = "fixed-clock";
 121                 #clock-cells = <0>;
 122                 clock-frequency = <0>;
 123         };
 124
 125         /* External SCIF clock - to be overridden by boards that provide it */
 126         scif_clk: scif {
 127                 compatible = "fixed-clock";
 128                 #clock-cells = <0>;
 129                 clock-frequency = <0>;
 130         };
 131
 132         /* External PCIe clock - can be overridden by the board */
 133         pcie_bus_clk: pcie_bus {
 134                 compatible = "fixed-clock";
 135                 #clock-cells = <0>;
 136                 clock-frequency = <0>;
 137         };
 138
 139         soc {
 140                 compatible = "simple-bus";
 141                 interrupt-parent = <&gic>;
 142
 143                 #address-cells = <2>;
 144                 #size-cells = <2>;
 145                 ranges;
 146
 147                 gic: interrupt-controller@0xf1010000 {
 148                         compatible = "arm,gic-400";
 149                         #interrupt-cells = <3>;
 150                         #address-cells = <0>;
 151                         interrupt-controller;
 152                         reg = <0x0 0xf1010000 0 0x1000>,
 153                               <0x0 0xf1020000 0 0x2000>,
 154                               <0x0 0xf1040000 0 0x20000>,
 155                               <0x0 0xf1060000 0 0x2000>;
 156                         interrupts = <GIC_PPI 9
 157                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_HIGH)>;
 158                 };
 159
 160                 gpio0: gpio@e6050000 {
 161                         compatible = "renesas,gpio-r8a7795",
 162                                      "renesas,gpio-rcar";
 163                         reg = <0 0xe6050000 0 0x50>;
 164                         interrupts = <GIC_SPI 4 IRQ_TYPE_LEVEL_HIGH>;
 165                         #gpio-cells = <2>;
 166                         gpio-controller;
 167                         gpio-ranges = <&pfc 0 0 16>;
 168                         #interrupt-cells = <2>;
 169                         interrupt-controller;
 170                         clocks = <&cpg CPG_MOD 912>;
 171                         power-domains = <&cpg>;
 172                 };
 173
 174                 gpio1: gpio@e6051000 {
 175                         compatible = "renesas,gpio-r8a7795",
 176                                      "renesas,gpio-rcar";
 177                         reg = <0 0xe6051000 0 0x50>;
 178                         interrupts = <GIC_SPI 5 IRQ_TYPE_LEVEL_HIGH>;
 179                         #gpio-cells = <2>;
 180                         gpio-controller;
 181                         gpio-ranges = <&pfc 0 32 28>;
 182                         #interrupt-cells = <2>;
 183                         interrupt-controller;
 184                         clocks = <&cpg CPG_MOD 911>;
 185                         power-domains = <&cpg>;
 186                 };
 187
 188                 gpio2: gpio@e6052000 {
 189                         compatible = "renesas,gpio-r8a7795",
 190                                      "renesas,gpio-rcar";
 191                         reg = <0 0xe6052000 0 0x50>;
 192                         interrupts = <GIC_SPI 6 IRQ_TYPE_LEVEL_HIGH>;
 193                         #gpio-cells = <2>;
 194                         gpio-controller;
 195                         gpio-ranges = <&pfc 0 64 15>;
 196                         #interrupt-cells = <2>;
 197                         interrupt-controller;
 198                         clocks = <&cpg CPG_MOD 910>;
 199                         power-domains = <&cpg>;
 200                 };
 201
 202                 gpio3: gpio@e6053000 {
 203                         compatible = "renesas,gpio-r8a7795",
 204                                      "renesas,gpio-rcar";
 205                         reg = <0 0xe6053000 0 0x50>;
 206                         interrupts = <GIC_SPI 7 IRQ_TYPE_LEVEL_HIGH>;
 207                         #gpio-cells = <2>;
 208                         gpio-controller;
 209                         gpio-ranges = <&pfc 0 96 16>;
 210                         #interrupt-cells = <2>;
 211                         interrupt-controller;
 212                         clocks = <&cpg CPG_MOD 909>;
 213                         power-domains = <&cpg>;
 214                 };
 215
 216                 gpio4: gpio@e6054000 {
 217                         compatible = "renesas,gpio-r8a7795",
 218                                      "renesas,gpio-rcar";
 219                         reg = <0 0xe6054000 0 0x50>;
 220                         interrupts = <GIC_SPI 8 IRQ_TYPE_LEVEL_HIGH>;
 221                         #gpio-cells = <2>;
 222                         gpio-controller;
 223                         gpio-ranges = <&pfc 0 128 18>;
 224                         #interrupt-cells = <2>;
 225                         interrupt-controller;
 226                         clocks = <&cpg CPG_MOD 908>;
 227                         power-domains = <&cpg>;
 228                 };
 229
 230                 gpio5: gpio@e6055000 {
 231                         compatible = "renesas,gpio-r8a7795",
 232                                      "renesas,gpio-rcar";
 233                         reg = <0 0xe6055000 0 0x50>;
 234                         interrupts = <GIC_SPI 9 IRQ_TYPE_LEVEL_HIGH>;
 235                         #gpio-cells = <2>;
 236                         gpio-controller;
 237                         gpio-ranges = <&pfc 0 160 26>;
 238                         #interrupt-cells = <2>;
 239                         interrupt-controller;
 240                         clocks = <&cpg CPG_MOD 907>;
 241                         power-domains = <&cpg>;
 242                 };
 243
 244                 gpio6: gpio@e6055400 {
 245                         compatible = "renesas,gpio-r8a7795",
 246                                      "renesas,gpio-rcar";
 247                         reg = <0 0xe6055400 0 0x50>;
 248                         interrupts = <GIC_SPI 10 IRQ_TYPE_LEVEL_HIGH>;
 249                         #gpio-cells = <2>;
 250                         gpio-controller;
 251                         gpio-ranges = <&pfc 0 192 32>;
 252                         #interrupt-cells = <2>;
 253                         interrupt-controller;
 254                         clocks = <&cpg CPG_MOD 906>;
 255                         power-domains = <&cpg>;
 256                 };
 257
 258                 gpio7: gpio@e6055800 {
 259                         compatible = "renesas,gpio-r8a7795",
 260                                      "renesas,gpio-rcar";
 261                         reg = <0 0xe6055800 0 0x50>;
 262                         interrupts = <GIC_SPI 11 IRQ_TYPE_LEVEL_HIGH>;
 263                         #gpio-cells = <2>;
 264                         gpio-controller;
 265                         gpio-ranges = <&pfc 0 224 4>;
 266                         #interrupt-cells = <2>;
 267                         interrupt-controller;
 268                         clocks = <&cpg CPG_MOD 905>;
 269                         power-domains = <&cpg>;
 270                 };
 271
 272                 pmu_a57 {
 273                         compatible = "arm,cortex-a57-pmu";
 274                         interrupts = <GIC_SPI 72 IRQ_TYPE_LEVEL_HIGH>,
 275                                      <GIC_SPI 73 IRQ_TYPE_LEVEL_HIGH>,
 276                                      <GIC_SPI 74 IRQ_TYPE_LEVEL_HIGH>,
 277                                      <GIC_SPI 75 IRQ_TYPE_LEVEL_HIGH>;
 278                         interrupt-affinity = <&a57_0>,
 279                                              <&a57_1>,
 280                                              <&a57_2>,
 281                                              <&a57_3>;
 282                 };
 283
 284                 timer {
 285                         compatible = "arm,armv8-timer";
 286                         interrupts = <GIC_PPI 13
 287                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 288                                      <GIC_PPI 14
 289                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 290                                      <GIC_PPI 11
 291                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>,
 292                                      <GIC_PPI 10
 293                                         (GIC_CPU_MASK_SIMPLE(4) | IRQ_TYPE_LEVEL_LOW)>;
 294                 };
 295
 296                 cpg: clock-controller@e6150000 {
 297                         compatible = "renesas,r8a7795-cpg-mssr";
 298                         reg = <0 0xe6150000 0 0x1000>;
 299                         clocks = <&extal_clk>, <&extalr_clk>;
 300                         clock-names = "extal", "extalr";
 301                         #clock-cells = <2>;
 302                         #power-domain-cells = <0>;
 303                 };
 304
 305                 audma0: dma-controller@ec700000 {
 306                         compatible = "renesas,rcar-dmac";
 307                         reg = <0 0xec700000 0 0x10000>;
 308                         interrupts = <GIC_SPI 350 IRQ_TYPE_LEVEL_HIGH
 309                                       GIC_SPI 320 IRQ_TYPE_LEVEL_HIGH
 310                                       GIC_SPI 321 IRQ_TYPE_LEVEL_HIGH
 311                                       GIC_SPI 322 IRQ_TYPE_LEVEL_HIGH
 312                                       GIC_SPI 323 IRQ_TYPE_LEVEL_HIGH
 313                                       GIC_SPI 324 IRQ_TYPE_LEVEL_HIGH
 314                                       GIC_SPI 325 IRQ_TYPE_LEVEL_HIGH
 315                                       GIC_SPI 326 IRQ_TYPE_LEVEL_HIGH
 316                                       GIC_SPI 327 IRQ_TYPE_LEVEL_HIGH
 317                                       GIC_SPI 328 IRQ_TYPE_LEVEL_HIGH
 318                                       GIC_SPI 329 IRQ_TYPE_LEVEL_HIGH
 319                                       GIC_SPI 330 IRQ_TYPE_LEVEL_HIGH
 320                                       GIC_SPI 331 IRQ_TYPE_LEVEL_HIGH
 321                                       GIC_SPI 332 IRQ_TYPE_LEVEL_HIGH
 322                                       GIC_SPI 333 IRQ_TYPE_LEVEL_HIGH
 323                                       GIC_SPI 334 IRQ_TYPE_LEVEL_HIGH
 324                                       GIC_SPI 335 IRQ_TYPE_LEVEL_HIGH>;
 325                         interrupt-names = "error",
 326                                         "ch0", "ch1", "ch2", "ch3",
 327                                         "ch4", "ch5", "ch6", "ch7",
 328                                         "ch8", "ch9", "ch10", "ch11",
 329                                         "ch12", "ch13", "ch14", "ch15";
 330                         clocks = <&cpg CPG_MOD 502>;
 331                         clock-names = "fck";
 332                         power-domains = <&cpg>;
 333                         #dma-cells = <1>;
 334                         dma-channels = <16>;
 335                 };
 336
 337                 audma1: dma-controller@ec720000 {
 338                         compatible = "renesas,rcar-dmac";
 339                         reg = <0 0xec720000 0 0x10000>;
 340                         interrupts = <GIC_SPI 351 IRQ_TYPE_LEVEL_HIGH
 341                                       GIC_SPI 336 IRQ_TYPE_LEVEL_HIGH
 342                                       GIC_SPI 337 IRQ_TYPE_LEVEL_HIGH
 343                                       GIC_SPI 338 IRQ_TYPE_LEVEL_HIGH
 344                                       GIC_SPI 339 IRQ_TYPE_LEVEL_HIGH
 345                                       GIC_SPI 340 IRQ_TYPE_LEVEL_HIGH
 346                                       GIC_SPI 341 IRQ_TYPE_LEVEL_HIGH
 347                                       GIC_SPI 342 IRQ_TYPE_LEVEL_HIGH
 348                                       GIC_SPI 343 IRQ_TYPE_LEVEL_HIGH
 349                                       GIC_SPI 344 IRQ_TYPE_LEVEL_HIGH
 350                                       GIC_SPI 345 IRQ_TYPE_LEVEL_HIGH
 351                                       GIC_SPI 346 IRQ_TYPE_LEVEL_HIGH
 352                                       GIC_SPI 347 IRQ_TYPE_LEVEL_HIGH
 353                                       GIC_SPI 348 IRQ_TYPE_LEVEL_HIGH
 354                                       GIC_SPI 349 IRQ_TYPE_LEVEL_HIGH
 355                                       GIC_SPI 382 IRQ_TYPE_LEVEL_HIGH
 356                                       GIC_SPI 383 IRQ_TYPE_LEVEL_HIGH>;
 357                         interrupt-names = "error",
 358                                         "ch0", "ch1", "ch2", "ch3",
 359                                         "ch4", "ch5", "ch6", "ch7",
 360                                         "ch8", "ch9", "ch10", "ch11",
 361                                         "ch12", "ch13", "ch14", "ch15";
 362                         clocks = <&cpg CPG_MOD 501>;
 363                         clock-names = "fck";
 364                         power-domains = <&cpg>;
 365                         #dma-cells = <1>;
 366                         dma-channels = <16>;
 367                 };
 368
 369                 pfc: pfc@e6060000 {
 370                         compatible = "renesas,pfc-r8a7795";
 371                         reg = <0 0xe6060000 0 0x50c>;
 372                 };
 373
 374                 intc_ex: interrupt-controller@e61c0000 {
 375                         compatible = "renesas,intc-ex-r8a7795", "renesas,irqc";
 376                         #interrupt-cells = <2>;
 377                         interrupt-controller;
 378                         reg = <0 0xe61c0000 0 0x200>;
 379                         interrupts = <GIC_SPI 0 IRQ_TYPE_LEVEL_HIGH
 380                                       GIC_SPI 1 IRQ_TYPE_LEVEL_HIGH
 381                                       GIC_SPI 2 IRQ_TYPE_LEVEL_HIGH
 382                                       GIC_SPI 3 IRQ_TYPE_LEVEL_HIGH
 383                                       GIC_SPI 18 IRQ_TYPE_LEVEL_HIGH
 384                                       GIC_SPI 161 IRQ_TYPE_LEVEL_HIGH>;
 385                         clocks = <&cpg CPG_MOD 407>;
 386                         power-domains = <&cpg>;
 387                 };
 388
 389                 dmac0: dma-controller@e6700000 {
 390                         compatible = "renesas,dmac-r8a7795",
 391                                      "renesas,rcar-dmac";
 392                         reg = <0 0xe6700000 0 0x10000>;
 393                         interrupts = <GIC_SPI 199 IRQ_TYPE_LEVEL_HIGH
 394                                       GIC_SPI 200 IRQ_TYPE_LEVEL_HIGH
 395                                       GIC_SPI 201 IRQ_TYPE_LEVEL_HIGH
 396                                       GIC_SPI 202 IRQ_TYPE_LEVEL_HIGH
 397                                       GIC_SPI 203 IRQ_TYPE_LEVEL_HIGH
 398                                       GIC_SPI 204 IRQ_TYPE_LEVEL_HIGH
 399                                       GIC_SPI 205 IRQ_TYPE_LEVEL_HIGH
 400                                       GIC_SPI 206 IRQ_TYPE_LEVEL_HIGH
 401                                       GIC_SPI 207 IRQ_TYPE_LEVEL_HIGH
 402                                       GIC_SPI 208 IRQ_TYPE_LEVEL_HIGH
 403                                       GIC_SPI 209 IRQ_TYPE_LEVEL_HIGH
 404                                       GIC_SPI 210 IRQ_TYPE_LEVEL_HIGH
 405                                       GIC_SPI 211 IRQ_TYPE_LEVEL_HIGH
 406                                       GIC_SPI 212 IRQ_TYPE_LEVEL_HIGH
 407                                       GIC_SPI 213 IRQ_TYPE_LEVEL_HIGH
 408                                       GIC_SPI 214 IRQ_TYPE_LEVEL_HIGH
 409                                       GIC_SPI 215 IRQ_TYPE_LEVEL_HIGH>;
 410                         interrupt-names = "error",
 411                                         "ch0", "ch1", "ch2", "ch3",
 412                                         "ch4", "ch5", "ch6", "ch7",
 413                                         "ch8", "ch9", "ch10", "ch11",
 414                                         "ch12", "ch13", "ch14", "ch15";
 415                         clocks = <&cpg CPG_MOD 219>;
 416                         clock-names = "fck";
 417                         power-domains = <&cpg>;
 418                         #dma-cells = <1>;
 419                         dma-channels = <16>;
 420                 };
 421
 422                 dmac1: dma-controller@e7300000 {
 423                         compatible = "renesas,dmac-r8a7795",
 424                                      "renesas,rcar-dmac";
 425                         reg = <0 0xe7300000 0 0x10000>;
 426                         interrupts = <GIC_SPI 220 IRQ_TYPE_LEVEL_HIGH
 427                                       GIC_SPI 216 IRQ_TYPE_LEVEL_HIGH
 428                                       GIC_SPI 217 IRQ_TYPE_LEVEL_HIGH
 429                                       GIC_SPI 218 IRQ_TYPE_LEVEL_HIGH
 430                                       GIC_SPI 219 IRQ_TYPE_LEVEL_HIGH
 431                                       GIC_SPI 308 IRQ_TYPE_LEVEL_HIGH
 432                                       GIC_SPI 309 IRQ_TYPE_LEVEL_HIGH
 433                                       GIC_SPI 310 IRQ_TYPE_LEVEL_HIGH
 434                                       GIC_SPI 311 IRQ_TYPE_LEVEL_HIGH
 435                                       GIC_SPI 312 IRQ_TYPE_LEVEL_HIGH
 436                                       GIC_SPI 313 IRQ_TYPE_LEVEL_HIGH
 437                                       GIC_SPI 314 IRQ_TYPE_LEVEL_HIGH
 438                                       GIC_SPI 315 IRQ_TYPE_LEVEL_HIGH
 439                                       GIC_SPI 316 IRQ_TYPE_LEVEL_HIGH
 440                                       GIC_SPI 317 IRQ_TYPE_LEVEL_HIGH
 441                                       GIC_SPI 318 IRQ_TYPE_LEVEL_HIGH
 442                                       GIC_SPI 319 IRQ_TYPE_LEVEL_HIGH>;
 443                         interrupt-names = "error",
 444                                         "ch0", "ch1", "ch2", "ch3",
 445                                         "ch4", "ch5", "ch6", "ch7",
 446                                         "ch8", "ch9", "ch10", "ch11",
 447                                         "ch12", "ch13", "ch14", "ch15";
 448                         clocks = <&cpg CPG_MOD 218>;
 449                         clock-names = "fck";
 450                         power-domains = <&cpg>;
 451                         #dma-cells = <1>;
 452                         dma-channels = <16>;
 453                 };
 454
 455                 dmac2: dma-controller@e7310000 {
 456                         compatible = "renesas,dmac-r8a7795",
 457                                      "renesas,rcar-dmac";
 458                         reg = <0 0xe7310000 0 0x10000>;
 459                         interrupts = <GIC_SPI 416 IRQ_TYPE_LEVEL_HIGH
 460                                       GIC_SPI 417 IRQ_TYPE_LEVEL_HIGH
 461                                       GIC_SPI 418 IRQ_TYPE_LEVEL_HIGH
 462                                       GIC_SPI 419 IRQ_TYPE_LEVEL_HIGH
 463                                       GIC_SPI 420 IRQ_TYPE_LEVEL_HIGH
 464                                       GIC_SPI 421 IRQ_TYPE_LEVEL_HIGH
 465                                       GIC_SPI 422 IRQ_TYPE_LEVEL_HIGH
 466                                       GIC_SPI 423 IRQ_TYPE_LEVEL_HIGH
 467                                       GIC_SPI 424 IRQ_TYPE_LEVEL_HIGH
 468                                       GIC_SPI 425 IRQ_TYPE_LEVEL_HIGH
 469                                       GIC_SPI 426 IRQ_TYPE_LEVEL_HIGH
 470                                       GIC_SPI 427 IRQ_TYPE_LEVEL_HIGH
 471                                       GIC_SPI 428 IRQ_TYPE_LEVEL_HIGH
 472                                       GIC_SPI 429 IRQ_TYPE_LEVEL_HIGH
 473                                       GIC_SPI 430 IRQ_TYPE_LEVEL_HIGH
 474                                       GIC_SPI 431 IRQ_TYPE_LEVEL_HIGH
 475                                       GIC_SPI 397 IRQ_TYPE_LEVEL_HIGH>;
 476                         interrupt-names = "error",
 477                                         "ch0", "ch1", "ch2", "ch3",
 478                                         "ch4", "ch5", "ch6", "ch7",
 479                                         "ch8", "ch9", "ch10", "ch11",
 480                                         "ch12", "ch13", "ch14", "ch15";
 481                         clocks = <&cpg CPG_MOD 217>;
 482                         clock-names = "fck";
 483                         power-domains = <&cpg>;
 484                         #dma-cells = <1>;
 485                         dma-channels = <16>;
 486                 };
 487
 488                 avb: ethernet@e6800000 {
 489                         compatible = "renesas,etheravb-r8a7795",
 490                                      "renesas,etheravb-rcar-gen3";
 491                         reg = <0 0xe6800000 0 0x800>, <0 0xe6a00000 0 0x10000>;
 492                         interrupts = <GIC_SPI 39 IRQ_TYPE_LEVEL_HIGH>,
 493                                      <GIC_SPI 40 IRQ_TYPE_LEVEL_HIGH>,
 494                                      <GIC_SPI 41 IRQ_TYPE_LEVEL_HIGH>,
 495                                      <GIC_SPI 42 IRQ_TYPE_LEVEL_HIGH>,
 496                                      <GIC_SPI 43 IRQ_TYPE_LEVEL_HIGH>,
 497                                      <GIC_SPI 44 IRQ_TYPE_LEVEL_HIGH>,
 498                                      <GIC_SPI 45 IRQ_TYPE_LEVEL_HIGH>,
 499                                      <GIC_SPI 46 IRQ_TYPE_LEVEL_HIGH>,
 500                                      <GIC_SPI 47 IRQ_TYPE_LEVEL_HIGH>,
 501                                      <GIC_SPI 48 IRQ_TYPE_LEVEL_HIGH>,
 502                                      <GIC_SPI 49 IRQ_TYPE_LEVEL_HIGH>,
 503                                      <GIC_SPI 50 IRQ_TYPE_LEVEL_HIGH>,
 504                                      <GIC_SPI 51 IRQ_TYPE_LEVEL_HIGH>,
 505                                      <GIC_SPI 52 IRQ_TYPE_LEVEL_HIGH>,
 506                                      <GIC_SPI 53 IRQ_TYPE_LEVEL_HIGH>,
 507                                      <GIC_SPI 54 IRQ_TYPE_LEVEL_HIGH>,
 508                                      <GIC_SPI 55 IRQ_TYPE_LEVEL_HIGH>,
 509                                      <GIC_SPI 56 IRQ_TYPE_LEVEL_HIGH>,
 510                                      <GIC_SPI 57 IRQ_TYPE_LEVEL_HIGH>,
 511                                      <GIC_SPI 58 IRQ_TYPE_LEVEL_HIGH>,
 512                                      <GIC_SPI 59 IRQ_TYPE_LEVEL_HIGH>,
 513                                      <GIC_SPI 60 IRQ_TYPE_LEVEL_HIGH>,
 514                                      <GIC_SPI 61 IRQ_TYPE_LEVEL_HIGH>,
 515                                      <GIC_SPI 62 IRQ_TYPE_LEVEL_HIGH>,
 516                                      <GIC_SPI 63 IRQ_TYPE_LEVEL_HIGH>;
 517                         interrupt-names = "ch0", "ch1", "ch2", "ch3",
 518                                           "ch4", "ch5", "ch6", "ch7",
 519                                           "ch8", "ch9", "ch10", "ch11",
 520                                           "ch12", "ch13", "ch14", "ch15",
 521                                           "ch16", "ch17", "ch18", "ch19",
 522                                           "ch20", "ch21", "ch22", "ch23",
 523                                           "ch24";
 524                         clocks = <&cpg CPG_MOD 812>;
 525                         power-domains = <&cpg>;
 526                         phy-mode = "rgmii-id";
 527                         #address-cells = <1>;
 528                         #size-cells = <0>;
 529                 };
 530
 531                 can0: can@e6c30000 {
 532                         compatible = "renesas,can-r8a7795",
 533                                      "renesas,rcar-gen3-can";
 534                         reg = <0 0xe6c30000 0 0x1000>;
 535                         interrupts = <GIC_SPI 186 IRQ_TYPE_LEVEL_HIGH>;
 536                         clocks = <&cpg CPG_MOD 916>,
 537                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 538                                <&can_clk>;
 539                         clock-names = "clkp1", "clkp2", "can_clk";
 540                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 541                         assigned-clock-rates = <40000000>;
 542                         power-domains = <&cpg>;
 543                         status = "disabled";
 544                 };
 545
 546                 can1: can@e6c38000 {
 547                         compatible = "renesas,can-r8a7795",
 548                                      "renesas,rcar-gen3-can";
 549                         reg = <0 0xe6c38000 0 0x1000>;
 550                         interrupts = <GIC_SPI 187 IRQ_TYPE_LEVEL_HIGH>;
 551                         clocks = <&cpg CPG_MOD 915>,
 552                                <&cpg CPG_CORE R8A7795_CLK_CANFD>,
 553                                <&can_clk>;
 554                         clock-names = "clkp1", "clkp2", "can_clk";
 555                         assigned-clocks = <&cpg CPG_CORE R8A7795_CLK_CANFD>;
 556                         assigned-clock-rates = <40000000>;
 557                         power-domains = <&cpg>;
 558                         status = "disabled";
 559                 };
 560
 561                 hscif0: serial@e6540000 {
 562                         compatible = "renesas,hscif-r8a7795",
 563                                      "renesas,rcar-gen3-hscif",
 564                                      "renesas,hscif";
 565                         reg = <0 0xe6540000 0 96>;
 566                         interrupts = <GIC_SPI 154 IRQ_TYPE_LEVEL_HIGH>;
 567                         clocks = <&cpg CPG_MOD 520>,
 568                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 569                                  <&scif_clk>;
 570                         clock-names = "fck", "brg_int", "scif_clk";
 571                         dmas = <&dmac1 0x31>, <&dmac1 0x30>;
 572                         dma-names = "tx", "rx";
 573                         power-domains = <&cpg>;
 574                         status = "disabled";
 575                 };
 576
 577                 hscif1: serial@e6550000 {
 578                         compatible = "renesas,hscif-r8a7795",
 579                                      "renesas,rcar-gen3-hscif",
 580                                      "renesas,hscif";
 581                         reg = <0 0xe6550000 0 96>;
 582                         interrupts = <GIC_SPI 155 IRQ_TYPE_LEVEL_HIGH>;
 583                         clocks = <&cpg CPG_MOD 519>,
 584                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 585                                  <&scif_clk>;
 586                         clock-names = "fck", "brg_int", "scif_clk";
 587                         dmas = <&dmac1 0x33>, <&dmac1 0x32>;
 588                         dma-names = "tx", "rx";
 589                         power-domains = <&cpg>;
 590                         status = "disabled";
 591                 };
 592
 593                 hscif2: serial@e6560000 {
 594                         compatible = "renesas,hscif-r8a7795",
 595                                      "renesas,rcar-gen3-hscif",
 596                                      "renesas,hscif";
 597                         reg = <0 0xe6560000 0 96>;
 598                         interrupts = <GIC_SPI 144 IRQ_TYPE_LEVEL_HIGH>;
 599                         clocks = <&cpg CPG_MOD 518>,
 600                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 601                                  <&scif_clk>;
 602                         clock-names = "fck", "brg_int", "scif_clk";
 603                         dmas = <&dmac1 0x35>, <&dmac1 0x34>;
 604                         dma-names = "tx", "rx";
 605                         power-domains = <&cpg>;
 606                         status = "disabled";
 607                 };
 608
 609                 hscif3: serial@e66a0000 {
 610                         compatible = "renesas,hscif-r8a7795",
 611                                      "renesas,rcar-gen3-hscif",
 612                                      "renesas,hscif";
 613                         reg = <0 0xe66a0000 0 96>;
 614                         interrupts = <GIC_SPI 145 IRQ_TYPE_LEVEL_HIGH>;
 615                         clocks = <&cpg CPG_MOD 517>,
 616                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 617                                  <&scif_clk>;
 618                         clock-names = "fck", "brg_int", "scif_clk";
 619                         dmas = <&dmac0 0x37>, <&dmac0 0x36>;
 620                         dma-names = "tx", "rx";
 621                         power-domains = <&cpg>;
 622                         status = "disabled";
 623                 };
 624
 625                 hscif4: serial@e66b0000 {
 626                         compatible = "renesas,hscif-r8a7795",
 627                                      "renesas,rcar-gen3-hscif",
 628                                      "renesas,hscif";
 629                         reg = <0 0xe66b0000 0 96>;
 630                         interrupts = <GIC_SPI 146 IRQ_TYPE_LEVEL_HIGH>;
 631                         clocks = <&cpg CPG_MOD 516>,
 632                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 633                                  <&scif_clk>;
 634                         clock-names = "fck", "brg_int", "scif_clk";
 635                         dmas = <&dmac0 0x39>, <&dmac0 0x38>;
 636                         dma-names = "tx", "rx";
 637                         power-domains = <&cpg>;
 638                         status = "disabled";
 639                 };
 640
 641                 scif0: serial@e6e60000 {
 642                         compatible = "renesas,scif-r8a7795",
 643                                      "renesas,rcar-gen3-scif", "renesas,scif";
 644                         reg = <0 0xe6e60000 0 64>;
 645                         interrupts = <GIC_SPI 152 IRQ_TYPE_LEVEL_HIGH>;
 646                         clocks = <&cpg CPG_MOD 207>,
 647                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 648                                  <&scif_clk>;
 649                         clock-names = "fck", "brg_int", "scif_clk";
 650                         dmas = <&dmac1 0x51>, <&dmac1 0x50>;
 651                         dma-names = "tx", "rx";
 652                         power-domains = <&cpg>;
 653                         status = "disabled";
 654                 };
 655
 656                 scif1: serial@e6e68000 {
 657                         compatible = "renesas,scif-r8a7795",
 658                                      "renesas,rcar-gen3-scif", "renesas,scif";
 659                         reg = <0 0xe6e68000 0 64>;
 660                         interrupts = <GIC_SPI 153 IRQ_TYPE_LEVEL_HIGH>;
 661                         clocks = <&cpg CPG_MOD 206>,
 662                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 663                                  <&scif_clk>;
 664                         clock-names = "fck", "brg_int", "scif_clk";
 665                         dmas = <&dmac1 0x53>, <&dmac1 0x52>;
 666                         dma-names = "tx", "rx";
 667                         power-domains = <&cpg>;
 668                         status = "disabled";
 669                 };
 670
 671                 scif2: serial@e6e88000 {
 672                         compatible = "renesas,scif-r8a7795",
 673                                      "renesas,rcar-gen3-scif", "renesas,scif";
 674                         reg = <0 0xe6e88000 0 64>;
 675                         interrupts = <GIC_SPI 164 IRQ_TYPE_LEVEL_HIGH>;
 676                         clocks = <&cpg CPG_MOD 310>,
 677                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 678                                  <&scif_clk>;
 679                         clock-names = "fck", "brg_int", "scif_clk";
 680                         dmas = <&dmac1 0x13>, <&dmac1 0x12>;
 681                         dma-names = "tx", "rx";
 682                         power-domains = <&cpg>;
 683                         status = "disabled";
 684                 };
 685
 686                 scif3: serial@e6c50000 {
 687                         compatible = "renesas,scif-r8a7795",
 688                                      "renesas,rcar-gen3-scif", "renesas,scif";
 689                         reg = <0 0xe6c50000 0 64>;
 690                         interrupts = <GIC_SPI 23 IRQ_TYPE_LEVEL_HIGH>;
 691                         clocks = <&cpg CPG_MOD 204>,
 692                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 693                                  <&scif_clk>;
 694                         clock-names = "fck", "brg_int", "scif_clk";
 695                         dmas = <&dmac0 0x57>, <&dmac0 0x56>;
 696                         dma-names = "tx", "rx";
 697                         power-domains = <&cpg>;
 698                         status = "disabled";
 699                 };
 700
 701                 scif4: serial@e6c40000 {
 702                         compatible = "renesas,scif-r8a7795",
 703                                      "renesas,rcar-gen3-scif", "renesas,scif";
 704                         reg = <0 0xe6c40000 0 64>;
 705                         interrupts = <GIC_SPI 16 IRQ_TYPE_LEVEL_HIGH>;
 706                         clocks = <&cpg CPG_MOD 203>,
 707                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 708                                  <&scif_clk>;
 709                         clock-names = "fck", "brg_int", "scif_clk";
 710                         dmas = <&dmac0 0x59>, <&dmac0 0x58>;
 711                         dma-names = "tx", "rx";
 712                         power-domains = <&cpg>;
 713                         status = "disabled";
 714                 };
 715
 716                 scif5: serial@e6f30000 {
 717                         compatible = "renesas,scif-r8a7795",
 718                                      "renesas,rcar-gen3-scif", "renesas,scif";
 719                         reg = <0 0xe6f30000 0 64>;
 720                         interrupts = <GIC_SPI 17 IRQ_TYPE_LEVEL_HIGH>;
 721                         clocks = <&cpg CPG_MOD 202>,
 722                                  <&cpg CPG_CORE R8A7795_CLK_S3D1>,
 723                                  <&scif_clk>;
 724                         clock-names = "fck", "brg_int", "scif_clk";
 725                         dmas = <&dmac1 0x5b>, <&dmac1 0x5a>;
 726                         dma-names = "tx", "rx";
 727                         power-domains = <&cpg>;
 728                         status = "disabled";
 729                 };
 730
 731                 i2c0: i2c@e6500000 {
 732                         #address-cells = <1>;
 733                         #size-cells = <0>;
 734                         compatible = "renesas,i2c-r8a7795";
 735                         reg = <0 0xe6500000 0 0x40>;
 736                         interrupts = <GIC_SPI 287 IRQ_TYPE_LEVEL_HIGH>;
 737                         clocks = <&cpg CPG_MOD 931>;
 738                         power-domains = <&cpg>;
 739                         i2c-scl-internal-delay-ns = <110>;
 740                         status = "disabled";
 741                 };
 742
 743                 i2c1: i2c@e6508000 {
 744                         #address-cells = <1>;
 745                         #size-cells = <0>;
 746                         compatible = "renesas,i2c-r8a7795";
 747                         reg = <0 0xe6508000 0 0x40>;
 748                         interrupts = <GIC_SPI 288 IRQ_TYPE_LEVEL_HIGH>;
 749                         clocks = <&cpg CPG_MOD 930>;
 750                         power-domains = <&cpg>;
 751                         i2c-scl-internal-delay-ns = <6>;
 752                         status = "disabled";
 753                 };
 754
 755                 i2c2: i2c@e6510000 {
 756                         #address-cells = <1>;
 757                         #size-cells = <0>;
 758                         compatible = "renesas,i2c-r8a7795";
 759                         reg = <0 0xe6510000 0 0x40>;
 760                         interrupts = <GIC_SPI 286 IRQ_TYPE_LEVEL_HIGH>;
 761                         clocks = <&cpg CPG_MOD 929>;
 762                         power-domains = <&cpg>;
 763                         i2c-scl-internal-delay-ns = <6>;
 764                         status = "disabled";
 765                 };
 766
 767                 i2c3: i2c@e66d0000 {
 768                         #address-cells = <1>;
 769                         #size-cells = <0>;
 770                         compatible = "renesas,i2c-r8a7795";
 771                         reg = <0 0xe66d0000 0 0x40>;
 772                         interrupts = <GIC_SPI 290 IRQ_TYPE_LEVEL_HIGH>;
 773                         clocks = <&cpg CPG_MOD 928>;
 774                         power-domains = <&cpg>;
 775                         i2c-scl-internal-delay-ns = <110>;
 776                         status = "disabled";
 777                 };
 778
 779                 i2c4: i2c@e66d8000 {
 780                         #address-cells = <1>;
 781                         #size-cells = <0>;
 782                         compatible = "renesas,i2c-r8a7795";
 783                         reg = <0 0xe66d8000 0 0x40>;
 784                         interrupts = <GIC_SPI 19 IRQ_TYPE_LEVEL_HIGH>;
 785                         clocks = <&cpg CPG_MOD 927>;
 786                         power-domains = <&cpg>;
 787                         i2c-scl-internal-delay-ns = <110>;
 788                         status = "disabled";
 789                 };
 790
 791                 i2c5: i2c@e66e0000 {
 792                         #address-cells = <1>;
 793                         #size-cells = <0>;
 794                         compatible = "renesas,i2c-r8a7795";
 795                         reg = <0 0xe66e0000 0 0x40>;
 796                         interrupts = <GIC_SPI 20 IRQ_TYPE_LEVEL_HIGH>;
 797                         clocks = <&cpg CPG_MOD 919>;
 798                         power-domains = <&cpg>;
 799                         i2c-scl-internal-delay-ns = <110>;
 800                         status = "disabled";
 801                 };
 802
 803                 i2c6: i2c@e66e8000 {
 804                         #address-cells = <1>;
 805                         #size-cells = <0>;
 806                         compatible = "renesas,i2c-r8a7795";
 807                         reg = <0 0xe66e8000 0 0x40>;
 808                         interrupts = <GIC_SPI 21 IRQ_TYPE_LEVEL_HIGH>;
 809                         clocks = <&cpg CPG_MOD 918>;
 810                         power-domains = <&cpg>;
 811                         i2c-scl-internal-delay-ns = <6>;
 812                         status = "disabled";
 813                 };
 814
 815                 rcar_sound: sound@ec500000 {
 816                         /*
 817                          * #sound-dai-cells is required
 818                          *
 819                          * Single DAI : #sound-dai-cells = <0>; <&rcar_sound>;
 820                          * Multi  DAI : #sound-dai-cells = <1>; <&rcar_sound N>;
 821                          */
 822                         /*
 823                          * #clock-cells is required for audio_clkout0/1/2/3
 824                          *
 825                          * clkout       : #clock-cells = <0>;   <&rcar_sound>;
 826                          * clkout0/1/2/3: #clock-cells = <1>;   <&rcar_sound N>;
 827                          */
 828                         compatible =  "renesas,rcar_sound-r8a7795", "renesas,rcar_sound-gen3";
 829                         reg =   <0 0xec500000 0 0x1000>, /* SCU */
 830                                 <0 0xec5a0000 0 0x100>,  /* ADG */
 831                                 <0 0xec540000 0 0x1000>, /* SSIU */
 832                                 <0 0xec541000 0 0x280>,  /* SSI */
 833                                 <0 0xec740000 0 0x200>;  /* Audio DMAC peri peri*/
 834                         reg-names = "scu", "adg", "ssiu", "ssi", "audmapp";
 835
 836                         clocks = <&cpg CPG_MOD 1005>,
 837                                  <&cpg CPG_MOD 1006>, <&cpg CPG_MOD 1007>,
 838                                  <&cpg CPG_MOD 1008>, <&cpg CPG_MOD 1009>,
 839                                  <&cpg CPG_MOD 1010>, <&cpg CPG_MOD 1011>,
 840                                  <&cpg CPG_MOD 1012>, <&cpg CPG_MOD 1013>,
 841                                  <&cpg CPG_MOD 1014>, <&cpg CPG_MOD 1015>,
 842                                  <&cpg CPG_MOD 1022>, <&cpg CPG_MOD 1023>,
 843                                  <&cpg CPG_MOD 1024>, <&cpg CPG_MOD 1025>,
 844                                  <&cpg CPG_MOD 1026>, <&cpg CPG_MOD 1027>,
 845                                  <&cpg CPG_MOD 1028>, <&cpg CPG_MOD 1029>,
 846                                  <&cpg CPG_MOD 1030>, <&cpg CPG_MOD 1031>,
 847                                  <&cpg CPG_MOD 1019>, <&cpg CPG_MOD 1018>,
 848                                  <&audio_clk_a>, <&audio_clk_b>,
 849                                  <&audio_clk_c>,
 850                                  <&cpg CPG_CORE R8A7795_CLK_S0D4>;
 851                         clock-names = "ssi-all",
 852                                       "ssi.9", "ssi.8", "ssi.7", "ssi.6",
 853                                       "ssi.5", "ssi.4", "ssi.3", "ssi.2",
 854                                       "ssi.1", "ssi.0",
 855                                       "src.9", "src.8", "src.7", "src.6",
 856                                       "src.5", "src.4", "src.3", "src.2",
 857                                       "src.1", "src.0",
 858                                       "dvc.0", "dvc.1",
 859                                       "clk_a", "clk_b", "clk_c", "clk_i";
 860                         power-domains = <&cpg>;
 861                         status = "disabled";
 862
 863                         rcar_sound,dvc {
 864                                 dvc0: dvc@0 {
 865                                         dmas = <&audma0 0xbc>;
 866                                         dma-names = "tx";
 867                                 };
 868                                 dvc1: dvc@1 {
 869                                         dmas = <&audma0 0xbe>;
 870                                         dma-names = "tx";
 871                                 };
 872                         };
 873
 874                         rcar_sound,src {
 875                                 src0: src@0 {
 876                                         interrupts = <GIC_SPI 352 IRQ_TYPE_LEVEL_HIGH>;
 877                                         dmas = <&audma0 0x85>, <&audma1 0x9a>;
 878                                         dma-names = "rx", "tx";
 879                                 };
 880                                 src1: src@1 {
 881                                         interrupts = <GIC_SPI 353 IRQ_TYPE_LEVEL_HIGH>;
 882                                         dmas = <&audma0 0x87>, <&audma1 0x9c>;
 883                                         dma-names = "rx", "tx";
 884                                 };
 885                                 src2: src@2 {
 886                                         interrupts = <GIC_SPI 354 IRQ_TYPE_LEVEL_HIGH>;
 887                                         dmas = <&audma0 0x89>, <&audma1 0x9e>;
 888                                         dma-names = "rx", "tx";
 889                                 };
 890                                 src3: src@3 {
 891                                         interrupts = <GIC_SPI 355 IRQ_TYPE_LEVEL_HIGH>;
 892                                         dmas = <&audma0 0x8b>, <&audma1 0xa0>;
 893                                         dma-names = "rx", "tx";
 894                                 };
 895                                 src4: src@4 {
 896                                         interrupts = <GIC_SPI 356 IRQ_TYPE_LEVEL_HIGH>;
 897                                         dmas = <&audma0 0x8d>, <&audma1 0xb0>;
 898                                         dma-names = "rx", "tx";
 899                                 };
 900                                 src5: src@5 {
 901                                         interrupts = <GIC_SPI 357 IRQ_TYPE_LEVEL_HIGH>;
 902                                         dmas = <&audma0 0x8f>, <&audma1 0xb2>;
 903                                         dma-names = "rx", "tx";
 904                                 };
 905                                 src6: src@6 {
 906                                         interrupts = <GIC_SPI 358 IRQ_TYPE_LEVEL_HIGH>;
 907                                         dmas = <&audma0 0x91>, <&audma1 0xb4>;
 908                                         dma-names = "rx", "tx";
 909                                 };
 910                                 src7: src@7 {
 911                                         interrupts = <GIC_SPI 359 IRQ_TYPE_LEVEL_HIGH>;
 912                                         dmas = <&audma0 0x93>, <&audma1 0xb6>;
 913                                         dma-names = "rx", "tx";
 914                                 };
 915                                 src8: src@8 {
 916                                         interrupts = <GIC_SPI 360 IRQ_TYPE_LEVEL_HIGH>;
 917                                         dmas = <&audma0 0x95>, <&audma1 0xb8>;
 918                                         dma-names = "rx", "tx";
 919                                 };
 920                                 src9: src@9 {
 921                                         interrupts = <GIC_SPI 361 IRQ_TYPE_LEVEL_HIGH>;
 922                                         dmas = <&audma0 0x97>, <&audma1 0xba>;
 923                                         dma-names = "rx", "tx";
 924                                 };
 925                         };
 926
 927                         rcar_sound,ssi {
 928                                 ssi0: ssi@0 {
 929                                         interrupts = <GIC_SPI 370 IRQ_TYPE_LEVEL_HIGH>;
 930                                         dmas = <&audma0 0x01>, <&audma1 0x02>, <&audma0 0x15>, <&audma1 0x16>;
 931                                         dma-names = "rx", "tx", "rxu", "txu";
 932                                 };
 933                                 ssi1: ssi@1 {
 934                                          interrupts = <GIC_SPI 371 IRQ_TYPE_LEVEL_HIGH>;
 935                                         dmas = <&audma0 0x03>, <&audma1 0x04>, <&audma0 0x49>, <&audma1 0x4a>;
 936                                         dma-names = "rx", "tx", "rxu", "txu";
 937                                 };
 938                                 ssi2: ssi@2 {
 939                                         interrupts = <GIC_SPI 372 IRQ_TYPE_LEVEL_HIGH>;
 940                                         dmas = <&audma0 0x05>, <&audma1 0x06>, <&audma0 0x63>, <&audma1 0x64>;
 941                                         dma-names = "rx", "tx", "rxu", "txu";
 942                                 };
 943                                 ssi3: ssi@3 {
 944                                         interrupts = <GIC_SPI 373 IRQ_TYPE_LEVEL_HIGH>;
 945                                         dmas = <&audma0 0x07>, <&audma1 0x08>, <&audma0 0x6f>, <&audma1 0x70>;
 946                                         dma-names = "rx", "tx", "rxu", "txu";
 947                                 };
 948                                 ssi4: ssi@4 {
 949                                         interrupts = <GIC_SPI 374 IRQ_TYPE_LEVEL_HIGH>;
 950                                         dmas = <&audma0 0x09>, <&audma1 0x0a>, <&audma0 0x71>, <&audma1 0x72>;
 951                                         dma-names = "rx", "tx", "rxu", "txu";
 952                                 };
 953                                 ssi5: ssi@5 {
 954                                         interrupts = <GIC_SPI 375 IRQ_TYPE_LEVEL_HIGH>;
 955                                         dmas = <&audma0 0x0b>, <&audma1 0x0c>, <&audma0 0x73>, <&audma1 0x74>;
 956                                         dma-names = "rx", "tx", "rxu", "txu";
 957                                 };
 958                                 ssi6: ssi@6 {
 959                                         interrupts = <GIC_SPI 376 IRQ_TYPE_LEVEL_HIGH>;
 960                                         dmas = <&audma0 0x0d>, <&audma1 0x0e>, <&audma0 0x75>, <&audma1 0x76>;
 961                                         dma-names = "rx", "tx", "rxu", "txu";
 962                                 };
 963                                 ssi7: ssi@7 {
 964                                         interrupts = <GIC_SPI 377 IRQ_TYPE_LEVEL_HIGH>;
 965                                         dmas = <&audma0 0x0f>, <&audma1 0x10>, <&audma0 0x79>, <&audma1 0x7a>;
 966                                         dma-names = "rx", "tx", "rxu", "txu";
 967                                 };
 968                                 ssi8: ssi@8 {
 969                                         interrupts = <GIC_SPI 378 IRQ_TYPE_LEVEL_HIGH>;
 970                                         dmas = <&audma0 0x11>, <&audma1 0x12>, <&audma0 0x7b>, <&audma1 0x7c>;
 971                                         dma-names = "rx", "tx", "rxu", "txu";
 972                                 };
 973                                 ssi9: ssi@9 {
 974                                         interrupts = <GIC_SPI 379 IRQ_TYPE_LEVEL_HIGH>;
 975                                         dmas = <&audma0 0x13>, <&audma1 0x14>, <&audma0 0x7d>, <&audma1 0x7e>;
 976                                         dma-names = "rx", "tx", "rxu", "txu";
 977                                 };
 978                         };
 979                 };
 980
 981                 sata: sata@ee300000 {
 982                         compatible = "renesas,sata-r8a7795";
 983                         reg = <0 0xee300000 0 0x1fff>;
 984                         interrupts = <GIC_SPI 105 IRQ_TYPE_LEVEL_HIGH>;
 985                         clocks = <&cpg CPG_MOD 815>;
 986                         status = "disabled";
 987                 };
 988
 989                 xhci0: usb@ee000000 {
 990                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
 991                         reg = <0 0xee000000 0 0xc00>;
 992                         interrupts = <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>;
 993                         clocks = <&cpg CPG_MOD 328>;
 994                         power-domains = <&cpg>;
 995                         status = "disabled";
 996                 };
 997
 998                 xhci1: usb@ee0400000 {
 999                         compatible = "renesas,xhci-r8a7795", "renesas,rcar-gen3-xhci";
1000                         reg = <0 0xee040000 0 0xc00>;
1001                         interrupts = <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>;
1002                         clocks = <&cpg CPG_MOD 327>;
1003                         power-domains = <&cpg>;
1004                         status = "disabled";
1005                 };
1006
1007                 usb_dmac0: dma-controller@e65a0000 {
1008                         compatible = "renesas,r8a7795-usb-dmac",
1009                                      "renesas,usb-dmac";
1010                         reg = <0 0xe65a0000 0 0x100>;
1011                         interrupts = <GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH
1012                                       GIC_SPI 109 IRQ_TYPE_LEVEL_HIGH>;
1013                         interrupt-names = "ch0", "ch1";
1014                         clocks = <&cpg CPG_MOD 330>;
1015                         power-domains = <&cpg>;
1016                         #dma-cells = <1>;
1017                         dma-channels = <2>;
1018                 };
1019
1020                 usb_dmac1: dma-controller@e65b0000 {
1021                         compatible = "renesas,r8a7795-usb-dmac",
1022                                      "renesas,usb-dmac";
1023                         reg = <0 0xe65b0000 0 0x100>;
1024                         interrupts = <GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH
1025                                       GIC_SPI 110 IRQ_TYPE_LEVEL_HIGH>;
1026                         interrupt-names = "ch0", "ch1";
1027                         clocks = <&cpg CPG_MOD 331>;
1028                         power-domains = <&cpg>;
1029                         #dma-cells = <1>;
1030                         dma-channels = <2>;
1031                 };
1032
1033                 sdhi0: sd@ee100000 {
1034                         compatible = "renesas,sdhi-r8a7795";
1035                         reg = <0 0xee100000 0 0x2000>;
1036                         interrupts = <GIC_SPI 165 IRQ_TYPE_LEVEL_HIGH>;
1037                         clocks = <&cpg CPG_MOD 314>;
1038                         power-domains = <&cpg>;
1039                         status = "disabled";
1040                 };
1041
1042                 sdhi1: sd@ee120000 {
1043                         compatible = "renesas,sdhi-r8a7795";
1044                         reg = <0 0xee120000 0 0x2000>;
1045                         interrupts = <GIC_SPI 166 IRQ_TYPE_LEVEL_HIGH>;
1046                         clocks = <&cpg CPG_MOD 313>;
1047                         power-domains = <&cpg>;
1048                         status = "disabled";
1049                 };
1050
1051                 sdhi2: sd@ee140000 {
1052                         compatible = "renesas,sdhi-r8a7795";
1053                         reg = <0 0xee140000 0 0x2000>;
1054                         interrupts = <GIC_SPI 167 IRQ_TYPE_LEVEL_HIGH>;
1055                         clocks = <&cpg CPG_MOD 312>;
1056                         power-domains = <&cpg>;
1057                         cap-mmc-highspeed;
1058                         status = "disabled";
1059                 };
1060
1061                 sdhi3: sd@ee160000 {
1062                         compatible = "renesas,sdhi-r8a7795";
1063                         reg = <0 0xee160000 0 0x2000>;
1064                         interrupts = <GIC_SPI 168 IRQ_TYPE_LEVEL_HIGH>;
1065                         clocks = <&cpg CPG_MOD 311>;
1066                         power-domains = <&cpg>;
1067                         cap-mmc-highspeed;
1068                         status = "disabled";
1069                 };
1070
1071                 usb2_phy0: usb-phy@ee080200 {
1072                         compatible = "renesas,usb2-phy-r8a7795";
1073                         reg = <0 0xee080200 0 0x700>;
1074                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1075                         clocks = <&cpg CPG_MOD 703>;
1076                         power-domains = <&cpg>;
1077                         #phy-cells = <0>;
1078                         status = "disabled";
1079                 };
1080
1081                 usb2_phy1: usb-phy@ee0a0200 {
1082                         compatible = "renesas,usb2-phy-r8a7795";
1083                         reg = <0 0xee0a0200 0 0x700>;
1084                         clocks = <&cpg CPG_MOD 702>;
1085                         power-domains = <&cpg>;
1086                         #phy-cells = <0>;
1087                         status = "disabled";
1088                 };
1089
1090                 usb2_phy2: usb-phy@ee0c0200 {
1091                         compatible = "renesas,usb2-phy-r8a7795";
1092                         reg = <0 0xee0c0200 0 0x700>;
1093                         clocks = <&cpg CPG_MOD 701>;
1094                         power-domains = <&cpg>;
1095                         #phy-cells = <0>;
1096                         status = "disabled";
1097                 };
1098
1099                 ehci0: usb@ee080100 {
1100                         compatible = "generic-ehci";
1101                         reg = <0 0xee080100 0 0x100>;
1102                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1103                         clocks = <&cpg CPG_MOD 703>;
1104                         phys = <&usb2_phy0>;
1105                         phy-names = "usb";
1106                         power-domains = <&cpg>;
1107                         status = "disabled";
1108                 };
1109
1110                 ehci1: usb@ee0a0100 {
1111                         compatible = "generic-ehci";
1112                         reg = <0 0xee0a0100 0 0x100>;
1113                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1114                         clocks = <&cpg CPG_MOD 702>;
1115                         phys = <&usb2_phy1>;
1116                         phy-names = "usb";
1117                         power-domains = <&cpg>;
1118                         status = "disabled";
1119                 };
1120
1121                 ehci2: usb@ee0c0100 {
1122                         compatible = "generic-ehci";
1123                         reg = <0 0xee0c0100 0 0x100>;
1124                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1125                         clocks = <&cpg CPG_MOD 701>;
1126                         phys = <&usb2_phy2>;
1127                         phy-names = "usb";
1128                         power-domains = <&cpg>;
1129                         status = "disabled";
1130                 };
1131
1132                 ohci0: usb@ee080000 {
1133                         compatible = "generic-ohci";
1134                         reg = <0 0xee080000 0 0x100>;
1135                         interrupts = <GIC_SPI 108 IRQ_TYPE_LEVEL_HIGH>;
1136                         clocks = <&cpg CPG_MOD 703>;
1137                         phys = <&usb2_phy0>;
1138                         phy-names = "usb";
1139                         power-domains = <&cpg>;
1140                         status = "disabled";
1141                 };
1142
1143                 ohci1: usb@ee0a0000 {
1144                         compatible = "generic-ohci";
1145                         reg = <0 0xee0a0000 0 0x100>;
1146                         interrupts = <GIC_SPI 112 IRQ_TYPE_LEVEL_HIGH>;
1147                         clocks = <&cpg CPG_MOD 702>;
1148                         phys = <&usb2_phy1>;
1149                         phy-names = "usb";
1150                         power-domains = <&cpg>;
1151                         status = "disabled";
1152                 };
1153
1154                 ohci2: usb@ee0c0000 {
1155                         compatible = "generic-ohci";
1156                         reg = <0 0xee0c0000 0 0x100>;
1157                         interrupts = <GIC_SPI 113 IRQ_TYPE_LEVEL_HIGH>;
1158                         clocks = <&cpg CPG_MOD 701>;
1159                         phys = <&usb2_phy2>;
1160                         phy-names = "usb";
1161                         power-domains = <&cpg>;
1162                         status = "disabled";
1163                 };
1164                 pciec0: pcie@fe000000 {
1165                         compatible = "renesas,pcie-r8a7795";
1166                         reg = <0 0xfe000000 0 0x80000>;
1167                         #address-cells = <3>;
1168                         #size-cells = <2>;
1169                         bus-range = <0x00 0xff>;
1170                         device_type = "pci";
1171                         ranges = <0x01000000 0 0x00000000 0 0xfe100000 0 0x00100000
1172                                 0x02000000 0 0xfe200000 0 0xfe200000 0 0x00200000
1173                                 0x02000000 0 0x30000000 0 0x30000000 0 0x08000000
1174                                 0x42000000 0 0x38000000 0 0x38000000 0 0x08000000>;
1175                         /* Map all possible DDR as inbound ranges */
1176                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1177                         interrupts = <GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>,
1178                                 <GIC_SPI 117 IRQ_TYPE_LEVEL_HIGH>,
1179                                 <GIC_SPI 118 IRQ_TYPE_LEVEL_HIGH>;
1180                         #interrupt-cells = <1>;
1181                         interrupt-map-mask = <0 0 0 0>;
1182                         interrupt-map = <0 0 0 0 &gic GIC_SPI 116 IRQ_TYPE_LEVEL_HIGH>;
1183                         clocks = <&cpg CPG_MOD 319>, <&pcie_bus_clk>;
1184                         clock-names = "pcie", "pcie_bus";
1185                         power-domains = <&cpg>;
1186                         status = "disabled";
1187                 };
1188
1189                 pciec1: pcie@ee800000 {
1190                         compatible = "renesas,pcie-r8a7795";
1191                         reg = <0 0xee800000 0 0x80000>;
1192                         #address-cells = <3>;
1193                         #size-cells = <2>;
1194                         bus-range = <0x00 0xff>;
1195                         device_type = "pci";
1196                         ranges = <0x01000000 0 0x00000000 0 0xee900000 0 0x00100000
1197                                 0x02000000 0 0xeea00000 0 0xeea00000 0 0x00200000
1198                                 0x02000000 0 0xc0000000 0 0xc0000000 0 0x08000000
1199                                 0x42000000 0 0xc8000000 0 0xc8000000 0 0x08000000>;
1200                         /* Map all possible DDR as inbound ranges */
1201                         dma-ranges = <0x42000000 0 0x40000000 0 0x40000000 0 0x40000000>;
1202                         interrupts = <GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>,
1203                                 <GIC_SPI 149 IRQ_TYPE_LEVEL_HIGH>,
1204                                 <GIC_SPI 150 IRQ_TYPE_LEVEL_HIGH>;
1205                         #interrupt-cells = <1>;
1206                         interrupt-map-mask = <0 0 0 0>;
1207                         interrupt-map = <0 0 0 0 &gic GIC_SPI 148 IRQ_TYPE_LEVEL_HIGH>;
1208                         clocks = <&cpg CPG_MOD 318>, <&pcie_bus_clk>;
1209                         clock-names = "pcie", "pcie_bus";
1210                         power-domains = <&cpg>;
1211                         status = "disabled";
1212                 };
1213         };
1214 };