2 * Based on arch/arm/kernel/ptrace.c
5 * edited by Linus Torvalds
6 * ARM modifications Copyright (C) 2000 Russell King
7 * Copyright (C) 2012 ARM Ltd.
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License version 2 as
11 * published by the Free Software Foundation.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program. If not, see <http://www.gnu.org/licenses/>.
22 #include <linux/audit.h>
23 #include <linux/compat.h>
24 #include <linux/kernel.h>
25 #include <linux/sched.h>
27 #include <linux/smp.h>
28 #include <linux/ptrace.h>
29 #include <linux/user.h>
30 #include <linux/seccomp.h>
31 #include <linux/security.h>
32 #include <linux/init.h>
33 #include <linux/signal.h>
34 #include <linux/uaccess.h>
35 #include <linux/perf_event.h>
36 #include <linux/hw_breakpoint.h>
37 #include <linux/regset.h>
38 #include <linux/tracehook.h>
39 #include <linux/elf.h>
41 #include <asm/compat.h>
42 #include <asm/debug-monitors.h>
43 #include <asm/pgtable.h>
44 #include <asm/syscall.h>
45 #include <asm/traps.h>
46 #include <asm/system_misc.h>
48 #define CREATE_TRACE_POINTS
49 #include <trace/events/syscalls.h>
51 struct pt_regs_offset {
56 #define REG_OFFSET_NAME(r) {.name = #r, .offset = offsetof(struct pt_regs, r)}
57 #define REG_OFFSET_END {.name = NULL, .offset = 0}
58 #define GPR_OFFSET_NAME(r) \
59 {.name = "x" #r, .offset = offsetof(struct pt_regs, regs[r])}
61 static const struct pt_regs_offset regoffset_table[] = {
93 {.name = "lr", .offset = offsetof(struct pt_regs, regs[30])},
96 REG_OFFSET_NAME(pstate),
101 * regs_query_register_offset() - query register offset from its name
102 * @name: the name of a register
104 * regs_query_register_offset() returns the offset of a register in struct
105 * pt_regs from its name. If the name is invalid, this returns -EINVAL;
107 int regs_query_register_offset(const char *name)
109 const struct pt_regs_offset *roff;
111 for (roff = regoffset_table; roff->name != NULL; roff++)
112 if (!strcmp(roff->name, name))
118 * regs_within_kernel_stack() - check the address in the stack
119 * @regs: pt_regs which contains kernel stack pointer.
120 * @addr: address which is checked.
122 * regs_within_kernel_stack() checks @addr is within the kernel stack page(s).
123 * If @addr is within the kernel stack, it returns true. If not, returns false.
125 static bool regs_within_kernel_stack(struct pt_regs *regs, unsigned long addr)
127 return ((addr & ~(THREAD_SIZE - 1)) ==
128 (kernel_stack_pointer(regs) & ~(THREAD_SIZE - 1))) ||
129 on_irq_stack(addr, raw_smp_processor_id());
133 * regs_get_kernel_stack_nth() - get Nth entry of the stack
134 * @regs: pt_regs which contains kernel stack pointer.
135 * @n: stack entry number.
137 * regs_get_kernel_stack_nth() returns @n th entry of the kernel stack which
138 * is specified by @regs. If the @n th entry is NOT in the kernel stack,
141 unsigned long regs_get_kernel_stack_nth(struct pt_regs *regs, unsigned int n)
143 unsigned long *addr = (unsigned long *)kernel_stack_pointer(regs);
146 if (regs_within_kernel_stack(regs, (unsigned long)addr))
153 * TODO: does not yet catch signals sent when the child dies.
154 * in exit.c or in signal.c.
158 * Called by kernel/ptrace.c when detaching..
160 void ptrace_disable(struct task_struct *child)
163 * This would be better off in core code, but PTRACE_DETACH has
164 * grown its fair share of arch-specific worts and changing it
165 * is likely to cause regressions on obscure architectures.
167 user_disable_single_step(child);
170 #ifdef CONFIG_HAVE_HW_BREAKPOINT
172 * Handle hitting a HW-breakpoint.
174 static void ptrace_hbptriggered(struct perf_event *bp,
175 struct perf_sample_data *data,
176 struct pt_regs *regs)
178 struct arch_hw_breakpoint *bkpt = counter_arch_bp(bp);
182 .si_code = TRAP_HWBKPT,
183 .si_addr = (void __user *)(bkpt->trigger),
189 if (!is_compat_task())
192 for (i = 0; i < ARM_MAX_BRP; ++i) {
193 if (current->thread.debug.hbp_break[i] == bp) {
194 info.si_errno = (i << 1) + 1;
199 for (i = 0; i < ARM_MAX_WRP; ++i) {
200 if (current->thread.debug.hbp_watch[i] == bp) {
201 info.si_errno = -((i << 1) + 1);
208 force_sig_info(SIGTRAP, &info, current);
212 * Unregister breakpoints from this task and reset the pointers in
215 void flush_ptrace_hw_breakpoint(struct task_struct *tsk)
218 struct thread_struct *t = &tsk->thread;
220 for (i = 0; i < ARM_MAX_BRP; i++) {
221 if (t->debug.hbp_break[i]) {
222 unregister_hw_breakpoint(t->debug.hbp_break[i]);
223 t->debug.hbp_break[i] = NULL;
227 for (i = 0; i < ARM_MAX_WRP; i++) {
228 if (t->debug.hbp_watch[i]) {
229 unregister_hw_breakpoint(t->debug.hbp_watch[i]);
230 t->debug.hbp_watch[i] = NULL;
235 void ptrace_hw_copy_thread(struct task_struct *tsk)
237 memset(&tsk->thread.debug, 0, sizeof(struct debug_info));
240 static struct perf_event *ptrace_hbp_get_event(unsigned int note_type,
241 struct task_struct *tsk,
244 struct perf_event *bp = ERR_PTR(-EINVAL);
247 case NT_ARM_HW_BREAK:
248 if (idx < ARM_MAX_BRP)
249 bp = tsk->thread.debug.hbp_break[idx];
251 case NT_ARM_HW_WATCH:
252 if (idx < ARM_MAX_WRP)
253 bp = tsk->thread.debug.hbp_watch[idx];
260 static int ptrace_hbp_set_event(unsigned int note_type,
261 struct task_struct *tsk,
263 struct perf_event *bp)
268 case NT_ARM_HW_BREAK:
269 if (idx < ARM_MAX_BRP) {
270 tsk->thread.debug.hbp_break[idx] = bp;
274 case NT_ARM_HW_WATCH:
275 if (idx < ARM_MAX_WRP) {
276 tsk->thread.debug.hbp_watch[idx] = bp;
285 static struct perf_event *ptrace_hbp_create(unsigned int note_type,
286 struct task_struct *tsk,
289 struct perf_event *bp;
290 struct perf_event_attr attr;
294 case NT_ARM_HW_BREAK:
295 type = HW_BREAKPOINT_X;
297 case NT_ARM_HW_WATCH:
298 type = HW_BREAKPOINT_RW;
301 return ERR_PTR(-EINVAL);
304 ptrace_breakpoint_init(&attr);
307 * Initialise fields to sane defaults
308 * (i.e. values that will pass validation).
311 attr.bp_len = HW_BREAKPOINT_LEN_4;
315 bp = register_user_hw_breakpoint(&attr, ptrace_hbptriggered, NULL, tsk);
319 err = ptrace_hbp_set_event(note_type, tsk, idx, bp);
326 static int ptrace_hbp_fill_attr_ctrl(unsigned int note_type,
327 struct arch_hw_breakpoint_ctrl ctrl,
328 struct perf_event_attr *attr)
330 int err, len, type, offset, disabled = !ctrl.enabled;
332 attr->disabled = disabled;
336 err = arch_bp_generic_fields(ctrl, &len, &type, &offset);
341 case NT_ARM_HW_BREAK:
342 if ((type & HW_BREAKPOINT_X) != type)
345 case NT_ARM_HW_WATCH:
346 if ((type & HW_BREAKPOINT_RW) != type)
354 attr->bp_type = type;
355 attr->bp_addr += offset;
360 static int ptrace_hbp_get_resource_info(unsigned int note_type, u32 *info)
366 case NT_ARM_HW_BREAK:
367 num = hw_breakpoint_slots(TYPE_INST);
369 case NT_ARM_HW_WATCH:
370 num = hw_breakpoint_slots(TYPE_DATA);
376 reg |= debug_monitors_arch();
384 static int ptrace_hbp_get_ctrl(unsigned int note_type,
385 struct task_struct *tsk,
389 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
394 *ctrl = bp ? encode_ctrl_reg(counter_arch_bp(bp)->ctrl) : 0;
398 static int ptrace_hbp_get_addr(unsigned int note_type,
399 struct task_struct *tsk,
403 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
408 *addr = bp ? counter_arch_bp(bp)->address : 0;
412 static struct perf_event *ptrace_hbp_get_initialised_bp(unsigned int note_type,
413 struct task_struct *tsk,
416 struct perf_event *bp = ptrace_hbp_get_event(note_type, tsk, idx);
419 bp = ptrace_hbp_create(note_type, tsk, idx);
424 static int ptrace_hbp_set_ctrl(unsigned int note_type,
425 struct task_struct *tsk,
430 struct perf_event *bp;
431 struct perf_event_attr attr;
432 struct arch_hw_breakpoint_ctrl ctrl;
434 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
441 decode_ctrl_reg(uctrl, &ctrl);
442 err = ptrace_hbp_fill_attr_ctrl(note_type, ctrl, &attr);
446 return modify_user_hw_breakpoint(bp, &attr);
449 static int ptrace_hbp_set_addr(unsigned int note_type,
450 struct task_struct *tsk,
455 struct perf_event *bp;
456 struct perf_event_attr attr;
458 bp = ptrace_hbp_get_initialised_bp(note_type, tsk, idx);
466 err = modify_user_hw_breakpoint(bp, &attr);
470 #define PTRACE_HBP_ADDR_SZ sizeof(u64)
471 #define PTRACE_HBP_CTRL_SZ sizeof(u32)
472 #define PTRACE_HBP_PAD_SZ sizeof(u32)
474 static int hw_break_get(struct task_struct *target,
475 const struct user_regset *regset,
476 unsigned int pos, unsigned int count,
477 void *kbuf, void __user *ubuf)
479 unsigned int note_type = regset->core_note_type;
480 int ret, idx = 0, offset, limit;
485 ret = ptrace_hbp_get_resource_info(note_type, &info);
489 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &info, 0,
495 offset = offsetof(struct user_hwdebug_state, pad);
496 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf, offset,
497 offset + PTRACE_HBP_PAD_SZ);
501 /* (address, ctrl) registers */
502 offset = offsetof(struct user_hwdebug_state, dbg_regs);
503 limit = regset->n * regset->size;
504 while (count && offset < limit) {
505 ret = ptrace_hbp_get_addr(note_type, target, idx, &addr);
508 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &addr,
509 offset, offset + PTRACE_HBP_ADDR_SZ);
512 offset += PTRACE_HBP_ADDR_SZ;
514 ret = ptrace_hbp_get_ctrl(note_type, target, idx, &ctrl);
517 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, &ctrl,
518 offset, offset + PTRACE_HBP_CTRL_SZ);
521 offset += PTRACE_HBP_CTRL_SZ;
523 ret = user_regset_copyout_zero(&pos, &count, &kbuf, &ubuf,
525 offset + PTRACE_HBP_PAD_SZ);
528 offset += PTRACE_HBP_PAD_SZ;
535 static int hw_break_set(struct task_struct *target,
536 const struct user_regset *regset,
537 unsigned int pos, unsigned int count,
538 const void *kbuf, const void __user *ubuf)
540 unsigned int note_type = regset->core_note_type;
541 int ret, idx = 0, offset, limit;
545 /* Resource info and pad */
546 offset = offsetof(struct user_hwdebug_state, dbg_regs);
547 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf, 0, offset);
551 /* (address, ctrl) registers */
552 limit = regset->n * regset->size;
553 while (count && offset < limit) {
554 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &addr,
555 offset, offset + PTRACE_HBP_ADDR_SZ);
558 ret = ptrace_hbp_set_addr(note_type, target, idx, addr);
561 offset += PTRACE_HBP_ADDR_SZ;
563 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &ctrl,
564 offset, offset + PTRACE_HBP_CTRL_SZ);
567 ret = ptrace_hbp_set_ctrl(note_type, target, idx, ctrl);
570 offset += PTRACE_HBP_CTRL_SZ;
572 ret = user_regset_copyin_ignore(&pos, &count, &kbuf, &ubuf,
574 offset + PTRACE_HBP_PAD_SZ);
577 offset += PTRACE_HBP_PAD_SZ;
583 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
585 static int gpr_get(struct task_struct *target,
586 const struct user_regset *regset,
587 unsigned int pos, unsigned int count,
588 void *kbuf, void __user *ubuf)
590 struct user_pt_regs *uregs = &task_pt_regs(target)->user_regs;
591 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
594 static int gpr_set(struct task_struct *target, const struct user_regset *regset,
595 unsigned int pos, unsigned int count,
596 const void *kbuf, const void __user *ubuf)
599 struct user_pt_regs newregs = task_pt_regs(target)->user_regs;
601 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newregs, 0, -1);
605 if (!valid_user_regs(&newregs, target))
608 task_pt_regs(target)->user_regs = newregs;
613 * TODO: update fp accessors for lazy context switching (sync/flush hwstate)
615 static int fpr_get(struct task_struct *target, const struct user_regset *regset,
616 unsigned int pos, unsigned int count,
617 void *kbuf, void __user *ubuf)
619 struct user_fpsimd_state *uregs;
620 uregs = &target->thread.fpsimd_state.user_fpsimd;
621 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0, -1);
624 static int fpr_set(struct task_struct *target, const struct user_regset *regset,
625 unsigned int pos, unsigned int count,
626 const void *kbuf, const void __user *ubuf)
629 struct user_fpsimd_state newstate =
630 target->thread.fpsimd_state.user_fpsimd;
632 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &newstate, 0, -1);
636 target->thread.fpsimd_state.user_fpsimd = newstate;
637 fpsimd_flush_task_state(target);
641 static int tls_get(struct task_struct *target, const struct user_regset *regset,
642 unsigned int pos, unsigned int count,
643 void *kbuf, void __user *ubuf)
645 unsigned long *tls = &target->thread.tp_value;
646 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, tls, 0, -1);
649 static int tls_set(struct task_struct *target, const struct user_regset *regset,
650 unsigned int pos, unsigned int count,
651 const void *kbuf, const void __user *ubuf)
654 unsigned long tls = target->thread.tp_value;
656 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
660 target->thread.tp_value = tls;
664 static int system_call_get(struct task_struct *target,
665 const struct user_regset *regset,
666 unsigned int pos, unsigned int count,
667 void *kbuf, void __user *ubuf)
669 int syscallno = task_pt_regs(target)->syscallno;
671 return user_regset_copyout(&pos, &count, &kbuf, &ubuf,
675 static int system_call_set(struct task_struct *target,
676 const struct user_regset *regset,
677 unsigned int pos, unsigned int count,
678 const void *kbuf, const void __user *ubuf)
680 int syscallno = task_pt_regs(target)->syscallno;
683 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &syscallno, 0, -1);
687 task_pt_regs(target)->syscallno = syscallno;
691 enum aarch64_regset {
695 #ifdef CONFIG_HAVE_HW_BREAKPOINT
702 static const struct user_regset aarch64_regsets[] = {
704 .core_note_type = NT_PRSTATUS,
705 .n = sizeof(struct user_pt_regs) / sizeof(u64),
707 .align = sizeof(u64),
712 .core_note_type = NT_PRFPREG,
713 .n = sizeof(struct user_fpsimd_state) / sizeof(u32),
715 * We pretend we have 32-bit registers because the fpsr and
716 * fpcr are 32-bits wide.
719 .align = sizeof(u32),
724 .core_note_type = NT_ARM_TLS,
726 .size = sizeof(void *),
727 .align = sizeof(void *),
731 #ifdef CONFIG_HAVE_HW_BREAKPOINT
732 [REGSET_HW_BREAK] = {
733 .core_note_type = NT_ARM_HW_BREAK,
734 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
736 .align = sizeof(u32),
740 [REGSET_HW_WATCH] = {
741 .core_note_type = NT_ARM_HW_WATCH,
742 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
744 .align = sizeof(u32),
749 [REGSET_SYSTEM_CALL] = {
750 .core_note_type = NT_ARM_SYSTEM_CALL,
753 .align = sizeof(int),
754 .get = system_call_get,
755 .set = system_call_set,
759 static const struct user_regset_view user_aarch64_view = {
760 .name = "aarch64", .e_machine = EM_AARCH64,
761 .regsets = aarch64_regsets, .n = ARRAY_SIZE(aarch64_regsets)
765 #include <linux/compat.h>
772 static int compat_gpr_get(struct task_struct *target,
773 const struct user_regset *regset,
774 unsigned int pos, unsigned int count,
775 void *kbuf, void __user *ubuf)
778 unsigned int i, start, num_regs;
780 /* Calculate the number of AArch32 registers contained in count */
781 num_regs = count / regset->size;
783 /* Convert pos into an register number */
784 start = pos / regset->size;
786 if (start + num_regs > regset->n)
789 for (i = 0; i < num_regs; ++i) {
790 unsigned int idx = start + i;
795 reg = task_pt_regs(target)->pc;
798 reg = task_pt_regs(target)->pstate;
801 reg = task_pt_regs(target)->orig_x0;
804 reg = task_pt_regs(target)->regs[idx];
808 memcpy(kbuf, ®, sizeof(reg));
811 ret = copy_to_user(ubuf, ®, sizeof(reg));
824 static int compat_gpr_set(struct task_struct *target,
825 const struct user_regset *regset,
826 unsigned int pos, unsigned int count,
827 const void *kbuf, const void __user *ubuf)
829 struct pt_regs newregs;
831 unsigned int i, start, num_regs;
833 /* Calculate the number of AArch32 registers contained in count */
834 num_regs = count / regset->size;
836 /* Convert pos into an register number */
837 start = pos / regset->size;
839 if (start + num_regs > regset->n)
842 newregs = *task_pt_regs(target);
844 for (i = 0; i < num_regs; ++i) {
845 unsigned int idx = start + i;
849 memcpy(®, kbuf, sizeof(reg));
852 ret = copy_from_user(®, ubuf, sizeof(reg));
866 newregs.pstate = reg;
869 newregs.orig_x0 = reg;
872 newregs.regs[idx] = reg;
877 if (valid_user_regs(&newregs.user_regs, target))
878 *task_pt_regs(target) = newregs;
885 static int compat_vfp_get(struct task_struct *target,
886 const struct user_regset *regset,
887 unsigned int pos, unsigned int count,
888 void *kbuf, void __user *ubuf)
890 struct user_fpsimd_state *uregs;
891 compat_ulong_t fpscr;
894 uregs = &target->thread.fpsimd_state.user_fpsimd;
897 * The VFP registers are packed into the fpsimd_state, so they all sit
898 * nicely together for us. We just need to create the fpscr separately.
900 ret = user_regset_copyout(&pos, &count, &kbuf, &ubuf, uregs, 0,
901 VFP_STATE_SIZE - sizeof(compat_ulong_t));
904 fpscr = (uregs->fpsr & VFP_FPSCR_STAT_MASK) |
905 (uregs->fpcr & VFP_FPSCR_CTRL_MASK);
906 ret = put_user(fpscr, (compat_ulong_t *)ubuf);
912 static int compat_vfp_set(struct task_struct *target,
913 const struct user_regset *regset,
914 unsigned int pos, unsigned int count,
915 const void *kbuf, const void __user *ubuf)
917 struct user_fpsimd_state *uregs;
918 compat_ulong_t fpscr;
921 if (pos + count > VFP_STATE_SIZE)
924 uregs = &target->thread.fpsimd_state.user_fpsimd;
926 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, uregs, 0,
927 VFP_STATE_SIZE - sizeof(compat_ulong_t));
930 ret = get_user(fpscr, (compat_ulong_t *)ubuf);
931 uregs->fpsr = fpscr & VFP_FPSCR_STAT_MASK;
932 uregs->fpcr = fpscr & VFP_FPSCR_CTRL_MASK;
935 fpsimd_flush_task_state(target);
939 static int compat_tls_get(struct task_struct *target,
940 const struct user_regset *regset, unsigned int pos,
941 unsigned int count, void *kbuf, void __user *ubuf)
943 compat_ulong_t tls = (compat_ulong_t)target->thread.tp_value;
944 return user_regset_copyout(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
947 static int compat_tls_set(struct task_struct *target,
948 const struct user_regset *regset, unsigned int pos,
949 unsigned int count, const void *kbuf,
950 const void __user *ubuf)
955 ret = user_regset_copyin(&pos, &count, &kbuf, &ubuf, &tls, 0, -1);
959 target->thread.tp_value = tls;
963 static const struct user_regset aarch32_regsets[] = {
964 [REGSET_COMPAT_GPR] = {
965 .core_note_type = NT_PRSTATUS,
966 .n = COMPAT_ELF_NGREG,
967 .size = sizeof(compat_elf_greg_t),
968 .align = sizeof(compat_elf_greg_t),
969 .get = compat_gpr_get,
970 .set = compat_gpr_set
972 [REGSET_COMPAT_VFP] = {
973 .core_note_type = NT_ARM_VFP,
974 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
975 .size = sizeof(compat_ulong_t),
976 .align = sizeof(compat_ulong_t),
977 .get = compat_vfp_get,
978 .set = compat_vfp_set
982 static const struct user_regset_view user_aarch32_view = {
983 .name = "aarch32", .e_machine = EM_ARM,
984 .regsets = aarch32_regsets, .n = ARRAY_SIZE(aarch32_regsets)
987 static const struct user_regset aarch32_ptrace_regsets[] = {
989 .core_note_type = NT_PRSTATUS,
990 .n = COMPAT_ELF_NGREG,
991 .size = sizeof(compat_elf_greg_t),
992 .align = sizeof(compat_elf_greg_t),
993 .get = compat_gpr_get,
994 .set = compat_gpr_set
997 .core_note_type = NT_ARM_VFP,
998 .n = VFP_STATE_SIZE / sizeof(compat_ulong_t),
999 .size = sizeof(compat_ulong_t),
1000 .align = sizeof(compat_ulong_t),
1001 .get = compat_vfp_get,
1002 .set = compat_vfp_set
1005 .core_note_type = NT_ARM_TLS,
1007 .size = sizeof(compat_ulong_t),
1008 .align = sizeof(compat_ulong_t),
1009 .get = compat_tls_get,
1010 .set = compat_tls_set,
1012 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1013 [REGSET_HW_BREAK] = {
1014 .core_note_type = NT_ARM_HW_BREAK,
1015 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1016 .size = sizeof(u32),
1017 .align = sizeof(u32),
1018 .get = hw_break_get,
1019 .set = hw_break_set,
1021 [REGSET_HW_WATCH] = {
1022 .core_note_type = NT_ARM_HW_WATCH,
1023 .n = sizeof(struct user_hwdebug_state) / sizeof(u32),
1024 .size = sizeof(u32),
1025 .align = sizeof(u32),
1026 .get = hw_break_get,
1027 .set = hw_break_set,
1030 [REGSET_SYSTEM_CALL] = {
1031 .core_note_type = NT_ARM_SYSTEM_CALL,
1033 .size = sizeof(int),
1034 .align = sizeof(int),
1035 .get = system_call_get,
1036 .set = system_call_set,
1040 static const struct user_regset_view user_aarch32_ptrace_view = {
1041 .name = "aarch32", .e_machine = EM_ARM,
1042 .regsets = aarch32_ptrace_regsets, .n = ARRAY_SIZE(aarch32_ptrace_regsets)
1045 static int compat_ptrace_read_user(struct task_struct *tsk, compat_ulong_t off,
1046 compat_ulong_t __user *ret)
1053 if (off == COMPAT_PT_TEXT_ADDR)
1054 tmp = tsk->mm->start_code;
1055 else if (off == COMPAT_PT_DATA_ADDR)
1056 tmp = tsk->mm->start_data;
1057 else if (off == COMPAT_PT_TEXT_END_ADDR)
1058 tmp = tsk->mm->end_code;
1059 else if (off < sizeof(compat_elf_gregset_t))
1060 return copy_regset_to_user(tsk, &user_aarch32_view,
1061 REGSET_COMPAT_GPR, off,
1062 sizeof(compat_ulong_t), ret);
1063 else if (off >= COMPAT_USER_SZ)
1068 return put_user(tmp, ret);
1071 static int compat_ptrace_write_user(struct task_struct *tsk, compat_ulong_t off,
1075 mm_segment_t old_fs = get_fs();
1077 if (off & 3 || off >= COMPAT_USER_SZ)
1080 if (off >= sizeof(compat_elf_gregset_t))
1084 ret = copy_regset_from_user(tsk, &user_aarch32_view,
1085 REGSET_COMPAT_GPR, off,
1086 sizeof(compat_ulong_t),
1093 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1096 * Convert a virtual register number into an index for a thread_info
1097 * breakpoint array. Breakpoints are identified using positive numbers
1098 * whilst watchpoints are negative. The registers are laid out as pairs
1099 * of (address, control), each pair mapping to a unique hw_breakpoint struct.
1100 * Register 0 is reserved for describing resource information.
1102 static int compat_ptrace_hbp_num_to_idx(compat_long_t num)
1104 return (abs(num) - 1) >> 1;
1107 static int compat_ptrace_hbp_get_resource_info(u32 *kdata)
1109 u8 num_brps, num_wrps, debug_arch, wp_len;
1112 num_brps = hw_breakpoint_slots(TYPE_INST);
1113 num_wrps = hw_breakpoint_slots(TYPE_DATA);
1115 debug_arch = debug_monitors_arch();
1129 static int compat_ptrace_hbp_get(unsigned int note_type,
1130 struct task_struct *tsk,
1137 int err, idx = compat_ptrace_hbp_num_to_idx(num);;
1140 err = ptrace_hbp_get_addr(note_type, tsk, idx, &addr);
1143 err = ptrace_hbp_get_ctrl(note_type, tsk, idx, &ctrl);
1150 static int compat_ptrace_hbp_set(unsigned int note_type,
1151 struct task_struct *tsk,
1158 int err, idx = compat_ptrace_hbp_num_to_idx(num);
1162 err = ptrace_hbp_set_addr(note_type, tsk, idx, addr);
1165 err = ptrace_hbp_set_ctrl(note_type, tsk, idx, ctrl);
1171 static int compat_ptrace_gethbpregs(struct task_struct *tsk, compat_long_t num,
1172 compat_ulong_t __user *data)
1176 mm_segment_t old_fs = get_fs();
1181 ret = compat_ptrace_hbp_get(NT_ARM_HW_WATCH, tsk, num, &kdata);
1183 } else if (num == 0) {
1184 ret = compat_ptrace_hbp_get_resource_info(&kdata);
1187 ret = compat_ptrace_hbp_get(NT_ARM_HW_BREAK, tsk, num, &kdata);
1192 ret = put_user(kdata, data);
1197 static int compat_ptrace_sethbpregs(struct task_struct *tsk, compat_long_t num,
1198 compat_ulong_t __user *data)
1202 mm_segment_t old_fs = get_fs();
1207 ret = get_user(kdata, data);
1213 ret = compat_ptrace_hbp_set(NT_ARM_HW_WATCH, tsk, num, &kdata);
1215 ret = compat_ptrace_hbp_set(NT_ARM_HW_BREAK, tsk, num, &kdata);
1220 #endif /* CONFIG_HAVE_HW_BREAKPOINT */
1222 long compat_arch_ptrace(struct task_struct *child, compat_long_t request,
1223 compat_ulong_t caddr, compat_ulong_t cdata)
1225 unsigned long addr = caddr;
1226 unsigned long data = cdata;
1227 void __user *datap = compat_ptr(data);
1231 case PTRACE_PEEKUSR:
1232 ret = compat_ptrace_read_user(child, addr, datap);
1235 case PTRACE_POKEUSR:
1236 ret = compat_ptrace_write_user(child, addr, data);
1239 case COMPAT_PTRACE_GETREGS:
1240 ret = copy_regset_to_user(child,
1243 0, sizeof(compat_elf_gregset_t),
1247 case COMPAT_PTRACE_SETREGS:
1248 ret = copy_regset_from_user(child,
1251 0, sizeof(compat_elf_gregset_t),
1255 case COMPAT_PTRACE_GET_THREAD_AREA:
1256 ret = put_user((compat_ulong_t)child->thread.tp_value,
1257 (compat_ulong_t __user *)datap);
1260 case COMPAT_PTRACE_SET_SYSCALL:
1261 task_pt_regs(child)->syscallno = data;
1265 case COMPAT_PTRACE_GETVFPREGS:
1266 ret = copy_regset_to_user(child,
1273 case COMPAT_PTRACE_SETVFPREGS:
1274 ret = copy_regset_from_user(child,
1281 #ifdef CONFIG_HAVE_HW_BREAKPOINT
1282 case COMPAT_PTRACE_GETHBPREGS:
1283 ret = compat_ptrace_gethbpregs(child, addr, datap);
1286 case COMPAT_PTRACE_SETHBPREGS:
1287 ret = compat_ptrace_sethbpregs(child, addr, datap);
1292 ret = compat_ptrace_request(child, request, addr,
1299 #endif /* CONFIG_COMPAT */
1301 const struct user_regset_view *task_user_regset_view(struct task_struct *task)
1303 #ifdef CONFIG_COMPAT
1305 * Core dumping of 32-bit tasks or compat ptrace requests must use the
1306 * user_aarch32_view compatible with arm32. Native ptrace requests on
1307 * 32-bit children use an extended user_aarch32_ptrace_view to allow
1308 * access to the TLS register.
1310 if (is_compat_task())
1311 return &user_aarch32_view;
1312 else if (is_compat_thread(task_thread_info(task)))
1313 return &user_aarch32_ptrace_view;
1315 return &user_aarch64_view;
1318 long arch_ptrace(struct task_struct *child, long request,
1319 unsigned long addr, unsigned long data)
1321 return ptrace_request(child, request, addr, data);
1324 enum ptrace_syscall_dir {
1325 PTRACE_SYSCALL_ENTER = 0,
1326 PTRACE_SYSCALL_EXIT,
1329 static void tracehook_report_syscall(struct pt_regs *regs,
1330 enum ptrace_syscall_dir dir)
1333 unsigned long saved_reg;
1336 * A scratch register (ip(r12) on AArch32, x7 on AArch64) is
1337 * used to denote syscall entry/exit:
1339 regno = (is_compat_task() ? 12 : 7);
1340 saved_reg = regs->regs[regno];
1341 regs->regs[regno] = dir;
1343 if (dir == PTRACE_SYSCALL_EXIT)
1344 tracehook_report_syscall_exit(regs, 0);
1345 else if (tracehook_report_syscall_entry(regs))
1346 regs->syscallno = ~0UL;
1348 regs->regs[regno] = saved_reg;
1351 asmlinkage int syscall_trace_enter(struct pt_regs *regs)
1353 if (test_thread_flag(TIF_SYSCALL_TRACE))
1354 tracehook_report_syscall(regs, PTRACE_SYSCALL_ENTER);
1356 /* Do the secure computing after ptrace; failures should be fast. */
1357 if (secure_computing(NULL) == -1)
1360 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1361 trace_sys_enter(regs, regs->syscallno);
1363 audit_syscall_entry(regs->syscallno, regs->orig_x0, regs->regs[1],
1364 regs->regs[2], regs->regs[3]);
1366 return regs->syscallno;
1369 asmlinkage void syscall_trace_exit(struct pt_regs *regs)
1371 audit_syscall_exit(regs);
1373 if (test_thread_flag(TIF_SYSCALL_TRACEPOINT))
1374 trace_sys_exit(regs, regs_return_value(regs));
1376 if (test_thread_flag(TIF_SYSCALL_TRACE))
1377 tracehook_report_syscall(regs, PTRACE_SYSCALL_EXIT);
1381 * Bits which are always architecturally RES0 per ARM DDI 0487A.h
1382 * Userspace cannot use these until they have an architectural meaning.
1383 * We also reserve IL for the kernel; SS is handled dynamically.
1385 #define SPSR_EL1_AARCH64_RES0_BITS \
1386 (GENMASK_ULL(63,32) | GENMASK_ULL(27, 22) | GENMASK_ULL(20, 10) | \
1388 #define SPSR_EL1_AARCH32_RES0_BITS \
1389 (GENMASK_ULL(63,32) | GENMASK_ULL(24, 22) | GENMASK_ULL(20,20))
1391 static int valid_compat_regs(struct user_pt_regs *regs)
1393 regs->pstate &= ~SPSR_EL1_AARCH32_RES0_BITS;
1395 if (!system_supports_mixed_endian_el0()) {
1396 if (IS_ENABLED(CONFIG_CPU_BIG_ENDIAN))
1397 regs->pstate |= COMPAT_PSR_E_BIT;
1399 regs->pstate &= ~COMPAT_PSR_E_BIT;
1402 if (user_mode(regs) && (regs->pstate & PSR_MODE32_BIT) &&
1403 (regs->pstate & COMPAT_PSR_A_BIT) == 0 &&
1404 (regs->pstate & COMPAT_PSR_I_BIT) == 0 &&
1405 (regs->pstate & COMPAT_PSR_F_BIT) == 0) {
1410 * Force PSR to a valid 32-bit EL0t, preserving the same bits as
1413 regs->pstate &= COMPAT_PSR_N_BIT | COMPAT_PSR_Z_BIT |
1414 COMPAT_PSR_C_BIT | COMPAT_PSR_V_BIT |
1415 COMPAT_PSR_Q_BIT | COMPAT_PSR_IT_MASK |
1416 COMPAT_PSR_GE_MASK | COMPAT_PSR_E_BIT |
1418 regs->pstate |= PSR_MODE32_BIT;
1423 static int valid_native_regs(struct user_pt_regs *regs)
1425 regs->pstate &= ~SPSR_EL1_AARCH64_RES0_BITS;
1427 if (user_mode(regs) && !(regs->pstate & PSR_MODE32_BIT) &&
1428 (regs->pstate & PSR_D_BIT) == 0 &&
1429 (regs->pstate & PSR_A_BIT) == 0 &&
1430 (regs->pstate & PSR_I_BIT) == 0 &&
1431 (regs->pstate & PSR_F_BIT) == 0) {
1435 /* Force PSR to a valid 64-bit EL0t */
1436 regs->pstate &= PSR_N_BIT | PSR_Z_BIT | PSR_C_BIT | PSR_V_BIT;
1442 * Are the current registers suitable for user mode? (used to maintain
1443 * security in signal handlers)
1445 int valid_user_regs(struct user_pt_regs *regs, struct task_struct *task)
1447 if (!test_tsk_thread_flag(task, TIF_SINGLESTEP))
1448 regs->pstate &= ~DBG_SPSR_SS;
1450 if (is_compat_thread(task_thread_info(task)))
1451 return valid_compat_regs(regs);
1453 return valid_native_regs(regs);