2 * Apple Peripheral System Controller (PSC)
4 * The PSC is used on the AV Macs to control IO functions not handled
5 * by the VIAs (Ethernet, DSP, SCC).
9 * Try to figure out what's going on in pIFR5 and pIFR6. There seem to be
10 * persisant interrupt conditions in those registers and I have no idea what
11 * they are. Granted it doesn't affect since we're not enabling any interrupts
12 * on those levels at the moment, but it would be nice to know. I have a feeling
13 * they aren't actually interrupt lines but data lines (to the DSP?)
16 #include <linux/types.h>
17 #include <linux/kernel.h>
19 #include <linux/delay.h>
20 #include <linux/init.h>
21 #ifdef CONFIG_GENERIC_HARDIRQS
22 #include <linux/irq.h>
25 #include <asm/traps.h>
26 #include <asm/bootinfo.h>
27 #include <asm/macintosh.h>
28 #include <asm/macints.h>
29 #include <asm/mac_psc.h>
37 * Debugging dump, used in various places to see what's going on.
40 static void psc_debug_dump(void)
44 if (!psc_present) return;
45 for (i = 0x30 ; i < 0x70 ; i += 0x10) {
46 printk("PSC #%d: IFR = 0x%02X IER = 0x%02X\n",
48 (int) psc_read_byte(pIFRbase + i),
49 (int) psc_read_byte(pIERbase + i));
54 * Try to kill all DMA channels on the PSC. Not sure how this his
55 * supposed to work; this is code lifted from macmace.c and then
56 * expanded to cover what I think are the other 7 channels.
59 static void psc_dma_die_die_die(void)
63 printk("Killing all PSC DMA channels...");
64 for (i = 0 ; i < 9 ; i++) {
65 psc_write_word(PSC_CTL_BASE + (i << 4), 0x8800);
66 psc_write_word(PSC_CTL_BASE + (i << 4), 0x1000);
67 psc_write_word(PSC_CMD_BASE + (i << 5), 0x1100);
68 psc_write_word(PSC_CMD_BASE + (i << 5) + 0x10, 0x1100);
74 * Initialize the PSC. For now this just involves shutting down all
75 * interrupt sources using the IERs.
78 void __init psc_init(void)
82 if (macintosh_config->ident != MAC_MODEL_C660
83 && macintosh_config->ident != MAC_MODEL_Q840)
91 * The PSC is always at the same spot, but using psc
92 * keeps things consistent with the psc_xxxx functions.
95 psc = (void *) PSC_BASE;
98 printk("PSC detected at %p\n", psc);
100 psc_dma_die_die_die();
106 * Mask and clear all possible interrupts
109 for (i = 0x30 ; i < 0x70 ; i += 0x10) {
110 psc_write_byte(pIERbase + i, 0x0F);
111 psc_write_byte(pIFRbase + i, 0x0F);
116 * PSC interrupt handler. It's a lot like the VIA interrupt handler.
119 #ifdef CONFIG_GENERIC_HARDIRQS
120 static void psc_irq(unsigned int irq, struct irq_desc *desc)
122 unsigned int offset = (unsigned int)irq_desc_get_handler_data(desc);
123 int pIFR = pIFRbase + offset;
124 int pIER = pIERbase + offset;
126 unsigned char irq_bit, events;
129 printk("psc_irq: irq %u pIFR = 0x%02X pIER = 0x%02X\n",
130 irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
133 events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
140 if (events & irq_bit) {
141 psc_write_byte(pIFR, irq_bit);
142 generic_handle_irq(irq_num);
146 } while (events >= irq_bit);
149 static irqreturn_t psc_irq(int irq, void *dev_id)
151 int pIFR = pIFRbase + ((int) dev_id);
152 int pIER = pIERbase + ((int) dev_id);
154 unsigned char irq_bit, events;
157 printk("psc_irq: irq %d pIFR = 0x%02X pIER = 0x%02X\n",
158 irq, (int) psc_read_byte(pIFR), (int) psc_read_byte(pIER));
161 events = psc_read_byte(pIFR) & psc_read_byte(pIER) & 0xF;
168 if (events & irq_bit) {
169 psc_write_byte(pIFR, irq_bit);
170 generic_handle_irq(irq_num);
174 } while (events >= irq_bit);
180 * Register the PSC interrupt dispatchers for autovector interrupts 3-6.
183 void __init psc_register_interrupts(void)
185 #ifdef CONFIG_GENERIC_HARDIRQS
186 irq_set_chained_handler(IRQ_AUTO_3, psc_irq);
187 irq_set_handler_data(IRQ_AUTO_3, (void *)0x30);
188 irq_set_chained_handler(IRQ_AUTO_4, psc_irq);
189 irq_set_handler_data(IRQ_AUTO_4, (void *)0x40);
190 irq_set_chained_handler(IRQ_AUTO_5, psc_irq);
191 irq_set_handler_data(IRQ_AUTO_5, (void *)0x50);
192 irq_set_chained_handler(IRQ_AUTO_6, psc_irq);
193 irq_set_handler_data(IRQ_AUTO_6, (void *)0x60);
194 #else /* !CONFIG_GENERIC_HARDIRQS */
195 if (request_irq(IRQ_AUTO_3, psc_irq, 0, "psc3", (void *) 0x30))
196 pr_err("Couldn't register psc%d interrupt\n", 3);
197 if (request_irq(IRQ_AUTO_4, psc_irq, 0, "psc4", (void *) 0x40))
198 pr_err("Couldn't register psc%d interrupt\n", 4);
199 if (request_irq(IRQ_AUTO_5, psc_irq, 0, "psc5", (void *) 0x50))
200 pr_err("Couldn't register psc%d interrupt\n", 5);
201 if (request_irq(IRQ_AUTO_6, psc_irq, 0, "psc6", (void *) 0x60))
202 pr_err("Couldn't register psc%d interrupt\n", 6);
203 #endif /* !CONFIG_GENERIC_HARDIRQS */
206 void psc_irq_enable(int irq) {
207 int irq_src = IRQ_SRC(irq);
208 int irq_idx = IRQ_IDX(irq);
209 int pIER = pIERbase + (irq_src << 4);
212 printk("psc_irq_enable(%d)\n", irq);
214 psc_write_byte(pIER, (1 << irq_idx) | 0x80);
217 void psc_irq_disable(int irq) {
218 int irq_src = IRQ_SRC(irq);
219 int irq_idx = IRQ_IDX(irq);
220 int pIER = pIERbase + (irq_src << 4);
223 printk("psc_irq_disable(%d)\n", irq);
225 psc_write_byte(pIER, 1 << irq_idx);
228 void psc_irq_clear(int irq) {
229 int irq_src = IRQ_SRC(irq);
230 int irq_idx = IRQ_IDX(irq);
231 int pIFR = pIERbase + (irq_src << 4);
233 psc_write_byte(pIFR, 1 << irq_idx);
236 int psc_irq_pending(int irq)
238 int irq_src = IRQ_SRC(irq);
239 int irq_idx = IRQ_IDX(irq);
240 int pIFR = pIERbase + (irq_src << 4);
242 return psc_read_byte(pIFR) & (1 << irq_idx);