arch/mips/mm/dma-default.c

   1 /*
   2  * This file is subject to the terms and conditions of the GNU General Public
   3  * License.  See the file "COPYING" in the main directory of this archive
   4  * for more details.
   5  *
   6  * Copyright (C) 2000  Ani Joshi <ajoshi@unixbox.com>
   7  * Copyright (C) 2000, 2001, 06  Ralf Baechle <ralf@linux-mips.org>
   8  * swiped from i386, and cloned for MIPS by Geert, polished by Ralf.
   9  */
  10
  11 #include <linux/types.h>
  12 #include <linux/dma-mapping.h>
  13 #include <linux/mm.h>
  14 #include <linux/module.h>
  15 #include <linux/scatterlist.h>
  16 #include <linux/string.h>
  17 #include <linux/gfp.h>
  18 #include <linux/highmem.h>
  19 #include <linux/dma-contiguous.h>
  20
  21 #include <asm/cache.h>
  22 #include <asm/cpu-type.h>
  23 #include <asm/io.h>
  24
  25 #include <dma-coherence.h>
  26
  27 #ifdef CONFIG_DMA_MAYBE_COHERENT
  28 int coherentio = 0;     /* User defined DMA coherency from command line. */
  29 EXPORT_SYMBOL_GPL(coherentio);
  30 int hw_coherentio = 0;  /* Actual hardware supported DMA coherency setting. */
  31
  32 static int __init setcoherentio(char *str)
  33 {
  34         coherentio = 1;
  35         pr_info("Hardware DMA cache coherency (command line)\n");
  36         return 0;
  37 }
  38 early_param("coherentio", setcoherentio);
  39
  40 static int __init setnocoherentio(char *str)
  41 {
  42         coherentio = 0;
  43         pr_info("Software DMA cache coherency (command line)\n");
  44         return 0;
  45 }
  46 early_param("nocoherentio", setnocoherentio);
  47 #endif
  48
  49 static inline struct page *dma_addr_to_page(struct device *dev,
  50         dma_addr_t dma_addr)
  51 {
  52         return pfn_to_page(
  53                 plat_dma_addr_to_phys(dev, dma_addr) >> PAGE_SHIFT);
  54 }
  55
  56 /*
  57  * The affected CPUs below in 'cpu_needs_post_dma_flush()' can
  58  * speculatively fill random cachelines with stale data at any time,
  59  * requiring an extra flush post-DMA.
  60  *
  61  * Warning on the terminology - Linux calls an uncached area coherent;
  62  * MIPS terminology calls memory areas with hardware maintained coherency
  63  * coherent.
  64  *
  65  * Note that the R14000 and R16000 should also be checked for in this
  66  * condition.  However this function is only called on non-I/O-coherent
  67  * systems and only the R10000 and R12000 are used in such systems, the
  68  * SGI IP28 Indigo² rsp. SGI IP32 aka O2.
  69  */
  70 static inline int cpu_needs_post_dma_flush(struct device *dev)
  71 {
  72         return !plat_device_is_coherent(dev) &&
  73                (boot_cpu_type() == CPU_R10000 ||
  74                 boot_cpu_type() == CPU_R12000 ||
  75                 boot_cpu_type() == CPU_BMIPS5000);
  76 }
  77
  78 static gfp_t massage_gfp_flags(const struct device *dev, gfp_t gfp)
  79 {
  80         gfp_t dma_flag;
  81
  82         /* ignore region specifiers */
  83         gfp &= ~(__GFP_DMA | __GFP_DMA32 | __GFP_HIGHMEM);
  84
  85 #ifdef CONFIG_ISA
  86         if (dev == NULL)
  87                 dma_flag = __GFP_DMA;
  88         else
  89 #endif
  90 #if defined(CONFIG_ZONE_DMA32) && defined(CONFIG_ZONE_DMA)
  91              if (dev->coherent_dma_mask < DMA_BIT_MASK(32))
  92                         dma_flag = __GFP_DMA;
  93         else if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  94                         dma_flag = __GFP_DMA32;
  95         else
  96 #endif
  97 #if defined(CONFIG_ZONE_DMA32) && !defined(CONFIG_ZONE_DMA)
  98              if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
  99                 dma_flag = __GFP_DMA32;
 100         else
 101 #endif
 102 #if defined(CONFIG_ZONE_DMA) && !defined(CONFIG_ZONE_DMA32)
 103              if (dev->coherent_dma_mask < DMA_BIT_MASK(64))
 104                 dma_flag = __GFP_DMA;
 105         else
 106 #endif
 107                 dma_flag = 0;
 108
 109         /* Don't invoke OOM killer */
 110         gfp |= __GFP_NORETRY;
 111
 112         return gfp | dma_flag;
 113 }
 114
 115 static void *mips_dma_alloc_noncoherent(struct device *dev, size_t size,
 116         dma_addr_t * dma_handle, gfp_t gfp)
 117 {
 118         void *ret;
 119
 120         gfp = massage_gfp_flags(dev, gfp);
 121
 122         ret = (void *) __get_free_pages(gfp, get_order(size));
 123
 124         if (ret != NULL) {
 125                 memset(ret, 0, size);
 126                 *dma_handle = plat_map_dma_mem(dev, ret, size);
 127         }
 128
 129         return ret;
 130 }
 131
 132 static void *mips_dma_alloc_coherent(struct device *dev, size_t size,
 133         dma_addr_t * dma_handle, gfp_t gfp, struct dma_attrs *attrs)
 134 {
 135         void *ret;
 136         struct page *page = NULL;
 137         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 138
 139         /*
 140          * XXX: seems like the coherent and non-coherent implementations could
 141          * be consolidated.
 142          */
 143         if (dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs))
 144                 return mips_dma_alloc_noncoherent(dev, size, dma_handle, gfp);
 145
 146         gfp = massage_gfp_flags(dev, gfp);
 147
 148         if (IS_ENABLED(CONFIG_DMA_CMA) && !(gfp & GFP_ATOMIC))
 149                 page = dma_alloc_from_contiguous(dev,
 150                                         count, get_order(size));
 151         if (!page)
 152                 page = alloc_pages(gfp, get_order(size));
 153
 154         if (!page)
 155                 return NULL;
 156
 157         ret = page_address(page);
 158         memset(ret, 0, size);
 159         *dma_handle = plat_map_dma_mem(dev, ret, size);
 160         if (!plat_device_is_coherent(dev)) {
 161                 dma_cache_wback_inv((unsigned long) ret, size);
 162                 if (!hw_coherentio)
 163                         ret = UNCAC_ADDR(ret);
 164         }
 165
 166         return ret;
 167 }
 168
 169
 170 static void mips_dma_free_noncoherent(struct device *dev, size_t size,
 171                 void *vaddr, dma_addr_t dma_handle)
 172 {
 173         plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
 174         free_pages((unsigned long) vaddr, get_order(size));
 175 }
 176
 177 static void mips_dma_free_coherent(struct device *dev, size_t size, void *vaddr,
 178         dma_addr_t dma_handle, struct dma_attrs *attrs)
 179 {
 180         unsigned long addr = (unsigned long) vaddr;
 181         unsigned int count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 182         struct page *page = NULL;
 183
 184         if (dma_get_attr(DMA_ATTR_NON_CONSISTENT, attrs)) {
 185                 mips_dma_free_noncoherent(dev, size, vaddr, dma_handle);
 186                 return;
 187         }
 188
 189         plat_unmap_dma_mem(dev, dma_handle, size, DMA_BIDIRECTIONAL);
 190
 191         if (!plat_device_is_coherent(dev) && !hw_coherentio)
 192                 addr = CAC_ADDR(addr);
 193
 194         page = virt_to_page((void *) addr);
 195
 196         if (!dma_release_from_contiguous(dev, page, count))
 197                 __free_pages(page, get_order(size));
 198 }
 199
 200 static int mips_dma_mmap(struct device *dev, struct vm_area_struct *vma,
 201         void *cpu_addr, dma_addr_t dma_addr, size_t size,
 202         struct dma_attrs *attrs)
 203 {
 204         unsigned long user_count = (vma->vm_end - vma->vm_start) >> PAGE_SHIFT;
 205         unsigned long count = PAGE_ALIGN(size) >> PAGE_SHIFT;
 206         unsigned long addr = (unsigned long)cpu_addr;
 207         unsigned long off = vma->vm_pgoff;
 208         unsigned long pfn;
 209         int ret = -ENXIO;
 210
 211         if (!plat_device_is_coherent(dev) && !hw_coherentio)
 212                 addr = CAC_ADDR(addr);
 213
 214         pfn = page_to_pfn(virt_to_page((void *)addr));
 215
 216         if (dma_get_attr(DMA_ATTR_WRITE_COMBINE, attrs))
 217                 vma->vm_page_prot = pgprot_writecombine(vma->vm_page_prot);
 218         else
 219                 vma->vm_page_prot = pgprot_noncached(vma->vm_page_prot);
 220
 221         if (dma_mmap_from_coherent(dev, vma, cpu_addr, size, &ret))
 222                 return ret;
 223
 224         if (off < count && user_count <= (count - off)) {
 225                 ret = remap_pfn_range(vma, vma->vm_start,
 226                                       pfn + off,
 227                                       user_count << PAGE_SHIFT,
 228                                       vma->vm_page_prot);
 229         }
 230
 231         return ret;
 232 }
 233
 234 static inline void __dma_sync_virtual(void *addr, size_t size,
 235         enum dma_data_direction direction)
 236 {
 237         switch (direction) {
 238         case DMA_TO_DEVICE:
 239                 dma_cache_wback((unsigned long)addr, size);
 240                 break;
 241
 242         case DMA_FROM_DEVICE:
 243                 dma_cache_inv((unsigned long)addr, size);
 244                 break;
 245
 246         case DMA_BIDIRECTIONAL:
 247                 dma_cache_wback_inv((unsigned long)addr, size);
 248                 break;
 249
 250         default:
 251                 BUG();
 252         }
 253 }
 254
 255 /*
 256  * A single sg entry may refer to multiple physically contiguous
 257  * pages. But we still need to process highmem pages individually.
 258  * If highmem is not configured then the bulk of this loop gets
 259  * optimized out.
 260  */
 261 static inline void __dma_sync(struct page *page,
 262         unsigned long offset, size_t size, enum dma_data_direction direction)
 263 {
 264         size_t left = size;
 265
 266         do {
 267                 size_t len = left;
 268
 269                 if (PageHighMem(page)) {
 270                         void *addr;
 271
 272                         if (offset + len > PAGE_SIZE) {
 273                                 if (offset >= PAGE_SIZE) {
 274                                         page += offset >> PAGE_SHIFT;
 275                                         offset &= ~PAGE_MASK;
 276                                 }
 277                                 len = PAGE_SIZE - offset;
 278                         }
 279
 280                         addr = kmap_atomic(page);
 281                         __dma_sync_virtual(addr + offset, len, direction);
 282                         kunmap_atomic(addr);
 283                 } else
 284                         __dma_sync_virtual(page_address(page) + offset,
 285                                            size, direction);
 286                 offset = 0;
 287                 page++;
 288                 left -= len;
 289         } while (left);
 290 }
 291
 292 static void mips_dma_unmap_page(struct device *dev, dma_addr_t dma_addr,
 293         size_t size, enum dma_data_direction direction, struct dma_attrs *attrs)
 294 {
 295         if (cpu_needs_post_dma_flush(dev))
 296                 __dma_sync(dma_addr_to_page(dev, dma_addr),
 297                            dma_addr & ~PAGE_MASK, size, direction);
 298         plat_post_dma_flush(dev);
 299         plat_unmap_dma_mem(dev, dma_addr, size, direction);
 300 }
 301
 302 static int mips_dma_map_sg(struct device *dev, struct scatterlist *sglist,
 303         int nents, enum dma_data_direction direction, struct dma_attrs *attrs)
 304 {
 305         int i;
 306         struct scatterlist *sg;
 307
 308         for_each_sg(sglist, sg, nents, i) {
 309                 if (!plat_device_is_coherent(dev))
 310                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 311                                    direction);
 312 #ifdef CONFIG_NEED_SG_DMA_LENGTH
 313                 sg->dma_length = sg->length;
 314 #endif
 315                 sg->dma_address = plat_map_dma_mem_page(dev, sg_page(sg)) +
 316                                   sg->offset;
 317         }
 318
 319         return nents;
 320 }
 321
 322 static dma_addr_t mips_dma_map_page(struct device *dev, struct page *page,
 323         unsigned long offset, size_t size, enum dma_data_direction direction,
 324         struct dma_attrs *attrs)
 325 {
 326         if (!plat_device_is_coherent(dev))
 327                 __dma_sync(page, offset, size, direction);
 328
 329         return plat_map_dma_mem_page(dev, page) + offset;
 330 }
 331
 332 static void mips_dma_unmap_sg(struct device *dev, struct scatterlist *sglist,
 333         int nhwentries, enum dma_data_direction direction,
 334         struct dma_attrs *attrs)
 335 {
 336         int i;
 337         struct scatterlist *sg;
 338
 339         for_each_sg(sglist, sg, nhwentries, i) {
 340                 if (!plat_device_is_coherent(dev) &&
 341                     direction != DMA_TO_DEVICE)
 342                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 343                                    direction);
 344                 plat_unmap_dma_mem(dev, sg->dma_address, sg->length, direction);
 345         }
 346 }
 347
 348 static void mips_dma_sync_single_for_cpu(struct device *dev,
 349         dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 350 {
 351         if (cpu_needs_post_dma_flush(dev))
 352                 __dma_sync(dma_addr_to_page(dev, dma_handle),
 353                            dma_handle & ~PAGE_MASK, size, direction);
 354         plat_post_dma_flush(dev);
 355 }
 356
 357 static void mips_dma_sync_single_for_device(struct device *dev,
 358         dma_addr_t dma_handle, size_t size, enum dma_data_direction direction)
 359 {
 360         if (!plat_device_is_coherent(dev))
 361                 __dma_sync(dma_addr_to_page(dev, dma_handle),
 362                            dma_handle & ~PAGE_MASK, size, direction);
 363 }
 364
 365 static void mips_dma_sync_sg_for_cpu(struct device *dev,
 366         struct scatterlist *sglist, int nelems,
 367         enum dma_data_direction direction)
 368 {
 369         int i;
 370         struct scatterlist *sg;
 371
 372         if (cpu_needs_post_dma_flush(dev)) {
 373                 for_each_sg(sglist, sg, nelems, i) {
 374                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 375                                    direction);
 376                 }
 377         }
 378         plat_post_dma_flush(dev);
 379 }
 380
 381 static void mips_dma_sync_sg_for_device(struct device *dev,
 382         struct scatterlist *sglist, int nelems,
 383         enum dma_data_direction direction)
 384 {
 385         int i;
 386         struct scatterlist *sg;
 387
 388         if (!plat_device_is_coherent(dev)) {
 389                 for_each_sg(sglist, sg, nelems, i) {
 390                         __dma_sync(sg_page(sg), sg->offset, sg->length,
 391                                    direction);
 392                 }
 393         }
 394 }
 395
 396 int mips_dma_mapping_error(struct device *dev, dma_addr_t dma_addr)
 397 {
 398         return 0;
 399 }
 400
 401 int mips_dma_supported(struct device *dev, u64 mask)
 402 {
 403         return plat_dma_supported(dev, mask);
 404 }
 405
 406 void dma_cache_sync(struct device *dev, void *vaddr, size_t size,
 407                          enum dma_data_direction direction)
 408 {
 409         BUG_ON(direction == DMA_NONE);
 410
 411         if (!plat_device_is_coherent(dev))
 412                 __dma_sync_virtual(vaddr, size, direction);
 413 }
 414
 415 EXPORT_SYMBOL(dma_cache_sync);
 416
 417 static struct dma_map_ops mips_default_dma_map_ops = {
 418         .alloc = mips_dma_alloc_coherent,
 419         .free = mips_dma_free_coherent,
 420         .mmap = mips_dma_mmap,
 421         .map_page = mips_dma_map_page,
 422         .unmap_page = mips_dma_unmap_page,
 423         .map_sg = mips_dma_map_sg,
 424         .unmap_sg = mips_dma_unmap_sg,
 425         .sync_single_for_cpu = mips_dma_sync_single_for_cpu,
 426         .sync_single_for_device = mips_dma_sync_single_for_device,
 427         .sync_sg_for_cpu = mips_dma_sync_sg_for_cpu,
 428         .sync_sg_for_device = mips_dma_sync_sg_for_device,
 429         .mapping_error = mips_dma_mapping_error,
 430         .dma_supported = mips_dma_supported
 431 };
 432
 433 struct dma_map_ops *mips_dma_map_ops = &mips_default_dma_map_ops;
 434 EXPORT_SYMBOL(mips_dma_map_ops);
 435
 436 #define PREALLOC_DMA_DEBUG_ENTRIES (1 << 16)
 437
 438 static int __init mips_dma_init(void)
 439 {
 440         dma_debug_init(PREALLOC_DMA_DEBUG_ENTRIES);
 441
 442         return 0;
 443 }
 444 fs_initcall(mips_dma_init);