2 * T4240 Silicon/SoC Device Tree Source (post include)
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38 compatible = "fsl,ifc", "simple-bus";
39 interrupts = <25 2 0 0>;
42 /* controller at 0x240000 */
44 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
48 bus-range = <0x0 0xff>;
49 interrupts = <20 2 0 0>;
51 #interrupt-cells = <1>;
55 interrupts = <20 2 0 0>;
56 interrupt-map-mask = <0xf800 0 0 7>;
59 0000 0 0 1 &mpic 40 1 0 0
60 0000 0 0 2 &mpic 1 1 0 0
61 0000 0 0 3 &mpic 2 1 0 0
62 0000 0 0 4 &mpic 3 1 0 0
67 /* controller at 0x250000 */
69 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
74 interrupts = <21 2 0 0>;
76 #interrupt-cells = <1>;
80 interrupts = <21 2 0 0>;
81 interrupt-map-mask = <0xf800 0 0 7>;
84 0000 0 0 1 &mpic 41 1 0 0
85 0000 0 0 2 &mpic 5 1 0 0
86 0000 0 0 3 &mpic 6 1 0 0
87 0000 0 0 4 &mpic 7 1 0 0
92 /* controller at 0x260000 */
94 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
98 bus-range = <0x0 0xff>;
99 interrupts = <22 2 0 0>;
101 #interrupt-cells = <1>;
103 #address-cells = <3>;
105 interrupts = <22 2 0 0>;
106 interrupt-map-mask = <0xf800 0 0 7>;
109 0000 0 0 1 &mpic 42 1 0 0
110 0000 0 0 2 &mpic 9 1 0 0
111 0000 0 0 3 &mpic 10 1 0 0
112 0000 0 0 4 &mpic 11 1 0 0
117 /* controller at 0x270000 */
119 compatible = "fsl,t4240-pcie", "fsl,qoriq-pcie-v3.0";
122 #address-cells = <3>;
123 bus-range = <0x0 0xff>;
124 interrupts = <23 2 0 0>;
126 #interrupt-cells = <1>;
128 #address-cells = <3>;
130 interrupts = <23 2 0 0>;
131 interrupt-map-mask = <0xf800 0 0 7>;
134 0000 0 0 1 &mpic 43 1 0 0
135 0000 0 0 2 &mpic 0 1 0 0
136 0000 0 0 3 &mpic 4 1 0 0
137 0000 0 0 4 &mpic 8 1 0 0
143 compatible = "fsl,srio";
144 interrupts = <16 2 1 11>;
145 #address-cells = <2>;
150 #address-cells = <2>;
156 #address-cells = <2>;
163 #address-cells = <1>;
165 compatible = "fsl,dcsr", "simple-bus";
168 compatible = "fsl,t4240-dcsr-epu", "fsl,dcsr-epu";
169 interrupts = <52 2 0 0
177 compatible = "fsl,t4240-dcsr-cnpc", "fsl,dcsr-cnpc";
178 reg = <0x1000 0x1000 0x1002000 0x10000>;
181 compatible = "fsl,dcsr-nxc";
182 reg = <0x2000 0x1000>;
185 compatible = "fsl,dcsr-corenet";
186 reg = <0x8000 0x1000 0x1A000 0x1000>;
189 compatible = "fsl,t4240-dcsr-dpaa", "fsl,dcsr-dpaa";
190 reg = <0x9000 0x1000>;
193 compatible = "fsl,t4240-dcsr-ocn", "fsl,dcsr-ocn";
194 reg = <0x11000 0x1000>;
197 compatible = "fsl,dcsr-ddr";
198 dev-handle = <&ddr1>;
199 reg = <0x12000 0x1000>;
202 compatible = "fsl,dcsr-ddr";
203 dev-handle = <&ddr2>;
204 reg = <0x13000 0x1000>;
207 compatible = "fsl,dcsr-ddr";
208 dev-handle = <&ddr3>;
209 reg = <0x14000 0x1000>;
212 compatible = "fsl,t4240-dcsr-nal", "fsl,dcsr-nal";
213 reg = <0x18000 0x1000>;
216 compatible = "fsl,t4240-dcsr-rcpm", "fsl,dcsr-rcpm";
217 reg = <0x22000 0x1000>;
220 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
221 reg = <0x30000 0x1000 0x1022000 0x10000>;
224 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
225 reg = <0x31000 0x1000 0x1042000 0x10000>;
228 compatible = "fsl,t4240-dcsr-snpc", "fsl,dcsr-snpc";
229 reg = <0x32000 0x1000 0x1062000 0x10000>;
231 dcsr-cpu-sb-proxy@100000 {
232 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
233 cpu-handle = <&cpu0>;
234 reg = <0x100000 0x1000 0x101000 0x1000>;
236 dcsr-cpu-sb-proxy@108000 {
237 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
238 cpu-handle = <&cpu1>;
239 reg = <0x108000 0x1000 0x109000 0x1000>;
241 dcsr-cpu-sb-proxy@110000 {
242 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
243 cpu-handle = <&cpu2>;
244 reg = <0x110000 0x1000 0x111000 0x1000>;
246 dcsr-cpu-sb-proxy@118000 {
247 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
248 cpu-handle = <&cpu3>;
249 reg = <0x118000 0x1000 0x119000 0x1000>;
251 dcsr-cpu-sb-proxy@120000 {
252 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
253 cpu-handle = <&cpu4>;
254 reg = <0x120000 0x1000 0x121000 0x1000>;
256 dcsr-cpu-sb-proxy@128000 {
257 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
258 cpu-handle = <&cpu5>;
259 reg = <0x128000 0x1000 0x129000 0x1000>;
261 dcsr-cpu-sb-proxy@130000 {
262 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
263 cpu-handle = <&cpu6>;
264 reg = <0x130000 0x1000 0x131000 0x1000>;
266 dcsr-cpu-sb-proxy@138000 {
267 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
268 cpu-handle = <&cpu7>;
269 reg = <0x138000 0x1000 0x139000 0x1000>;
271 dcsr-cpu-sb-proxy@140000 {
272 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
273 cpu-handle = <&cpu8>;
274 reg = <0x140000 0x1000 0x141000 0x1000>;
276 dcsr-cpu-sb-proxy@148000 {
277 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
278 cpu-handle = <&cpu9>;
279 reg = <0x148000 0x1000 0x149000 0x1000>;
281 dcsr-cpu-sb-proxy@150000 {
282 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
283 cpu-handle = <&cpu10>;
284 reg = <0x150000 0x1000 0x151000 0x1000>;
286 dcsr-cpu-sb-proxy@158000 {
287 compatible = "fsl,dcsr-e6500-sb-proxy", "fsl,dcsr-cpu-sb-proxy";
288 cpu-handle = <&cpu11>;
289 reg = <0x158000 0x1000 0x159000 0x1000>;
294 #address-cells = <1>;
297 compatible = "simple-bus";
300 compatible = "fsl,soc-sram-error";
301 interrupts = <16 2 1 29>;
305 compatible = "fsl,corenet-law";
310 ddr1: memory-controller@8000 {
311 compatible = "fsl,qoriq-memory-controller-v4.7",
312 "fsl,qoriq-memory-controller";
313 reg = <0x8000 0x1000>;
314 interrupts = <16 2 1 23>;
317 ddr2: memory-controller@9000 {
318 compatible = "fsl,qoriq-memory-controller-v4.7",
319 "fsl,qoriq-memory-controller";
320 reg = <0x9000 0x1000>;
321 interrupts = <16 2 1 22>;
324 ddr3: memory-controller@a000 {
325 compatible = "fsl,qoriq-memory-controller-v4.7",
326 "fsl,qoriq-memory-controller";
327 reg = <0xa000 0x1000>;
328 interrupts = <16 2 1 21>;
331 cpc: l3-cache-controller@10000 {
332 compatible = "fsl,t4240-l3-cache-controller", "cache";
333 reg = <0x10000 0x1000
336 interrupts = <16 2 1 27
342 compatible = "fsl,corenet-cf";
343 reg = <0x18000 0x1000>;
344 interrupts = <16 2 1 31>;
345 fsl,ccf-num-csdids = <32>;
346 fsl,ccf-num-snoopids = <32>;
350 compatible = "fsl,pamu-v1.0", "fsl,pamu";
351 reg = <0x20000 0x6000>;
357 /include/ "qoriq-mpic.dtsi"
359 guts: global-utilities@e0000 {
360 compatible = "fsl,t4240-device-config", "fsl,qoriq-device-config-2.0";
361 reg = <0xe0000 0xe00>;
363 fsl,liodn-bits = <12>;
366 clockgen: global-utilities@e1000 {
367 compatible = "fsl,t4240-clockgen", "fsl,qoriq-clockgen-2";
368 reg = <0xe1000 0x1000>;
371 rcpm: global-utilities@e2000 {
372 compatible = "fsl,t4240-rcpm", "fsl,qoriq-rcpm-2";
373 reg = <0xe2000 0x1000>;
377 compatible = "fsl,t4240-sfp";
378 reg = <0xe8000 0x1000>;
381 serdes: serdes@ea000 {
382 compatible = "fsl,t4240-serdes";
383 reg = <0xea000 0x4000>;
386 /include/ "qoriq-dma-0.dtsi"
387 /include/ "qoriq-dma-1.dtsi"
389 /include/ "qoriq-espi-0.dtsi"
391 fsl,espi-num-chipselects = <4>;
394 /include/ "qoriq-esdhc-0.dtsi"
396 compatible = "fsl,t4240-esdhc", "fsl,esdhc";
399 /include/ "qoriq-i2c-0.dtsi"
400 /include/ "qoriq-i2c-1.dtsi"
401 /include/ "qoriq-duart-0.dtsi"
402 /include/ "qoriq-duart-1.dtsi"
403 /include/ "qoriq-gpio-0.dtsi"
404 /include/ "qoriq-gpio-1.dtsi"
405 /include/ "qoriq-gpio-2.dtsi"
406 /include/ "qoriq-gpio-3.dtsi"
407 /include/ "qoriq-usb2-mph-0.dtsi"
409 compatible = "fsl-usb2-mph-v2.4", "fsl-usb2-mph";
413 /include/ "qoriq-usb2-dr-0.dtsi"
415 compatible = "fsl-usb2-dr-v2.4", "fsl-usb2-dr";
419 /include/ "qoriq-sata2-0.dtsi"
420 /include/ "qoriq-sata2-1.dtsi"
421 /include/ "qoriq-sec5.0-0.dtsi"
423 L2_1: l2-cache-controller@c20000 {
424 compatible = "fsl,t4240-l2-cache-controller";
425 reg = <0xc20000 0x40000>;
426 next-level-cache = <&cpc>;
428 L2_2: l2-cache-controller@c60000 {
429 compatible = "fsl,t4240-l2-cache-controller";
430 reg = <0xc60000 0x40000>;
431 next-level-cache = <&cpc>;
433 L2_3: l2-cache-controller@ca0000 {
434 compatible = "fsl,t4240-l2-cache-controller";
435 reg = <0xca0000 0x40000>;
436 next-level-cache = <&cpc>;