2 * MPC8572DS Device Tree Source stub (no addresses or top-level ranges)
4 * Copyright 2011 Freescale Semiconductor Inc.
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39 compatible = "cfi-flash";
40 reg = <0x0 0x0 0x8000000>;
45 reg = <0x0 0x03000000>;
46 label = "ramdisk-nor";
50 reg = <0x03000000 0x00e00000>;
51 label = "diagnostic-nor";
56 reg = <0x03e00000 0x00200000>;
62 reg = <0x04000000 0x00400000>;
67 reg = <0x04400000 0x03b00000>;
72 reg = <0x07f00000 0x00060000>;
77 reg = <0x07f60000 0x00020000>;
83 reg = <0x07f80000 0x00080000>;
92 compatible = "fsl,mpc8572-fcm-nand",
94 reg = <0x2 0x0 0x40000>;
97 reg = <0x0 0x02000000>;
98 label = "u-boot-nand";
103 reg = <0x02000000 0x10000000>;
108 reg = <0x12000000 0x08000000>;
109 label = "ramdisk-nand";
113 reg = <0x1a000000 0x04000000>;
114 label = "kernel-nand";
118 reg = <0x1e000000 0x01000000>;
123 reg = <0x1f000000 0x21000000>;
124 label = "empty-nand";
129 compatible = "fsl,mpc8572-fcm-nand",
131 reg = <0x4 0x0 0x40000>;
135 compatible = "fsl,mpc8572-fcm-nand",
137 reg = <0x5 0x0 0x40000>;
141 compatible = "fsl,mpc8572-fcm-nand",
143 reg = <0x6 0x0 0x40000>;
148 enet0: ethernet@24000 {
149 tbi-handle = <&tbi0>;
150 phy-handle = <&phy0>;
151 phy-connection-type = "rgmii-id";
155 phy0: ethernet-phy@0 {
156 interrupts = <10 1 0 0>;
159 phy1: ethernet-phy@1 {
160 interrupts = <10 1 0 0>;
163 phy2: ethernet-phy@2 {
164 interrupts = <10 1 0 0>;
167 phy3: ethernet-phy@3 {
168 interrupts = <10 1 0 0>;
174 device_type = "tbi-phy";
179 fsl,tclk-period = <5>;
180 fsl,tmr-prsc = <200>;
181 fsl,tmr-add = <0xAAAAAAAB>;
182 fsl,tmr-fiper1 = <0x3B9AC9FB>;
183 fsl,tmr-fiper2 = <0x3B9AC9FB>;
184 fsl,max-adj = <499999999>;
187 enet1: ethernet@25000 {
188 tbi-handle = <&tbi1>;
189 phy-handle = <&phy1>;
190 phy-connection-type = "rgmii-id";
197 device_type = "tbi-phy";
201 enet2: ethernet@26000 {
202 tbi-handle = <&tbi2>;
203 phy-handle = <&phy2>;
204 phy-connection-type = "rgmii-id";
210 device_type = "tbi-phy";
214 enet3: ethernet@27000 {
215 tbi-handle = <&tbi3>;
216 phy-handle = <&phy3>;
217 phy-connection-type = "rgmii-id";
223 device_type = "tbi-phy";
230 interrupt-map-mask = <0xff00 0x0 0x0 0x7>;
232 /* IDSEL 0x11 func 0 - PCI slot 1 */
233 0x8800 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
234 0x8800 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
235 0x8800 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
236 0x8800 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
238 /* IDSEL 0x11 func 1 - PCI slot 1 */
239 0x8900 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
240 0x8900 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
241 0x8900 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
242 0x8900 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
244 /* IDSEL 0x11 func 2 - PCI slot 1 */
245 0x8a00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
246 0x8a00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
247 0x8a00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
248 0x8a00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
250 /* IDSEL 0x11 func 3 - PCI slot 1 */
251 0x8b00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
252 0x8b00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
253 0x8b00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
254 0x8b00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
256 /* IDSEL 0x11 func 4 - PCI slot 1 */
257 0x8c00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
258 0x8c00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
259 0x8c00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
260 0x8c00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
262 /* IDSEL 0x11 func 5 - PCI slot 1 */
263 0x8d00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
264 0x8d00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
265 0x8d00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
266 0x8d00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
268 /* IDSEL 0x11 func 6 - PCI slot 1 */
269 0x8e00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
270 0x8e00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
271 0x8e00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
272 0x8e00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
274 /* IDSEL 0x11 func 7 - PCI slot 1 */
275 0x8f00 0x0 0x0 0x1 &mpic 0x2 0x1 0 0
276 0x8f00 0x0 0x0 0x2 &mpic 0x3 0x1 0 0
277 0x8f00 0x0 0x0 0x3 &mpic 0x4 0x1 0 0
278 0x8f00 0x0 0x0 0x4 &mpic 0x1 0x1 0 0
280 /* IDSEL 0x12 func 0 - PCI slot 2 */
281 0x9000 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
282 0x9000 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
283 0x9000 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
284 0x9000 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
286 /* IDSEL 0x12 func 1 - PCI slot 2 */
287 0x9100 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
288 0x9100 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
289 0x9100 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
290 0x9100 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
292 /* IDSEL 0x12 func 2 - PCI slot 2 */
293 0x9200 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
294 0x9200 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
295 0x9200 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
296 0x9200 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
298 /* IDSEL 0x12 func 3 - PCI slot 2 */
299 0x9300 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
300 0x9300 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
301 0x9300 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
302 0x9300 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
304 /* IDSEL 0x12 func 4 - PCI slot 2 */
305 0x9400 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
306 0x9400 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
307 0x9400 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
308 0x9400 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
310 /* IDSEL 0x12 func 5 - PCI slot 2 */
311 0x9500 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
312 0x9500 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
313 0x9500 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
314 0x9500 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
316 /* IDSEL 0x12 func 6 - PCI slot 2 */
317 0x9600 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
318 0x9600 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
319 0x9600 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
320 0x9600 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
322 /* IDSEL 0x12 func 7 - PCI slot 2 */
323 0x9700 0x0 0x0 0x1 &mpic 0x3 0x1 0 0
324 0x9700 0x0 0x0 0x2 &mpic 0x4 0x1 0 0
325 0x9700 0x0 0x0 0x3 &mpic 0x1 0x1 0 0
326 0x9700 0x0 0x0 0x4 &mpic 0x2 0x1 0 0
329 0xe000 0x0 0x0 0x1 &i8259 0xc 0x2
330 0xe100 0x0 0x0 0x2 &i8259 0x9 0x2
331 0xe200 0x0 0x0 0x3 &i8259 0xa 0x2
332 0xe300 0x0 0x0 0x4 &i8259 0xb 0x2
335 0xe800 0x0 0x0 0x1 &i8259 0x6 0x2
338 0xf000 0x0 0x0 0x1 &i8259 0x7 0x2
339 0xf100 0x0 0x0 0x1 &i8259 0x7 0x2
341 // IDSEL 0x1f IDE/SATA
342 0xf800 0x0 0x0 0x1 &i8259 0xe 0x2
343 0xf900 0x0 0x0 0x1 &i8259 0x5 0x2
348 reg = <0x0 0x0 0x0 0x0 0x0>;
350 #address-cells = <3>;
351 ranges = <0x2000000 0x0 0x80000000
352 0x2000000 0x0 0x80000000
360 #interrupt-cells = <2>;
362 #address-cells = <2>;
363 reg = <0xf000 0x0 0x0 0x0 0x0>;
364 ranges = <0x1 0x0 0x1000000 0x0 0x0
366 interrupt-parent = <&i8259>;
368 i8259: interrupt-controller@20 {
372 interrupt-controller;
373 device_type = "interrupt-controller";
374 #address-cells = <0>;
375 #interrupt-cells = <2>;
376 compatible = "chrp,iic";
377 interrupts = <9 2 0 0>;
378 interrupt-parent = <&mpic>;
383 #address-cells = <1>;
384 reg = <0x1 0x60 0x1 0x1 0x64 0x1>;
385 interrupts = <1 3 12 3>;
391 compatible = "pnpPNP,303";
396 compatible = "pnpPNP,f03";
401 compatible = "pnpPNP,b00";
402 reg = <0x1 0x70 0x2>;
406 reg = <0x1 0x400 0x80>;