2 * P2041RDB Device Tree Source
4 * Copyright 2011 Freescale Semiconductor Inc.
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7 * modification, are permitted provided that the following conditions are met:
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19 * GNU General Public License ("GPL") as published by the Free Software
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35 /include/ "fsl/p2041si-pre.dtsi"
38 model = "fsl,P2041RDB";
39 compatible = "fsl,P2041RDB";
42 interrupt-parent = <&mpic>;
45 device_type = "memory";
48 dcsr: dcsr@f00000000 {
49 ranges = <0x00000000 0xf 0x00000000 0x01008000>;
53 ranges = <0x00000000 0xf 0xfe000000 0x1000000>;
54 reg = <0xf 0xfe000000 0 0x00001000>;
59 compatible = "spansion,s25sl12801";
61 spi-max-frequency = <40000000>; /* input clock */
64 reg = <0x00000000 0x00100000>;
69 reg = <0x00100000 0x00500000>;
74 reg = <0x00600000 0x00100000>;
78 label = "file system";
79 reg = <0x00700000 0x00900000>;
86 compatible = "nxp,lm75a";
90 compatible = "at24,24c256";
94 compatible = "pericom,pt7c4338";
101 compatible = "at24,24c256";
111 rio: rapidio@ffe0c0000 {
112 reg = <0xf 0xfe0c0000 0 0x11000>;
115 ranges = <0 0 0xc 0x20000000 0 0x10000000>;
118 ranges = <0 0 0xc 0x30000000 0 0x10000000>;
122 lbc: localbus@ffe124000 {
123 reg = <0xf 0xfe124000 0 0x1000>;
124 ranges = <0 0 0xf 0xe8000000 0x08000000
125 1 0 0xf 0xffa00000 0x00040000>;
128 compatible = "cfi-flash";
129 reg = <0 0 0x08000000>;
135 #address-cells = <1>;
137 compatible = "fsl,elbc-fcm-nand";
138 reg = <0x1 0x0 0x40000>;
141 label = "NAND U-Boot Image";
142 reg = <0x0 0x02000000>;
147 label = "NAND Root File System";
148 reg = <0x02000000 0x10000000>;
152 label = "NAND Compressed RFS Image";
153 reg = <0x12000000 0x08000000>;
157 label = "NAND Linux Kernel Image";
158 reg = <0x1a000000 0x04000000>;
162 label = "NAND DTB Image";
163 reg = <0x1e000000 0x01000000>;
167 label = "NAND Writable User area";
168 reg = <0x1f000000 0x01000000>;
173 pci0: pcie@ffe200000 {
174 reg = <0xf 0xfe200000 0 0x1000>;
175 ranges = <0x02000000 0 0xe0000000 0xc 0x00000000 0x0 0x20000000
176 0x01000000 0 0x00000000 0xf 0xf8000000 0x0 0x00010000>;
178 ranges = <0x02000000 0 0xe0000000
179 0x02000000 0 0xe0000000
182 0x01000000 0 0x00000000
183 0x01000000 0 0x00000000
188 pci1: pcie@ffe201000 {
189 reg = <0xf 0xfe201000 0 0x1000>;
190 ranges = <0x02000000 0x0 0xe0000000 0xc 0x20000000 0x0 0x20000000
191 0x01000000 0x0 0x00000000 0xf 0xf8010000 0x0 0x00010000>;
193 ranges = <0x02000000 0 0xe0000000
194 0x02000000 0 0xe0000000
197 0x01000000 0 0x00000000
198 0x01000000 0 0x00000000
203 pci2: pcie@ffe202000 {
204 reg = <0xf 0xfe202000 0 0x1000>;
205 ranges = <0x02000000 0 0xe0000000 0xc 0x40000000 0 0x20000000
206 0x01000000 0 0x00000000 0xf 0xf8020000 0 0x00010000>;
208 ranges = <0x02000000 0 0xe0000000
209 0x02000000 0 0xe0000000
212 0x01000000 0 0x00000000
213 0x01000000 0 0x00000000
219 /include/ "fsl/p2041si-post.dtsi"