2 * Copyright 2011 Freescale Semiconductor, Inc.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License as
6 * published by the Free Software Foundation; either version 2 of
7 * the License, or (at your option) any later version.
9 * This program is distributed in the hope that it will be useful,
10 * but WITHOUT ANY WARRANTY; without even the implied warranty of
11 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
12 * GNU General Public License for more details.
14 * You should have received a copy of the GNU General Public License
15 * along with this program; if not, write to the Free Software
16 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
21 #ifndef _ASM_MPC85xx_CONFIG_H_
22 #define _ASM_MPC85xx_CONFIG_H_
24 /* SoC specific defines for Freescale MPC85xx (PQ3) and QorIQ processors */
26 /* Number of TLB CAM entries we have on FSL Book-E chips */
27 #if defined(CONFIG_E500MC)
28 #define CONFIG_SYS_NUM_TLBCAMS 64
29 #elif defined(CONFIG_E500)
30 #define CONFIG_SYS_NUM_TLBCAMS 16
33 #if defined(CONFIG_MPC8536)
34 #define CONFIG_MAX_CPUS 1
35 #define CONFIG_SYS_FSL_NUM_LAWS 12
36 #define CONFIG_SYS_FSL_SEC_COMPAT 2
38 #elif defined(CONFIG_MPC8540)
39 #define CONFIG_MAX_CPUS 1
40 #define CONFIG_SYS_FSL_NUM_LAWS 8
42 #elif defined(CONFIG_MPC8541)
43 #define CONFIG_MAX_CPUS 1
44 #define CONFIG_SYS_FSL_NUM_LAWS 8
45 #define CONFIG_SYS_FSL_SEC_COMPAT 2
47 #elif defined(CONFIG_MPC8544)
48 #define CONFIG_MAX_CPUS 1
49 #define CONFIG_SYS_FSL_NUM_LAWS 10
50 #define CONFIG_SYS_FSL_SEC_COMPAT 2
52 #elif defined(CONFIG_MPC8548)
53 #define CONFIG_MAX_CPUS 1
54 #define CONFIG_SYS_FSL_NUM_LAWS 10
55 #define CONFIG_SYS_FSL_SEC_COMPAT 2
57 #elif defined(CONFIG_MPC8555)
58 #define CONFIG_MAX_CPUS 1
59 #define CONFIG_SYS_FSL_NUM_LAWS 8
60 #define CONFIG_SYS_FSL_SEC_COMPAT 2
62 #elif defined(CONFIG_MPC8560)
63 #define CONFIG_MAX_CPUS 1
64 #define CONFIG_SYS_FSL_NUM_LAWS 8
66 #elif defined(CONFIG_MPC8568)
67 #define CONFIG_MAX_CPUS 1
68 #define CONFIG_SYS_FSL_NUM_LAWS 10
69 #define CONFIG_SYS_FSL_SEC_COMPAT 2
71 #elif defined(CONFIG_MPC8569)
72 #define CONFIG_MAX_CPUS 1
73 #define CONFIG_SYS_FSL_NUM_LAWS 10
74 #define CONFIG_SYS_FSL_SEC_COMPAT 2
76 #elif defined(CONFIG_MPC8572)
77 #define CONFIG_MAX_CPUS 2
78 #define CONFIG_SYS_FSL_NUM_LAWS 12
79 #define CONFIG_SYS_FSL_SEC_COMPAT 2
80 #define CONFIG_SYS_FSL_ERRATUM_DDR_115
81 #define CONFIG_SYS_FSL_ERRATUM_DDR111_DDR134
83 #elif defined(CONFIG_P1010)
84 #define CONFIG_MAX_CPUS 1
85 #define CONFIG_SYS_FSL_NUM_LAWS 12
87 #define CONFIG_SYS_FSL_SEC_COMPAT 4
89 #elif defined(CONFIG_P1011)
90 #define CONFIG_MAX_CPUS 1
91 #define CONFIG_SYS_FSL_NUM_LAWS 12
93 #define CONFIG_FSL_PCIE_DISABLE_ASPM
94 #define CONFIG_SYS_FSL_SEC_COMPAT 2
96 #elif defined(CONFIG_P1012)
97 #define CONFIG_MAX_CPUS 1
98 #define CONFIG_SYS_FSL_NUM_LAWS 12
100 #define CONFIG_FSL_PCIE_DISABLE_ASPM
101 #define CONFIG_SYS_FSL_SEC_COMPAT 2
103 #elif defined(CONFIG_P1013)
104 #define CONFIG_MAX_CPUS 1
105 #define CONFIG_SYS_FSL_NUM_LAWS 12
106 #define CONFIG_TSECV2
107 #define CONFIG_SYS_FSL_SEC_COMPAT 2
108 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
109 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
110 #define CONFIG_FSL_SATA_ERRATUM_A001
112 #elif defined(CONFIG_P1014)
113 #define CONFIG_MAX_CPUS 1
114 #define CONFIG_SYS_FSL_NUM_LAWS 12
115 #define CONFIG_TSECV2
116 #define CONFIG_SYS_FSL_SEC_COMPAT 4
118 #elif defined(CONFIG_P1020)
119 #define CONFIG_MAX_CPUS 2
120 #define CONFIG_SYS_FSL_NUM_LAWS 12
121 #define CONFIG_TSECV2
122 #define CONFIG_FSL_PCIE_DISABLE_ASPM
123 #define CONFIG_SYS_FSL_SEC_COMPAT 2
125 #elif defined(CONFIG_P1021)
126 #define CONFIG_MAX_CPUS 2
127 #define CONFIG_SYS_FSL_NUM_LAWS 12
128 #define CONFIG_TSECV2
129 #define CONFIG_FSL_PCIE_DISABLE_ASPM
130 #define CONFIG_SYS_FSL_SEC_COMPAT 2
132 #elif defined(CONFIG_P1022)
133 #define CONFIG_MAX_CPUS 2
134 #define CONFIG_SYS_FSL_NUM_LAWS 12
135 #define CONFIG_TSECV2
136 #define CONFIG_SYS_FSL_SEC_COMPAT 2
137 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
138 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
139 #define CONFIG_FSL_SATA_ERRATUM_A001
141 #elif defined(CONFIG_P2010)
142 #define CONFIG_MAX_CPUS 1
143 #define CONFIG_SYS_FSL_NUM_LAWS 12
144 #define CONFIG_SYS_FSL_SEC_COMPAT 2
145 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
146 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
148 #elif defined(CONFIG_P2020)
149 #define CONFIG_MAX_CPUS 2
150 #define CONFIG_SYS_FSL_NUM_LAWS 12
151 #define CONFIG_SYS_FSL_SEC_COMPAT 2
152 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
153 #define CONFIG_SYS_FSL_ERRATUM_ESDHC_A001
155 #elif defined(CONFIG_PPC_P2040)
156 #define CONFIG_MAX_CPUS 4
157 #define CONFIG_SYS_FSL_NUM_LAWS 32
158 #define CONFIG_SYS_FSL_SEC_COMPAT 4
160 #elif defined(CONFIG_PPC_P3041)
161 #define CONFIG_MAX_CPUS 4
162 #define CONFIG_SYS_FSL_NUM_LAWS 32
163 #define CONFIG_SYS_FSL_SEC_COMPAT 4
165 #elif defined(CONFIG_PPC_P4040)
166 #define CONFIG_MAX_CPUS 4
167 #define CONFIG_SYS_FSL_NUM_LAWS 32
168 #define CONFIG_SYS_FSL_SEC_COMPAT 4
170 #elif defined(CONFIG_PPC_P4080)
171 #define CONFIG_MAX_CPUS 8
172 #define CONFIG_SYS_FSL_NUM_LAWS 32
173 #define CONFIG_SYS_FSL_SEC_COMPAT 4
174 #define CONFIG_SYS_NUM_FMAN 2
175 #define CONFIG_SYS_NUM_FM1_DTSEC 4
176 #define CONFIG_SYS_NUM_FM2_DTSEC 4
177 #define CONFIG_SYS_NUM_FM1_10GEC 1
178 #define CONFIG_SYS_NUM_FM2_10GEC 1
179 #define CONFIG_NUM_DDR_CONTROLLERS 2
180 #define CONFIG_SYS_FSL_ERRATUM_CPC_A002
181 #define CONFIG_SYS_FSL_ERRATUM_CPC_A003
182 #define CONFIG_SYS_FSL_ERRATUM_DDR_A003
183 #define CONFIG_SYS_FSL_ERRATUM_ELBC_A001
184 #define CONFIG_SYS_FSL_ERRATUM_ESDHC111
185 #define CONFIG_SYS_FSL_ERRATUM_ESDHC135
186 #define CONFIG_SYS_FSL_ERRATUM_ESDHC136
187 #define CONFIG_SYS_P4080_ERRATUM_CPU22
188 #define CONFIG_SYS_P4080_ERRATUM_SERDES8
190 #elif defined(CONFIG_PPC_P5010)
191 #define CONFIG_MAX_CPUS 1
192 #define CONFIG_SYS_FSL_NUM_LAWS 32
193 #define CONFIG_SYS_FSL_SEC_COMPAT 4
195 #elif defined(CONFIG_PPC_P5020)
196 #define CONFIG_MAX_CPUS 2
197 #define CONFIG_SYS_FSL_NUM_LAWS 32
198 #define CONFIG_SYS_FSL_SEC_COMPAT 4
201 #error Processor type not defined for this platform
204 #endif /* _ASM_MPC85xx_CONFIG_H_ */