1 #ifndef _ASM_POWERPC_EXCEPTION_H
2 #define _ASM_POWERPC_EXCEPTION_H
4 * Extracted from head_64.S
7 * Copyright (C) 1995-1996 Gary Thomas (gdt@linuxppc.org)
9 * Rewritten by Cort Dougan (cort@cs.nmt.edu) for PReP
10 * Copyright (C) 1996 Cort Dougan <cort@cs.nmt.edu>
11 * Adapted for Power Macintosh by Paul Mackerras.
12 * Low-level exception handlers and MMU support
13 * rewritten by Paul Mackerras.
14 * Copyright (C) 1996 Paul Mackerras.
16 * Adapted for 64bit PowerPC by Dave Engebretsen, Peter Bergner, and
17 * Mike Corrigan {engebret|bergner|mikejc}@us.ibm.com
19 * This file contains the low-level support and setup for the
20 * PowerPC-64 platform, including trap and interrupt dispatch.
22 * This program is free software; you can redistribute it and/or
23 * modify it under the terms of the GNU General Public License
24 * as published by the Free Software Foundation; either version
25 * 2 of the License, or (at your option) any later version.
28 * The following macros define the code that appears as
29 * the prologue to each of the exception handlers. They
30 * are split into two parts to allow a single kernel binary
31 * to be used for pSeries and iSeries.
33 * We make as much of the exception code common between native
34 * exception handlers (including pSeries LPAR) and iSeries LPAR
35 * implementations as possible.
37 #include <asm/head-64.h>
51 #define EX_PPR 88 /* SMT thread status register (priority) */
54 #ifdef CONFIG_RELOCATABLE
55 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
56 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
57 LOAD_HANDLER(r12,label); \
59 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
61 mtmsrd r10,1; /* Set RI (EE=0) */ \
64 /* If not relocatable, we can jump directly -- and save messing with LR */
65 #define __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
66 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
67 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
69 mtmsrd r10,1; /* Set RI (EE=0) */ \
72 #define EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
73 __EXCEPTION_RELON_PROLOG_PSERIES_1(label, h) \
76 * As EXCEPTION_PROLOG_PSERIES(), except we've already got relocation on
77 * so no need to rfid. Save lr in case we're CONFIG_RELOCATABLE, in which
78 * case EXCEPTION_RELON_PROLOG_PSERIES_1 will be using lr.
80 #define EXCEPTION_RELON_PROLOG_PSERIES(area, label, h, extra, vec) \
81 EXCEPTION_PROLOG_0(area); \
82 EXCEPTION_PROLOG_1(area, extra, vec); \
83 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
86 * We're short on space and time in the exception prolog, so we can't
87 * use the normal LOAD_REG_IMMEDIATE macro to load the address of label.
88 * Instead we get the base of the kernel from paca->kernelbase and or in the low
89 * part of label. This requires that the label be within 64KB of kernelbase, and
90 * that kernelbase be 64K aligned.
92 #define LOAD_HANDLER(reg, label) \
93 ld reg,PACAKBASE(r13); /* get high part of &label */ \
94 ori reg,reg,FIXED_SYMBOL_ABS_ADDR(label);
96 #define __LOAD_HANDLER(reg, label) \
97 ld reg,PACAKBASE(r13); \
98 ori reg,reg,(ABS_ADDR(label))@l;
101 * Branches from unrelocated code (e.g., interrupts) to labels outside
102 * head-y require >64K offsets.
104 #define __LOAD_FAR_HANDLER(reg, label) \
105 ld reg,PACAKBASE(r13); \
106 ori reg,reg,(ABS_ADDR(label))@l; \
107 addis reg,reg,(ABS_ADDR(label))@h;
109 /* Exception register prefixes */
113 #if defined(CONFIG_RELOCATABLE)
115 * If we support interrupts with relocation on AND we're a relocatable kernel,
116 * we need to use CTR to get to the 2nd level handler. So, save/restore it
119 #define SAVE_CTR(reg, area) mfctr reg ; std reg,area+EX_CTR(r13)
120 #define GET_CTR(reg, area) ld reg,area+EX_CTR(r13)
121 #define RESTORE_CTR(reg, area) ld reg,area+EX_CTR(r13) ; mtctr reg
123 /* ...else CTR is unused and in register. */
124 #define SAVE_CTR(reg, area)
125 #define GET_CTR(reg, area) mfctr reg
126 #define RESTORE_CTR(reg, area)
130 * PPR save/restore macros used in exceptions_64s.S
131 * Used for P7 or later processors
133 #define SAVE_PPR(area, ra, rb) \
134 BEGIN_FTR_SECTION_NESTED(940) \
135 ld ra,PACACURRENT(r13); \
136 ld rb,area+EX_PPR(r13); /* Read PPR from paca */ \
137 std rb,TASKTHREADPPR(ra); \
138 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,940)
140 #define RESTORE_PPR_PACA(area, ra) \
141 BEGIN_FTR_SECTION_NESTED(941) \
142 ld ra,area+EX_PPR(r13); \
144 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,941)
147 * Get an SPR into a register if the CPU has the given feature
149 #define OPT_GET_SPR(ra, spr, ftr) \
150 BEGIN_FTR_SECTION_NESTED(943) \
152 END_FTR_SECTION_NESTED(ftr,ftr,943)
155 * Set an SPR from a register if the CPU has the given feature
157 #define OPT_SET_SPR(ra, spr, ftr) \
158 BEGIN_FTR_SECTION_NESTED(943) \
160 END_FTR_SECTION_NESTED(ftr,ftr,943)
163 * Save a register to the PACA if the CPU has the given feature
165 #define OPT_SAVE_REG_TO_PACA(offset, ra, ftr) \
166 BEGIN_FTR_SECTION_NESTED(943) \
167 std ra,offset(r13); \
168 END_FTR_SECTION_NESTED(ftr,ftr,943)
170 #define EXCEPTION_PROLOG_0(area) \
172 std r9,area+EX_R9(r13); /* save r9 */ \
173 OPT_GET_SPR(r9, SPRN_PPR, CPU_FTR_HAS_PPR); \
175 std r10,area+EX_R10(r13); /* save r10 - r12 */ \
176 OPT_GET_SPR(r10, SPRN_CFAR, CPU_FTR_CFAR)
178 #define __EXCEPTION_PROLOG_1(area, extra, vec) \
179 OPT_SAVE_REG_TO_PACA(area+EX_PPR, r9, CPU_FTR_HAS_PPR); \
180 OPT_SAVE_REG_TO_PACA(area+EX_CFAR, r10, CPU_FTR_CFAR); \
181 SAVE_CTR(r10, area); \
184 std r11,area+EX_R11(r13); \
185 std r12,area+EX_R12(r13); \
187 std r10,area+EX_R13(r13)
188 #define EXCEPTION_PROLOG_1(area, extra, vec) \
189 __EXCEPTION_PROLOG_1(area, extra, vec)
191 #define __EXCEPTION_PROLOG_PSERIES_1(label, h) \
192 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
193 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
194 LOAD_HANDLER(r12,label) \
195 mtspr SPRN_##h##SRR0,r12; \
196 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
197 mtspr SPRN_##h##SRR1,r10; \
199 b . /* prevent speculative execution */
200 #define EXCEPTION_PROLOG_PSERIES_1(label, h) \
201 __EXCEPTION_PROLOG_PSERIES_1(label, h)
203 /* _NORI variant keeps MSR_RI clear */
204 #define __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
205 ld r10,PACAKMSR(r13); /* get MSR value for kernel */ \
206 xori r10,r10,MSR_RI; /* Clear MSR_RI */ \
207 mfspr r11,SPRN_##h##SRR0; /* save SRR0 */ \
208 LOAD_HANDLER(r12,label) \
209 mtspr SPRN_##h##SRR0,r12; \
210 mfspr r12,SPRN_##h##SRR1; /* and SRR1 */ \
211 mtspr SPRN_##h##SRR1,r10; \
213 b . /* prevent speculative execution */
215 #define EXCEPTION_PROLOG_PSERIES_1_NORI(label, h) \
216 __EXCEPTION_PROLOG_PSERIES_1_NORI(label, h)
218 #define EXCEPTION_PROLOG_PSERIES(area, label, h, extra, vec) \
219 EXCEPTION_PROLOG_0(area); \
220 EXCEPTION_PROLOG_1(area, extra, vec); \
221 EXCEPTION_PROLOG_PSERIES_1(label, h);
223 #define __KVMTEST(h, n) \
224 lbz r10,HSTATE_IN_GUEST(r13); \
228 #ifdef CONFIG_KVM_BOOK3S_HV_POSSIBLE
230 * If hv is possible, interrupts come into to the hv version
231 * of the kvmppc_interrupt code, which then jumps to the PR handler,
232 * kvmppc_interrupt_pr, if the guest is a PR guest.
234 #define kvmppc_interrupt kvmppc_interrupt_hv
236 #define kvmppc_interrupt kvmppc_interrupt_pr
239 #ifdef CONFIG_RELOCATABLE
240 #define BRANCH_TO_COMMON(reg, label) \
241 __LOAD_HANDLER(reg, label); \
245 #define BRANCH_LINK_TO_FAR(label) \
246 __LOAD_FAR_HANDLER(r12, label); \
251 * KVM requires __LOAD_FAR_HANDLER.
253 * __BRANCH_TO_KVM_EXIT branches are also a special case because they
254 * explicitly use r9 then reload it from PACA before branching. Hence
255 * the double-underscore.
257 #define __BRANCH_TO_KVM_EXIT(area, label) \
259 std r9,HSTATE_SCRATCH1(r13); \
260 __LOAD_FAR_HANDLER(r9, label); \
262 ld r9,area+EX_R9(r13); \
266 #define BRANCH_TO_COMMON(reg, label) \
269 #define BRANCH_LINK_TO_FAR(label) \
272 #define __BRANCH_TO_KVM_EXIT(area, label) \
273 ld r9,area+EX_R9(r13); \
278 /* Do not enable RI */
279 #define EXCEPTION_PROLOG_PSERIES_NORI(area, label, h, extra, vec) \
280 EXCEPTION_PROLOG_0(area); \
281 EXCEPTION_PROLOG_1(area, extra, vec); \
282 EXCEPTION_PROLOG_PSERIES_1_NORI(label, h);
285 #define __KVM_HANDLER(area, h, n) \
286 BEGIN_FTR_SECTION_NESTED(947) \
287 ld r10,area+EX_CFAR(r13); \
288 std r10,HSTATE_CFAR(r13); \
289 END_FTR_SECTION_NESTED(CPU_FTR_CFAR,CPU_FTR_CFAR,947); \
290 BEGIN_FTR_SECTION_NESTED(948) \
291 ld r10,area+EX_PPR(r13); \
292 std r10,HSTATE_PPR(r13); \
293 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
294 ld r10,area+EX_R10(r13); \
295 std r12,HSTATE_SCRATCH0(r13); \
298 /* This reloads r9 before branching to kvmppc_interrupt */ \
299 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt)
301 #define __KVM_HANDLER_SKIP(area, h, n) \
302 cmpwi r10,KVM_GUEST_MODE_SKIP; \
304 BEGIN_FTR_SECTION_NESTED(948) \
305 ld r10,area+EX_PPR(r13); \
306 std r10,HSTATE_PPR(r13); \
307 END_FTR_SECTION_NESTED(CPU_FTR_HAS_PPR,CPU_FTR_HAS_PPR,948); \
308 ld r10,area+EX_R10(r13); \
309 std r12,HSTATE_SCRATCH0(r13); \
312 /* This reloads r9 before branching to kvmppc_interrupt */ \
313 __BRANCH_TO_KVM_EXIT(area, kvmppc_interrupt); \
314 89: mtocrf 0x80,r9; \
315 ld r9,area+EX_R9(r13); \
316 ld r10,area+EX_R10(r13); \
317 b kvmppc_skip_##h##interrupt
319 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
320 #define KVMTEST(h, n) __KVMTEST(h, n)
321 #define KVM_HANDLER(area, h, n) __KVM_HANDLER(area, h, n)
322 #define KVM_HANDLER_SKIP(area, h, n) __KVM_HANDLER_SKIP(area, h, n)
325 #define KVMTEST(h, n)
326 #define KVM_HANDLER(area, h, n)
327 #define KVM_HANDLER_SKIP(area, h, n)
332 #define EXCEPTION_PROLOG_COMMON_1() \
333 std r9,_CCR(r1); /* save CR in stackframe */ \
334 std r11,_NIP(r1); /* save SRR0 in stackframe */ \
335 std r12,_MSR(r1); /* save SRR1 in stackframe */ \
336 std r10,0(r1); /* make stack chain pointer */ \
337 std r0,GPR0(r1); /* save r0 in stackframe */ \
338 std r10,GPR1(r1); /* save r1 in stackframe */ \
342 * The common exception prolog is used for all except a few exceptions
343 * such as a segment miss on a kernel address. We have to be prepared
344 * to take another exception from the point where we first touch the
345 * kernel stack onwards.
347 * On entry r13 points to the paca, r9-r13 are saved in the paca,
348 * r9 contains the saved CR, r11 and r12 contain the saved SRR0 and
349 * SRR1, and relocation is on.
351 #define EXCEPTION_PROLOG_COMMON(n, area) \
352 andi. r10,r12,MSR_PR; /* See if coming from user */ \
353 mr r10,r1; /* Save r1 */ \
354 subi r1,r1,INT_FRAME_SIZE; /* alloc frame on kernel stack */ \
356 ld r1,PACAKSAVE(r13); /* kernel stack to use */ \
357 1: cmpdi cr1,r1,-INT_FRAME_SIZE; /* check if r1 is in userspace */ \
358 blt+ cr1,3f; /* abort if it is */ \
359 li r1,(n); /* will be reloaded later */ \
360 sth r1,PACA_TRAP_SAVE(r13); \
361 std r3,area+EX_R3(r13); \
362 addi r3,r13,area; /* r3 -> where regs are saved*/ \
363 RESTORE_CTR(r1, area); \
365 3: EXCEPTION_PROLOG_COMMON_1(); \
366 beq 4f; /* if from kernel mode */ \
367 ACCOUNT_CPU_USER_ENTRY(r13, r9, r10); \
368 SAVE_PPR(area, r9, r10); \
369 4: EXCEPTION_PROLOG_COMMON_2(area) \
370 EXCEPTION_PROLOG_COMMON_3(n) \
373 /* Save original regs values from save area to stack frame. */
374 #define EXCEPTION_PROLOG_COMMON_2(area) \
375 ld r9,area+EX_R9(r13); /* move r9, r10 to stackframe */ \
376 ld r10,area+EX_R10(r13); \
379 ld r9,area+EX_R11(r13); /* move r11 - r13 to stackframe */ \
380 ld r10,area+EX_R12(r13); \
381 ld r11,area+EX_R13(r13); \
385 BEGIN_FTR_SECTION_NESTED(66); \
386 ld r10,area+EX_CFAR(r13); \
387 std r10,ORIG_GPR3(r1); \
388 END_FTR_SECTION_NESTED(CPU_FTR_CFAR, CPU_FTR_CFAR, 66); \
389 GET_CTR(r10, area); \
392 #define EXCEPTION_PROLOG_COMMON_3(n) \
393 std r2,GPR2(r1); /* save r2 in stackframe */ \
394 SAVE_4GPRS(3, r1); /* save r3 - r6 in stackframe */ \
395 SAVE_2GPRS(7, r1); /* save r7, r8 in stackframe */ \
396 mflr r9; /* Get LR, later save to stack */ \
397 ld r2,PACATOC(r13); /* get kernel TOC into r2 */ \
399 lbz r10,PACASOFTIRQEN(r13); \
400 mfspr r11,SPRN_XER; /* save XER in stackframe */ \
404 std r9,_TRAP(r1); /* set trap number */ \
406 ld r11,exception_marker@toc(r2); \
407 std r10,RESULT(r1); /* clear regs->result */ \
408 std r11,STACK_FRAME_OVERHEAD-16(r1); /* mark the frame */
413 #define STD_EXCEPTION_PSERIES(vec, label) \
414 SET_SCRATCH0(r13); /* save r13 */ \
415 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
416 EXC_STD, KVMTEST_PR, vec); \
418 /* Version of above for when we have to branch out-of-line */
419 #define __OOL_EXCEPTION(vec, label, hdlr) \
421 EXCEPTION_PROLOG_0(PACA_EXGEN) \
424 #define STD_EXCEPTION_PSERIES_OOL(vec, label) \
425 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_PR, vec); \
426 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
428 #define STD_EXCEPTION_HV(loc, vec, label) \
429 SET_SCRATCH0(r13); /* save r13 */ \
430 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, label, \
431 EXC_HV, KVMTEST_HV, vec);
433 #define STD_EXCEPTION_HV_OOL(vec, label) \
434 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
435 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
437 #define STD_RELON_EXCEPTION_PSERIES(loc, vec, label) \
438 /* No guest interrupts come through here */ \
439 SET_SCRATCH0(r13); /* save r13 */ \
440 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, EXC_STD, NOTEST, vec);
442 #define STD_RELON_EXCEPTION_PSERIES_OOL(vec, label) \
443 EXCEPTION_PROLOG_1(PACA_EXGEN, NOTEST, vec); \
444 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_STD)
446 #define STD_RELON_EXCEPTION_HV(loc, vec, label) \
447 SET_SCRATCH0(r13); /* save r13 */ \
448 EXCEPTION_RELON_PROLOG_PSERIES(PACA_EXGEN, label, \
449 EXC_HV, KVMTEST_HV, vec);
451 #define STD_RELON_EXCEPTION_HV_OOL(vec, label) \
452 EXCEPTION_PROLOG_1(PACA_EXGEN, KVMTEST_HV, vec); \
453 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
455 /* This associate vector numbers with bits in paca->irq_happened */
456 #define SOFTEN_VALUE_0x500 PACA_IRQ_EE
457 #define SOFTEN_VALUE_0x900 PACA_IRQ_DEC
458 #define SOFTEN_VALUE_0x980 PACA_IRQ_DEC
459 #define SOFTEN_VALUE_0xa00 PACA_IRQ_DBELL
460 #define SOFTEN_VALUE_0xe80 PACA_IRQ_DBELL
461 #define SOFTEN_VALUE_0xe60 PACA_IRQ_HMI
462 #define SOFTEN_VALUE_0xea0 PACA_IRQ_EE
464 #define __SOFTEN_TEST(h, vec) \
465 lbz r10,PACASOFTIRQEN(r13); \
467 li r10,SOFTEN_VALUE_##vec; \
468 beq masked_##h##interrupt
470 #define _SOFTEN_TEST(h, vec) __SOFTEN_TEST(h, vec)
472 #define SOFTEN_TEST_PR(vec) \
473 KVMTEST(EXC_STD, vec); \
474 _SOFTEN_TEST(EXC_STD, vec)
476 #define SOFTEN_TEST_HV(vec) \
477 KVMTEST(EXC_HV, vec); \
478 _SOFTEN_TEST(EXC_HV, vec)
480 #define KVMTEST_PR(vec) \
481 KVMTEST(EXC_STD, vec)
483 #define KVMTEST_HV(vec) \
486 #define SOFTEN_NOTEST_PR(vec) _SOFTEN_TEST(EXC_STD, vec)
487 #define SOFTEN_NOTEST_HV(vec) _SOFTEN_TEST(EXC_HV, vec)
489 #define __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
490 SET_SCRATCH0(r13); /* save r13 */ \
491 EXCEPTION_PROLOG_0(PACA_EXGEN); \
492 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
493 EXCEPTION_PROLOG_PSERIES_1(label, h);
495 #define _MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra) \
496 __MASKABLE_EXCEPTION_PSERIES(vec, label, h, extra)
498 #define MASKABLE_EXCEPTION_PSERIES(loc, vec, label) \
499 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
500 EXC_STD, SOFTEN_TEST_PR)
502 #define MASKABLE_EXCEPTION_PSERIES_OOL(vec, label) \
503 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_PR, vec); \
504 EXCEPTION_PROLOG_PSERIES_1(label, EXC_STD)
506 #define MASKABLE_EXCEPTION_HV(loc, vec, label) \
507 _MASKABLE_EXCEPTION_PSERIES(vec, label, \
508 EXC_HV, SOFTEN_TEST_HV)
510 #define MASKABLE_EXCEPTION_HV_OOL(vec, label) \
511 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
512 EXCEPTION_PROLOG_PSERIES_1(label, EXC_HV)
514 #define __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
515 SET_SCRATCH0(r13); /* save r13 */ \
516 EXCEPTION_PROLOG_0(PACA_EXGEN); \
517 __EXCEPTION_PROLOG_1(PACA_EXGEN, extra, vec); \
518 EXCEPTION_RELON_PROLOG_PSERIES_1(label, h)
520 #define _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra) \
521 __MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, h, extra)
523 #define MASKABLE_RELON_EXCEPTION_PSERIES(loc, vec, label) \
524 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
525 EXC_STD, SOFTEN_NOTEST_PR)
527 #define MASKABLE_RELON_EXCEPTION_HV(loc, vec, label) \
528 _MASKABLE_RELON_EXCEPTION_PSERIES(vec, label, \
529 EXC_HV, SOFTEN_TEST_HV)
531 #define MASKABLE_RELON_EXCEPTION_HV_OOL(vec, label) \
532 EXCEPTION_PROLOG_1(PACA_EXGEN, SOFTEN_TEST_HV, vec); \
533 EXCEPTION_RELON_PROLOG_PSERIES_1(label, EXC_HV)
536 * Our exception common code can be passed various "additions"
537 * to specify the behaviour of interrupts, whether to kick the
542 * This addition reconciles our actual IRQ state with the various software
543 * flags that track it. This may call C code.
545 #define ADD_RECONCILE RECONCILE_IRQ_STATE(r10,r11)
550 #define RUNLATCH_ON \
552 CURRENT_THREAD_INFO(r3, r1); \
553 ld r4,TI_LOCAL_FLAGS(r3); \
554 andi. r0,r4,_TLF_RUNLATCH; \
555 beql ppc64_runlatch_on_trampoline; \
556 END_FTR_SECTION_IFSET(CPU_FTR_CTRL)
558 #define EXCEPTION_COMMON(area, trap, label, hdlr, ret, additions) \
559 EXCEPTION_PROLOG_COMMON(trap, area); \
560 /* Volatile regs are potentially clobbered here */ \
562 addi r3,r1,STACK_FRAME_OVERHEAD; \
567 * Exception where stack is already set in r1, r1 is saved in r10, and it
568 * continues rather than returns.
570 #define EXCEPTION_COMMON_NORET_STACK(area, trap, label, hdlr, additions) \
571 EXCEPTION_PROLOG_COMMON_1(); \
572 EXCEPTION_PROLOG_COMMON_2(area); \
573 EXCEPTION_PROLOG_COMMON_3(trap); \
574 /* Volatile regs are potentially clobbered here */ \
576 addi r3,r1,STACK_FRAME_OVERHEAD; \
579 #define STD_EXCEPTION_COMMON(trap, label, hdlr) \
580 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
581 ret_from_except, ADD_NVGPRS;ADD_RECONCILE)
584 * Like STD_EXCEPTION_COMMON, but for exceptions that can occur
585 * in the idle task and therefore need the special idle handling
586 * (finish nap and runlatch)
588 #define STD_EXCEPTION_COMMON_ASYNC(trap, label, hdlr) \
589 EXCEPTION_COMMON(PACA_EXGEN, trap, label, hdlr, \
590 ret_from_except_lite, FINISH_NAP;ADD_RECONCILE;RUNLATCH_ON)
593 * When the idle code in power4_idle puts the CPU into NAP mode,
594 * it has to do so in a loop, and relies on the external interrupt
595 * and decrementer interrupt entry code to get it out of the loop.
596 * It sets the _TLF_NAPPING bit in current_thread_info()->local_flags
597 * to signal that it is in the loop and needs help to get out.
599 #ifdef CONFIG_PPC_970_NAP
602 CURRENT_THREAD_INFO(r11, r1); \
603 ld r9,TI_LOCAL_FLAGS(r11); \
604 andi. r10,r9,_TLF_NAPPING; \
605 bnel power4_fixup_nap; \
606 END_FTR_SECTION_IFSET(CPU_FTR_CAN_NAP)
611 #endif /* _ASM_POWERPC_EXCEPTION_H */