2 * This file contains the 64-bit "server" PowerPC variant
3 * of the low level exception handling including exception
4 * vectors, exception return, part of the slb and stab
5 * handling and other fixed offset specific things.
7 * This file is meant to be #included from head_64.S due to
8 * position dependent assembly.
10 * Most of this originates from head_64.S and thus has the same
15 #include <asm/hw_irq.h>
16 #include <asm/exception-64s.h>
17 #include <asm/ptrace.h>
20 * We layout physical memory as follows:
21 * 0x0000 - 0x00ff : Secondary processor spin code
22 * 0x0100 - 0x17ff : pSeries Interrupt prologs
23 * 0x1800 - 0x4000 : interrupt support common interrupt prologs
24 * 0x4000 - 0x5fff : pSeries interrupts with IR=1,DR=1
25 * 0x6000 - 0x6fff : more interrupt support including for IR=1,DR=1
26 * 0x7000 - 0x7fff : FWNMI data area
27 * 0x8000 - 0x8fff : Initial (CPU0) segment table
28 * 0x9000 - : Early init and support code
30 /* Syscall routine is used twice, in reloc-off and reloc-on paths */
31 #define SYSCALL_PSERIES_1 \
35 END_FTR_SECTION_IFSET(CPU_FTR_REAL_LE) \
38 mfspr r11,SPRN_SRR0 ; \
41 #define SYSCALL_PSERIES_2_RFID \
42 mfspr r12,SPRN_SRR1 ; \
43 ld r10,PACAKBASE(r13) ; \
44 LOAD_HANDLER(r10, system_call_entry) ; \
45 mtspr SPRN_SRR0,r10 ; \
46 ld r10,PACAKMSR(r13) ; \
47 mtspr SPRN_SRR1,r10 ; \
49 b . ; /* prevent speculative execution */
51 #define SYSCALL_PSERIES_3 \
52 /* Fast LE/BE switch system call */ \
53 1: mfspr r12,SPRN_SRR1 ; \
54 xori r12,r12,MSR_LE ; \
55 mtspr SPRN_SRR1,r12 ; \
56 rfid ; /* return to userspace */ \
58 2: mfspr r12,SPRN_SRR1 ; \
59 andi. r12,r12,MSR_PR ; \
61 mtspr SPRN_SRR0,r3 ; \
62 mtspr SPRN_SRR1,r4 ; \
63 mtspr SPRN_SDR1,r5 ; \
65 b . ; /* prevent speculative execution */
67 #if defined(CONFIG_RELOCATABLE)
69 * We can't branch directly; in the direct case we use LR
70 * and system_call_entry restores LR. (We thus need to move
71 * LR to r10 in the RFID case too.)
73 #define SYSCALL_PSERIES_2_DIRECT \
75 ld r12,PACAKBASE(r13) ; \
76 LOAD_HANDLER(r12, system_call_entry_direct) ; \
78 mfspr r12,SPRN_SRR1 ; \
79 /* Re-use of r13... No spare regs to do this */ \
82 GET_PACA(r13) ; /* get r13 back */ \
85 /* We can branch directly */
86 #define SYSCALL_PSERIES_2_DIRECT \
87 mfspr r12,SPRN_SRR1 ; \
89 mtmsrd r10,1 ; /* Set RI (EE=0) */ \
90 b system_call_entry_direct ;
94 * This is the start of the interrupt handlers for pSeries
95 * This code runs with relocation off.
96 * Code from here to __end_interrupts gets copied down to real
97 * address 0x100 when we are running a relocatable kernel.
98 * Therefore any relative branches in this section must only
99 * branch to labels in this section.
102 .globl __start_interrupts
105 .globl system_reset_pSeries;
106 system_reset_pSeries:
109 #ifdef CONFIG_PPC_P7_NAP
111 /* Running native on arch 2.06 or later, check if we are
112 * waking up from nap. We only handle no state loss and
113 * supervisor state loss. We do -not- handle hypervisor
114 * state loss at this time.
117 rlwinm. r13,r13,47-31,30,31
120 /* waking up from powersave (nap) state */
122 /* Total loss of HV state is fatal, we could try to use the
123 * PIR to locate a PACA, then use an emergency stack etc...
124 * but for now, let's just stay stuck here
129 #ifdef CONFIG_KVM_BOOK3S_64_HV
130 li r0,KVM_HWTHREAD_IN_KERNEL
131 stb r0,HSTATE_HWTHREAD_STATE(r13)
132 /* Order setting hwthread_state vs. testing hwthread_req */
134 lbz r0,HSTATE_HWTHREAD_REQ(r13)
142 b .power7_wakeup_noloss
143 2: b .power7_wakeup_loss
145 END_FTR_SECTION_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
146 #endif /* CONFIG_PPC_P7_NAP */
147 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
151 machine_check_pSeries_1:
152 /* This is moved out of line as it can be patched by FW, but
153 * some code path might still want to branch into the original
156 b machine_check_pSeries
159 .globl data_access_pSeries
164 b data_access_check_stab
165 data_access_not_stab:
166 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
167 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, data_access_common, EXC_STD,
171 .globl data_access_slb_pSeries
172 data_access_slb_pSeries:
175 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST, 0x380)
176 std r3,PACA_EXSLB+EX_R3(r13)
179 /* Keep that around for when we re-implement dynamic VSIDs */
181 bge slb_miss_user_pseries
182 #endif /* __DISABLED__ */
184 #ifndef CONFIG_RELOCATABLE
188 * We can't just use a direct branch to .slb_miss_realmode
189 * because the distance from here to there depends on where
190 * the kernel ends up being put.
193 ld r10,PACAKBASE(r13)
194 LOAD_HANDLER(r10, .slb_miss_realmode)
199 STD_EXCEPTION_PSERIES(0x400, 0x400, instruction_access)
202 .globl instruction_access_slb_pSeries
203 instruction_access_slb_pSeries:
206 EXCEPTION_PROLOG_1(PACA_EXSLB, KVMTEST_PR, 0x480)
207 std r3,PACA_EXSLB+EX_R3(r13)
208 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
210 /* Keep that around for when we re-implement dynamic VSIDs */
212 bge slb_miss_user_pseries
213 #endif /* __DISABLED__ */
215 #ifndef CONFIG_RELOCATABLE
219 ld r10,PACAKBASE(r13)
220 LOAD_HANDLER(r10, .slb_miss_realmode)
225 /* We open code these as we can't have a ". = x" (even with
226 * x = "." within a feature section
229 .globl hardware_interrupt_pSeries;
230 .globl hardware_interrupt_hv;
231 hardware_interrupt_pSeries:
232 hardware_interrupt_hv:
234 _MASKABLE_EXCEPTION_PSERIES(0x502, hardware_interrupt,
235 EXC_HV, SOFTEN_TEST_HV)
236 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x502)
238 _MASKABLE_EXCEPTION_PSERIES(0x500, hardware_interrupt,
239 EXC_STD, SOFTEN_TEST_HV_201)
240 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0x500)
241 ALT_FTR_SECTION_END_IFSET(CPU_FTR_HVMODE | CPU_FTR_ARCH_206)
243 STD_EXCEPTION_PSERIES(0x600, 0x600, alignment)
244 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x600)
246 STD_EXCEPTION_PSERIES(0x700, 0x700, program_check)
247 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x700)
249 STD_EXCEPTION_PSERIES(0x800, 0x800, fp_unavailable)
250 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x800)
252 MASKABLE_EXCEPTION_PSERIES(0x900, 0x900, decrementer)
253 STD_EXCEPTION_HV(0x980, 0x982, hdecrementer)
255 STD_EXCEPTION_PSERIES(0xa00, 0xa00, trap_0a)
256 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xa00)
258 STD_EXCEPTION_PSERIES(0xb00, 0xb00, trap_0b)
259 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xb00)
262 .globl system_call_pSeries
265 #ifdef CONFIG_KVM_BOOK3S_64_HANDLER
268 std r9,PACA_EXGEN+EX_R9(r13)
269 std r10,PACA_EXGEN+EX_R10(r13)
275 SYSCALL_PSERIES_2_RFID
277 KVM_HANDLER(PACA_EXGEN, EXC_STD, 0xc00)
279 STD_EXCEPTION_PSERIES(0xd00, 0xd00, single_step)
280 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xd00)
282 /* At 0xe??? we have a bunch of hypervisor exceptions, we branch
283 * out of line to handle them
286 hv_exception_trampoline:
291 b emulation_assist_hv
297 /* We need to deal with the Altivec unavailable exception
298 * here which is at 0xf20, thus in the middle of the
299 * prolog code of the PerformanceMonitor one. A little
300 * trickery is thus necessary
302 performance_monitor_pSeries_1:
304 b performance_monitor_pSeries
306 altivec_unavailable_pSeries_1:
308 b altivec_unavailable_pSeries
310 vsx_unavailable_pSeries_1:
312 b vsx_unavailable_pSeries
314 #ifdef CONFIG_CBE_RAS
315 STD_EXCEPTION_HV(0x1200, 0x1202, cbe_system_error)
316 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1202)
317 #endif /* CONFIG_CBE_RAS */
319 STD_EXCEPTION_PSERIES(0x1300, 0x1300, instruction_breakpoint)
320 KVM_HANDLER_PR_SKIP(PACA_EXGEN, EXC_STD, 0x1300)
323 .global denorm_exception_hv
326 mtspr SPRN_SPRG_HSCRATCH0,r13
327 mfspr r13,SPRN_SPRG_HPACA
328 std r9,PACA_EXGEN+EX_R9(r13)
329 std r10,PACA_EXGEN+EX_R10(r13)
330 std r11,PACA_EXGEN+EX_R11(r13)
331 std r12,PACA_EXGEN+EX_R12(r13)
332 mfspr r9,SPRN_SPRG_HSCRATCH0
333 std r9,PACA_EXGEN+EX_R13(r13)
336 #ifdef CONFIG_PPC_DENORMALISATION
338 mfspr r11,SPRN_HSRR0 /* save HSRR0 */
339 andis. r10,r10,(HSRR1_DENORM)@h /* denorm? */
340 addi r11,r11,-4 /* HSRR0 is next instruction */
344 EXCEPTION_PROLOG_PSERIES_1(denorm_common, EXC_HV)
345 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x1500)
347 #ifdef CONFIG_CBE_RAS
348 STD_EXCEPTION_HV(0x1600, 0x1602, cbe_maintenance)
349 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1602)
350 #endif /* CONFIG_CBE_RAS */
352 STD_EXCEPTION_PSERIES(0x1700, 0x1700, altivec_assist)
353 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x1700)
355 #ifdef CONFIG_CBE_RAS
356 STD_EXCEPTION_HV(0x1800, 0x1802, cbe_thermal)
357 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1802)
360 #endif /* CONFIG_CBE_RAS */
363 /*** Out of line interrupts support ***/
366 /* moved from 0x200 */
367 machine_check_pSeries:
368 .globl machine_check_fwnmi
371 SET_SCRATCH0(r13) /* save r13 */
372 EXCEPTION_PROLOG_PSERIES(PACA_EXMC, machine_check_common,
373 EXC_STD, KVMTEST, 0x200)
374 KVM_HANDLER_SKIP(PACA_EXMC, EXC_STD, 0x200)
376 /* moved from 0x300 */
377 data_access_check_stab:
379 std r9,PACA_EXSLB+EX_R9(r13)
380 std r10,PACA_EXSLB+EX_R10(r13)
384 rlwimi r10,r9,16,0x20
385 #ifdef CONFIG_KVM_BOOK3S_PR
386 lbz r9,HSTATE_IN_GUEST(r13)
387 rlwimi r10,r9,8,0x300
391 beq do_stab_bolted_pSeries
393 ld r9,PACA_EXSLB+EX_R9(r13)
394 ld r10,PACA_EXSLB+EX_R10(r13)
395 b data_access_not_stab
396 do_stab_bolted_pSeries:
397 std r11,PACA_EXSLB+EX_R11(r13)
398 std r12,PACA_EXSLB+EX_R12(r13)
400 std r10,PACA_EXSLB+EX_R13(r13)
401 EXCEPTION_PROLOG_PSERIES_1(.do_stab_bolted, EXC_STD)
403 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_STD, 0x300)
404 KVM_HANDLER_SKIP(PACA_EXSLB, EXC_STD, 0x380)
405 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x400)
406 KVM_HANDLER_PR(PACA_EXSLB, EXC_STD, 0x480)
407 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0x900)
408 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0x982)
410 #ifdef CONFIG_PPC_DENORMALISATION
414 * To denormalise we need to move a copy of the register to itself.
415 * For POWER6 do that here for all FP regs.
418 ori r10,r10,(MSR_FP|MSR_FE0|MSR_FE1)
419 xori r10,r10,(MSR_FE0|MSR_FE1)
456 * To denormalise we need to move a copy of the register to itself.
457 * For POWER7 do that here for the first 32 VSX registers only.
460 oris r10,r10,MSR_VSX@h
495 ALT_FTR_SECTION_END_IFCLR(CPU_FTR_ARCH_206)
498 ld r9,PACA_EXGEN+EX_R9(r13)
499 ld r10,PACA_EXGEN+EX_R10(r13)
500 ld r11,PACA_EXGEN+EX_R11(r13)
501 ld r12,PACA_EXGEN+EX_R12(r13)
502 ld r13,PACA_EXGEN+EX_R13(r13)
508 /* moved from 0xe00 */
509 STD_EXCEPTION_HV(., 0xe02, h_data_storage)
510 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0xe02)
511 STD_EXCEPTION_HV(., 0xe22, h_instr_storage)
512 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe22)
513 STD_EXCEPTION_HV(., 0xe42, emulation_assist)
514 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe42)
515 STD_EXCEPTION_HV(., 0xe62, hmi_exception) /* need to flush cache ? */
516 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe62)
518 /* moved from 0xf00 */
519 STD_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
520 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf00)
521 STD_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
522 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf20)
523 STD_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
524 KVM_HANDLER_PR(PACA_EXGEN, EXC_STD, 0xf40)
527 * An interrupt came in while soft-disabled. We set paca->irq_happened,
528 * then, if it was a decrementer interrupt, we bump the dec to max and
529 * and return, else we hard disable and return. This is called with
530 * r10 containing the value to OR to the paca field.
532 #define MASKED_INTERRUPT(_H) \
533 masked_##_H##interrupt: \
534 std r11,PACA_EXGEN+EX_R11(r13); \
535 lbz r11,PACAIRQHAPPENED(r13); \
537 stb r11,PACAIRQHAPPENED(r13); \
538 andi. r10,r10,PACA_IRQ_DEC; \
541 ori r10,r10,0xffff; \
542 mtspr SPRN_DEC,r10; \
544 1: mfspr r10,SPRN_##_H##SRR1; \
545 rldicl r10,r10,48,1; /* clear MSR_EE */ \
547 mtspr SPRN_##_H##SRR1,r10; \
549 ld r9,PACA_EXGEN+EX_R9(r13); \
550 ld r10,PACA_EXGEN+EX_R10(r13); \
551 ld r11,PACA_EXGEN+EX_R11(r13); \
560 * Called from arch_local_irq_enable when an interrupt needs
561 * to be resent. r3 contains 0x500 or 0x900 to indicate which
562 * kind of interrupt. MSR:EE is already off. We generate a
563 * stackframe like if a real interrupt had happened.
565 * Note: While MSR:EE is off, we need to make sure that _MSR
566 * in the generated frame has EE set to 1 or the exception
567 * handler will not properly re-enable them.
569 _GLOBAL(__replay_interrupt)
570 /* We are going to jump to the exception common code which
571 * will retrieve various register values from the PACA which
572 * we don't give a damn about, so we don't bother storing them.
579 bne decrementer_common
580 b hardware_interrupt_common
582 #ifdef CONFIG_PPC_PSERIES
584 * Vectors for the FWNMI option. Share common code.
586 .globl system_reset_fwnmi
590 SET_SCRATCH0(r13) /* save r13 */
591 EXCEPTION_PROLOG_PSERIES(PACA_EXGEN, system_reset_common, EXC_STD,
594 #endif /* CONFIG_PPC_PSERIES */
598 * This is used for when the SLB miss handler has to go virtual,
599 * which doesn't happen for now anymore but will once we re-implement
600 * dynamic VSIDs for shared page tables
602 slb_miss_user_pseries:
603 std r10,PACA_EXGEN+EX_R10(r13)
604 std r11,PACA_EXGEN+EX_R11(r13)
605 std r12,PACA_EXGEN+EX_R12(r13)
607 ld r11,PACA_EXSLB+EX_R9(r13)
608 ld r12,PACA_EXSLB+EX_R3(r13)
609 std r10,PACA_EXGEN+EX_R13(r13)
610 std r11,PACA_EXGEN+EX_R9(r13)
611 std r12,PACA_EXGEN+EX_R3(r13)
614 mfspr r11,SRR0 /* save SRR0 */
615 ori r12,r12,slb_miss_user_common@l /* virt addr of handler */
616 ori r10,r10,MSR_IR|MSR_DR|MSR_RI
618 mfspr r12,SRR1 /* and SRR1 */
621 b . /* prevent spec. execution */
622 #endif /* __DISABLED__ */
625 * Code from here down to __end_handlers is invoked from the
626 * exception prologs above. Because the prologs assemble the
627 * addresses of these handlers using the LOAD_HANDLER macro,
628 * which uses an ori instruction, these handlers must be in
629 * the first 64k of the kernel image.
632 /*** Common interrupt handlers ***/
634 STD_EXCEPTION_COMMON(0x100, system_reset, .system_reset_exception)
637 * Machine check is different because we use a different
638 * save area: PACA_EXMC instead of PACA_EXGEN.
641 .globl machine_check_common
642 machine_check_common:
643 EXCEPTION_PROLOG_COMMON(0x200, PACA_EXMC)
647 addi r3,r1,STACK_FRAME_OVERHEAD
648 bl .machine_check_exception
651 STD_EXCEPTION_COMMON_ASYNC(0x500, hardware_interrupt, do_IRQ)
652 STD_EXCEPTION_COMMON_ASYNC(0x900, decrementer, .timer_interrupt)
653 STD_EXCEPTION_COMMON(0x980, hdecrementer, .hdec_interrupt)
654 STD_EXCEPTION_COMMON(0xa00, trap_0a, .unknown_exception)
655 STD_EXCEPTION_COMMON(0xb00, trap_0b, .unknown_exception)
656 STD_EXCEPTION_COMMON(0xd00, single_step, .single_step_exception)
657 STD_EXCEPTION_COMMON(0xe00, trap_0e, .unknown_exception)
658 STD_EXCEPTION_COMMON(0xe40, emulation_assist, .program_check_exception)
659 STD_EXCEPTION_COMMON(0xe60, hmi_exception, .unknown_exception)
660 STD_EXCEPTION_COMMON_ASYNC(0xf00, performance_monitor, .performance_monitor_exception)
661 STD_EXCEPTION_COMMON(0x1300, instruction_breakpoint, .instruction_breakpoint_exception)
662 STD_EXCEPTION_COMMON(0x1502, denorm, .unknown_exception)
663 #ifdef CONFIG_ALTIVEC
664 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .altivec_assist_exception)
666 STD_EXCEPTION_COMMON(0x1700, altivec_assist, .unknown_exception)
668 #ifdef CONFIG_CBE_RAS
669 STD_EXCEPTION_COMMON(0x1200, cbe_system_error, .cbe_system_error_exception)
670 STD_EXCEPTION_COMMON(0x1600, cbe_maintenance, .cbe_maintenance_exception)
671 STD_EXCEPTION_COMMON(0x1800, cbe_thermal, .cbe_thermal_exception)
672 #endif /* CONFIG_CBE_RAS */
675 * Relocation-on interrupts: A subset of the interrupts can be delivered
676 * with IR=1/DR=1, if AIL==2 and MSR.HV won't be changed by delivering
677 * it. Addresses are the same as the original interrupt addresses, but
678 * offset by 0xc000000000004000.
679 * It's impossible to receive interrupts below 0x300 via this mechanism.
680 * KVM: None of these traps are from the guest ; anything that escalated
681 * to HV=1 from HV=0 is delivered via real mode handlers.
685 * This uses the standard macro, since the original 0x300 vector
686 * only has extra guff for STAB-based processors -- which never
689 STD_RELON_EXCEPTION_PSERIES(0x4300, 0x300, data_access)
691 .globl data_access_slb_relon_pSeries
692 data_access_slb_relon_pSeries:
695 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x380)
696 std r3,PACA_EXSLB+EX_R3(r13)
699 #ifndef CONFIG_RELOCATABLE
703 * We can't just use a direct branch to .slb_miss_realmode
704 * because the distance from here to there depends on where
705 * the kernel ends up being put.
708 ld r10,PACAKBASE(r13)
709 LOAD_HANDLER(r10, .slb_miss_realmode)
714 STD_RELON_EXCEPTION_PSERIES(0x4400, 0x400, instruction_access)
716 .globl instruction_access_slb_relon_pSeries
717 instruction_access_slb_relon_pSeries:
720 EXCEPTION_PROLOG_1(PACA_EXSLB, NOTEST, 0x480)
721 std r3,PACA_EXSLB+EX_R3(r13)
722 mfspr r3,SPRN_SRR0 /* SRR0 is faulting address */
724 #ifndef CONFIG_RELOCATABLE
728 ld r10,PACAKBASE(r13)
729 LOAD_HANDLER(r10, .slb_miss_realmode)
735 .globl hardware_interrupt_relon_pSeries;
736 .globl hardware_interrupt_relon_hv;
737 hardware_interrupt_relon_pSeries:
738 hardware_interrupt_relon_hv:
740 _MASKABLE_RELON_EXCEPTION_PSERIES(0x502, hardware_interrupt, EXC_HV, SOFTEN_TEST_HV)
742 _MASKABLE_RELON_EXCEPTION_PSERIES(0x500, hardware_interrupt, EXC_STD, SOFTEN_TEST_PR)
743 ALT_FTR_SECTION_END_IFSET(CPU_FTR_ARCH_206)
744 STD_RELON_EXCEPTION_PSERIES(0x4600, 0x600, alignment)
745 STD_RELON_EXCEPTION_PSERIES(0x4700, 0x700, program_check)
746 STD_RELON_EXCEPTION_PSERIES(0x4800, 0x800, fp_unavailable)
747 MASKABLE_RELON_EXCEPTION_PSERIES(0x4900, 0x900, decrementer)
748 STD_RELON_EXCEPTION_HV(0x4980, 0x982, hdecrementer)
749 STD_RELON_EXCEPTION_PSERIES(0x4b00, 0xb00, trap_0b)
752 .globl system_call_relon_pSeries
753 system_call_relon_pSeries:
756 SYSCALL_PSERIES_2_DIRECT
759 STD_RELON_EXCEPTION_PSERIES(0x4d00, 0xd00, single_step)
762 b h_data_storage_relon_hv
765 b h_instr_storage_relon_hv
768 b emulation_assist_relon_hv
771 b hmi_exception_relon_hv
774 b hmi_exception_relon_hv
776 /* For when we support the doorbell interrupt:
777 STD_RELON_EXCEPTION_HYPERVISOR(0x4e80, 0xe80, doorbell_hyper)
780 performance_monitor_relon_pSeries_1:
782 b performance_monitor_relon_pSeries
784 altivec_unavailable_relon_pSeries_1:
786 b altivec_unavailable_relon_pSeries
788 vsx_unavailable_relon_pSeries_1:
790 b vsx_unavailable_relon_pSeries
792 #ifdef CONFIG_CBE_RAS
793 STD_RELON_EXCEPTION_HV(0x5200, 0x1202, cbe_system_error)
794 #endif /* CONFIG_CBE_RAS */
795 STD_RELON_EXCEPTION_PSERIES(0x5300, 0x1300, instruction_breakpoint)
796 #ifdef CONFIG_PPC_DENORMALISATION
798 b denorm_exception_hv
800 #ifdef CONFIG_CBE_RAS
801 STD_RELON_EXCEPTION_HV(0x5600, 0x1602, cbe_maintenance)
803 #ifdef CONFIG_HVC_SCOM
804 STD_RELON_EXCEPTION_HV(0x5600, 0x1600, maintence_interrupt)
805 KVM_HANDLER_SKIP(PACA_EXGEN, EXC_HV, 0x1600)
806 #endif /* CONFIG_HVC_SCOM */
807 #endif /* CONFIG_CBE_RAS */
808 STD_RELON_EXCEPTION_PSERIES(0x5700, 0x1700, altivec_assist)
809 #ifdef CONFIG_CBE_RAS
810 STD_RELON_EXCEPTION_HV(0x5800, 0x1802, cbe_thermal)
811 #endif /* CONFIG_CBE_RAS */
813 /* Other future vectors */
815 .globl __end_interrupts
819 system_call_entry_direct:
820 #if defined(CONFIG_RELOCATABLE)
821 /* The first level prologue may have used LR to get here, saving
822 * orig in r10. To save hacking/ifdeffing common code, restore here.
829 ppc64_runlatch_on_trampoline:
830 b .__ppc64_runlatch_on
833 * Here we have detected that the kernel stack pointer is bad.
834 * R9 contains the saved CR, r13 points to the paca,
835 * r10 contains the (bad) kernel stack pointer,
836 * r11 and r12 contain the saved SRR0 and SRR1.
837 * We switch to using an emergency stack, save the registers there,
838 * and call kernel_bad_stack(), which panics.
841 ld r1,PACAEMERGSP(r13)
842 subi r1,r1,64+INT_FRAME_SIZE
874 std r10,ORIG_GPR3(r1)
875 END_FTR_SECTION_IFSET(CPU_FTR_CFAR)
878 lhz r12,PACA_TRAP_SAVE(r13)
880 addi r11,r1,INT_FRAME_SIZE
885 ld r11,exception_marker@toc(r2)
887 std r11,STACK_FRAME_OVERHEAD-16(r1)
888 1: addi r3,r1,STACK_FRAME_OVERHEAD
893 * Here r13 points to the paca, r9 contains the saved CR,
894 * SRR0 and SRR1 are saved in r11 and r12,
895 * r9 - r13 are saved in paca->exgen.
898 .globl data_access_common
901 std r10,PACA_EXGEN+EX_DAR(r13)
903 stw r10,PACA_EXGEN+EX_DSISR(r13)
904 EXCEPTION_PROLOG_COMMON(0x300, PACA_EXGEN)
907 ld r3,PACA_EXGEN+EX_DAR(r13)
908 lwz r4,PACA_EXGEN+EX_DSISR(r13)
910 b .do_hash_page /* Try to handle as hpte fault */
913 .globl h_data_storage_common
914 h_data_storage_common:
916 std r10,PACA_EXGEN+EX_DAR(r13)
917 mfspr r10,SPRN_HDSISR
918 stw r10,PACA_EXGEN+EX_DSISR(r13)
919 EXCEPTION_PROLOG_COMMON(0xe00, PACA_EXGEN)
922 addi r3,r1,STACK_FRAME_OVERHEAD
923 bl .unknown_exception
927 .globl instruction_access_common
928 instruction_access_common:
929 EXCEPTION_PROLOG_COMMON(0x400, PACA_EXGEN)
935 b .do_hash_page /* Try to handle as hpte fault */
937 STD_EXCEPTION_COMMON(0xe20, h_instr_storage, .unknown_exception)
940 * Here is the common SLB miss user that is used when going to virtual
941 * mode for SLB misses, that is currently not used
945 .globl slb_miss_user_common
946 slb_miss_user_common:
948 std r3,PACA_EXGEN+EX_DAR(r13)
949 stw r9,PACA_EXGEN+EX_CCR(r13)
950 std r10,PACA_EXGEN+EX_LR(r13)
951 std r11,PACA_EXGEN+EX_SRR0(r13)
952 bl .slb_allocate_user
954 ld r10,PACA_EXGEN+EX_LR(r13)
955 ld r3,PACA_EXGEN+EX_R3(r13)
956 lwz r9,PACA_EXGEN+EX_CCR(r13)
957 ld r11,PACA_EXGEN+EX_SRR0(r13)
961 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
962 beq- unrecov_user_slb
970 clrrdi r10,r10,2 /* clear RI before setting SRR0/1 */
976 ld r9,PACA_EXGEN+EX_R9(r13)
977 ld r10,PACA_EXGEN+EX_R10(r13)
978 ld r11,PACA_EXGEN+EX_R11(r13)
979 ld r12,PACA_EXGEN+EX_R12(r13)
980 ld r13,PACA_EXGEN+EX_R13(r13)
985 EXCEPTION_PROLOG_COMMON(0x380, PACA_EXGEN)
986 ld r4,PACA_EXGEN+EX_DAR(r13)
993 EXCEPTION_PROLOG_COMMON(0x4200, PACA_EXGEN)
996 1: addi r3,r1,STACK_FRAME_OVERHEAD
997 bl .unrecoverable_exception
1000 #endif /* __DISABLED__ */
1004 * r13 points to the PACA, r9 contains the saved CR,
1005 * r12 contain the saved SRR1, SRR0 is still ready for return
1006 * r3 has the faulting address
1007 * r9 - r13 are saved in paca->exslb.
1008 * r3 is saved in paca->slb_r3
1009 * We assume we aren't going to take any exceptions during this procedure.
1011 _GLOBAL(slb_miss_realmode)
1013 #ifdef CONFIG_RELOCATABLE
1017 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1018 std r10,PACA_EXSLB+EX_LR(r13) /* save LR */
1020 bl .slb_allocate_realmode
1022 /* All done -- return from exception. */
1024 ld r10,PACA_EXSLB+EX_LR(r13)
1025 ld r3,PACA_EXSLB+EX_R3(r13)
1026 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1030 andi. r10,r12,MSR_RI /* check for unrecoverable exception */
1036 mtcrf 0x01,r9 /* slb_allocate uses cr0 and cr7 */
1039 ld r9,PACA_EXSLB+EX_R9(r13)
1040 ld r10,PACA_EXSLB+EX_R10(r13)
1041 ld r11,PACA_EXSLB+EX_R11(r13)
1042 ld r12,PACA_EXSLB+EX_R12(r13)
1043 ld r13,PACA_EXSLB+EX_R13(r13)
1045 b . /* prevent speculative execution */
1047 2: mfspr r11,SPRN_SRR0
1048 ld r10,PACAKBASE(r13)
1049 LOAD_HANDLER(r10,unrecov_slb)
1051 ld r10,PACAKMSR(r13)
1057 EXCEPTION_PROLOG_COMMON(0x4100, PACA_EXSLB)
1060 1: addi r3,r1,STACK_FRAME_OVERHEAD
1061 bl .unrecoverable_exception
1065 #ifdef CONFIG_PPC_970_NAP
1068 std r9,TI_LOCAL_FLAGS(r11)
1069 ld r10,_LINK(r1) /* make idle task do the */
1070 std r10,_NIP(r1) /* equivalent of a blr */
1075 .globl alignment_common
1078 std r10,PACA_EXGEN+EX_DAR(r13)
1079 mfspr r10,SPRN_DSISR
1080 stw r10,PACA_EXGEN+EX_DSISR(r13)
1081 EXCEPTION_PROLOG_COMMON(0x600, PACA_EXGEN)
1082 ld r3,PACA_EXGEN+EX_DAR(r13)
1083 lwz r4,PACA_EXGEN+EX_DSISR(r13)
1088 addi r3,r1,STACK_FRAME_OVERHEAD
1089 bl .alignment_exception
1093 .globl program_check_common
1094 program_check_common:
1095 EXCEPTION_PROLOG_COMMON(0x700, PACA_EXGEN)
1098 addi r3,r1,STACK_FRAME_OVERHEAD
1099 bl .program_check_exception
1103 .globl fp_unavailable_common
1104 fp_unavailable_common:
1105 EXCEPTION_PROLOG_COMMON(0x800, PACA_EXGEN)
1106 bne 1f /* if from user, just load it up */
1109 addi r3,r1,STACK_FRAME_OVERHEAD
1110 bl .kernel_fp_unavailable_exception
1113 b fast_exception_return
1116 .globl altivec_unavailable_common
1117 altivec_unavailable_common:
1118 EXCEPTION_PROLOG_COMMON(0xf20, PACA_EXGEN)
1119 #ifdef CONFIG_ALTIVEC
1123 b fast_exception_return
1125 END_FTR_SECTION_IFSET(CPU_FTR_ALTIVEC)
1129 addi r3,r1,STACK_FRAME_OVERHEAD
1130 bl .altivec_unavailable_exception
1134 .globl vsx_unavailable_common
1135 vsx_unavailable_common:
1136 EXCEPTION_PROLOG_COMMON(0xf40, PACA_EXGEN)
1142 END_FTR_SECTION_IFSET(CPU_FTR_VSX)
1146 addi r3,r1,STACK_FRAME_OVERHEAD
1147 bl .vsx_unavailable_exception
1151 .globl __end_handlers
1158 _STATIC(do_hash_page)
1162 andis. r0,r4,0xa410 /* weird error? */
1163 bne- handle_page_fault /* if not, try to insert a HPTE */
1164 andis. r0,r4,DSISR_DABRMATCH@h
1165 bne- handle_dabr_fault
1168 andis. r0,r4,0x0020 /* Is it a segment table fault? */
1169 bne- do_ste_alloc /* If so handle it */
1170 END_MMU_FTR_SECTION_IFCLR(MMU_FTR_SLB)
1172 CURRENT_THREAD_INFO(r11, r1)
1173 lwz r0,TI_PREEMPT(r11) /* If we're in an "NMI" */
1174 andis. r0,r0,NMI_MASK@h /* (i.e. an irq when soft-disabled) */
1175 bne 77f /* then don't call hash_page now */
1177 * We need to set the _PAGE_USER bit if MSR_PR is set or if we are
1178 * accessing a userspace segment (even from the kernel). We assume
1179 * kernel addresses always have the high bit set.
1181 rlwinm r4,r4,32-25+9,31-9,31-9 /* DSISR_STORE -> _PAGE_RW */
1182 rotldi r0,r3,15 /* Move high bit into MSR_PR posn */
1183 orc r0,r12,r0 /* MSR_PR | ~high_bit */
1184 rlwimi r4,r0,32-13,30,30 /* becomes _PAGE_USER access bit */
1185 ori r4,r4,1 /* add _PAGE_PRESENT */
1186 rlwimi r4,r5,22+2,31-2,31-2 /* Set _PAGE_EXEC if trap is 0x400 */
1189 * r3 contains the faulting address
1190 * r4 contains the required access permissions
1191 * r5 contains the trap number
1193 * at return r3 = 0 for success, 1 for page fault, negative for error
1195 bl .hash_page /* build HPTE if possible */
1196 cmpdi r3,0 /* see if hash_page succeeded */
1199 beq fast_exc_return_irq /* Return from exception on success */
1204 /* Here we have a page fault that hash_page can't handle. */
1208 addi r3,r1,STACK_FRAME_OVERHEAD
1214 addi r3,r1,STACK_FRAME_OVERHEAD
1219 /* We have a data breakpoint exception - handle it */
1224 addi r3,r1,STACK_FRAME_OVERHEAD
1226 12: b .ret_from_except_lite
1229 /* We have a page fault that hash_page could handle but HV refused
1234 addi r3,r1,STACK_FRAME_OVERHEAD
1240 * We come here as a result of a DSI at a point where we don't want
1241 * to call hash_page, such as when we are accessing memory (possibly
1242 * user memory) inside a PMU interrupt that occurred while interrupts
1243 * were soft-disabled. We want to invoke the exception handler for
1244 * the access, or panic if there isn't a handler.
1248 addi r3,r1,STACK_FRAME_OVERHEAD
1253 /* here we have a segment miss */
1255 bl .ste_allocate /* try to insert stab entry */
1257 bne- handle_page_fault
1258 b fast_exception_return
1261 * r13 points to the PACA, r9 contains the saved CR,
1262 * r11 and r12 contain the saved SRR0 and SRR1.
1263 * r9 - r13 are saved in paca->exslb.
1264 * We assume we aren't going to take any exceptions during this procedure.
1265 * We assume (DAR >> 60) == 0xc.
1268 _GLOBAL(do_stab_bolted)
1269 stw r9,PACA_EXSLB+EX_CCR(r13) /* save CR in exc. frame */
1270 std r11,PACA_EXSLB+EX_SRR0(r13) /* save SRR0 in exc. frame */
1272 /* Hash to the primary group */
1273 ld r10,PACASTABVIRT(r13)
1276 rldimi r10,r11,7,52 /* r10 = first ste of the group */
1278 /* Calculate VSID */
1279 /* This is a kernel address, so protovsid = ESID | 1 << 37 */
1281 rldimi r11,r9,(CONTEXT_BITS + USER_ESID_BITS),0
1282 ASM_VSID_SCRAMBLE(r11, r9, 256M)
1283 rldic r9,r11,12,16 /* r9 = vsid << 12 */
1285 /* Search the primary group for a free entry */
1286 1: ld r11,0(r10) /* Test valid bit of the current ste */
1293 /* Stick for only searching the primary group for now. */
1294 /* At least for now, we use a very simple random castout scheme */
1295 /* Use the TB as a random number ; OR in 1 to avoid entry 0 */
1297 rldic r11,r11,4,57 /* r11 = (r11 << 4) & 0x70 */
1300 /* r10 currently points to an ste one past the group of interest */
1301 /* make it point to the randomly selected entry */
1303 or r10,r10,r11 /* r10 is the entry to invalidate */
1305 isync /* mark the entry invalid */
1307 rldicl r11,r11,56,1 /* clear the valid bit */
1312 clrrdi r11,r11,28 /* Get the esid part of the ste */
1315 2: std r9,8(r10) /* Store the vsid part of the ste */
1318 mfspr r11,SPRN_DAR /* Get the new esid */
1319 clrrdi r11,r11,28 /* Permits a full 32b of ESID */
1320 ori r11,r11,0x90 /* Turn on valid and kp */
1321 std r11,0(r10) /* Put new entry back into the stab */
1325 /* All done -- return from exception. */
1326 lwz r9,PACA_EXSLB+EX_CCR(r13) /* get saved CR */
1327 ld r11,PACA_EXSLB+EX_SRR0(r13) /* get saved SRR0 */
1329 andi. r10,r12,MSR_RI
1332 mtcrf 0x80,r9 /* restore CR */
1340 ld r9,PACA_EXSLB+EX_R9(r13)
1341 ld r10,PACA_EXSLB+EX_R10(r13)
1342 ld r11,PACA_EXSLB+EX_R11(r13)
1343 ld r12,PACA_EXSLB+EX_R12(r13)
1344 ld r13,PACA_EXSLB+EX_R13(r13)
1346 b . /* prevent speculative execution */
1349 /* Equivalents to the above handlers for relocation-on interrupt vectors */
1350 STD_RELON_EXCEPTION_HV(., 0xe00, h_data_storage)
1351 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe00)
1352 STD_RELON_EXCEPTION_HV(., 0xe20, h_instr_storage)
1353 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe20)
1354 STD_RELON_EXCEPTION_HV(., 0xe40, emulation_assist)
1355 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe40)
1356 STD_RELON_EXCEPTION_HV(., 0xe60, hmi_exception)
1357 KVM_HANDLER(PACA_EXGEN, EXC_HV, 0xe60)
1359 STD_RELON_EXCEPTION_PSERIES(., 0xf00, performance_monitor)
1360 STD_RELON_EXCEPTION_PSERIES(., 0xf20, altivec_unavailable)
1361 STD_RELON_EXCEPTION_PSERIES(., 0xf40, vsx_unavailable)
1363 #if defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV)
1365 * Data area reserved for FWNMI option.
1366 * This address (0x7000) is fixed by the RPA.
1369 .globl fwnmi_data_area
1372 /* pseries and powernv need to keep the whole page from
1373 * 0x7000 to 0x8000 free for use by the firmware
1376 #endif /* defined(CONFIG_PPC_PSERIES) || defined(CONFIG_PPC_POWERNV) */
1378 /* Space for CPU0's segment table */
1384 #ifdef CONFIG_PPC_POWERNV
1385 _GLOBAL(opal_mc_secondary_handler)
1391 std r3,PACA_OPAL_MC_EVT(r13)
1392 ld r13,OPAL_MC_SRR0(r3)
1394 ld r13,OPAL_MC_SRR1(r3)
1396 ld r3,OPAL_MC_GPR3(r3)
1398 b machine_check_pSeries
1399 #endif /* CONFIG_PPC_POWERNV */