1 #include <linux/device.h>
4 #include <linux/percpu.h>
5 #include <linux/init.h>
6 #include <linux/sched.h>
7 #include <linux/export.h>
8 #include <linux/nodemask.h>
9 #include <linux/cpumask.h>
10 #include <linux/notifier.h>
12 #include <asm/current.h>
13 #include <asm/processor.h>
14 #include <asm/cputable.h>
15 #include <asm/hvcall.h>
17 #include <asm/machdep.h>
20 #include <asm/system.h>
22 #include "cacheinfo.h"
26 #include <asm/lppaca.h>
29 static DEFINE_PER_CPU(struct cpu, cpu_devices);
32 * SMT snooze delay stuff, 64-bit only for now
37 /* Time in microseconds we delay before sleeping in the idle loop */
38 DEFINE_PER_CPU(long, smt_snooze_delay) = { 100 };
40 static ssize_t store_smt_snooze_delay(struct device *dev,
41 struct device_attribute *attr,
45 struct cpu *cpu = container_of(dev, struct cpu, dev);
49 ret = sscanf(buf, "%ld", &snooze);
53 per_cpu(smt_snooze_delay, cpu->dev.id) = snooze;
54 update_smt_snooze_delay(snooze);
59 static ssize_t show_smt_snooze_delay(struct device *dev,
60 struct device_attribute *attr,
63 struct cpu *cpu = container_of(dev, struct cpu, dev);
65 return sprintf(buf, "%ld\n", per_cpu(smt_snooze_delay, cpu->dev.id));
68 static DEVICE_ATTR(smt_snooze_delay, 0644, show_smt_snooze_delay,
69 store_smt_snooze_delay);
71 static int __init setup_smt_snooze_delay(char *str)
76 if (!cpu_has_feature(CPU_FTR_SMT))
79 snooze = simple_strtol(str, NULL, 10);
80 for_each_possible_cpu(cpu)
81 per_cpu(smt_snooze_delay, cpu) = snooze;
85 __setup("smt-snooze-delay=", setup_smt_snooze_delay);
87 #endif /* CONFIG_PPC64 */
90 * Enabling PMCs will slow partition context switch times so we only do
91 * it the first time we write to the PMCs.
94 static DEFINE_PER_CPU(char, pmcs_enabled);
96 void ppc_enable_pmcs(void)
100 /* Only need to enable them once */
101 if (__get_cpu_var(pmcs_enabled))
104 __get_cpu_var(pmcs_enabled) = 1;
106 if (ppc_md.enable_pmcs)
107 ppc_md.enable_pmcs();
109 EXPORT_SYMBOL(ppc_enable_pmcs);
111 #define SYSFS_PMCSETUP(NAME, ADDRESS) \
112 static void read_##NAME(void *val) \
114 *(unsigned long *)val = mfspr(ADDRESS); \
116 static void write_##NAME(void *val) \
119 mtspr(ADDRESS, *(unsigned long *)val); \
121 static ssize_t show_##NAME(struct device *dev, \
122 struct device_attribute *attr, \
125 struct cpu *cpu = container_of(dev, struct cpu, dev); \
127 smp_call_function_single(cpu->dev.id, read_##NAME, &val, 1); \
128 return sprintf(buf, "%lx\n", val); \
130 static ssize_t __used \
131 store_##NAME(struct device *dev, struct device_attribute *attr, \
132 const char *buf, size_t count) \
134 struct cpu *cpu = container_of(dev, struct cpu, dev); \
136 int ret = sscanf(buf, "%lx", &val); \
139 smp_call_function_single(cpu->dev.id, write_##NAME, &val, 1); \
144 /* Let's define all possible registers, we'll only hook up the ones
145 * that are implemented on the current processor
148 #if defined(CONFIG_PPC64)
149 #define HAS_PPC_PMC_CLASSIC 1
150 #define HAS_PPC_PMC_IBM 1
151 #define HAS_PPC_PMC_PA6T 1
152 #elif defined(CONFIG_6xx)
153 #define HAS_PPC_PMC_CLASSIC 1
154 #define HAS_PPC_PMC_IBM 1
155 #define HAS_PPC_PMC_G4 1
159 #ifdef HAS_PPC_PMC_CLASSIC
160 SYSFS_PMCSETUP(mmcr0, SPRN_MMCR0);
161 SYSFS_PMCSETUP(mmcr1, SPRN_MMCR1);
162 SYSFS_PMCSETUP(pmc1, SPRN_PMC1);
163 SYSFS_PMCSETUP(pmc2, SPRN_PMC2);
164 SYSFS_PMCSETUP(pmc3, SPRN_PMC3);
165 SYSFS_PMCSETUP(pmc4, SPRN_PMC4);
166 SYSFS_PMCSETUP(pmc5, SPRN_PMC5);
167 SYSFS_PMCSETUP(pmc6, SPRN_PMC6);
169 #ifdef HAS_PPC_PMC_G4
170 SYSFS_PMCSETUP(mmcr2, SPRN_MMCR2);
174 SYSFS_PMCSETUP(pmc7, SPRN_PMC7);
175 SYSFS_PMCSETUP(pmc8, SPRN_PMC8);
177 SYSFS_PMCSETUP(mmcra, SPRN_MMCRA);
178 SYSFS_PMCSETUP(purr, SPRN_PURR);
179 SYSFS_PMCSETUP(spurr, SPRN_SPURR);
180 SYSFS_PMCSETUP(dscr, SPRN_DSCR);
181 SYSFS_PMCSETUP(pir, SPRN_PIR);
183 static DEVICE_ATTR(mmcra, 0600, show_mmcra, store_mmcra);
184 static DEVICE_ATTR(spurr, 0600, show_spurr, NULL);
185 static DEVICE_ATTR(dscr, 0600, show_dscr, store_dscr);
186 static DEVICE_ATTR(purr, 0600, show_purr, store_purr);
187 static DEVICE_ATTR(pir, 0400, show_pir, NULL);
189 unsigned long dscr_default = 0;
190 EXPORT_SYMBOL(dscr_default);
192 static ssize_t show_dscr_default(struct device *dev,
193 struct device_attribute *attr, char *buf)
195 return sprintf(buf, "%lx\n", dscr_default);
198 static ssize_t __used store_dscr_default(struct device *dev,
199 struct device_attribute *attr, const char *buf,
205 ret = sscanf(buf, "%lx", &val);
213 static DEVICE_ATTR(dscr_default, 0600,
214 show_dscr_default, store_dscr_default);
216 static void sysfs_create_dscr_default(void)
219 if (cpu_has_feature(CPU_FTR_DSCR))
220 err = device_create_file(cpu_subsys.dev_root, &dev_attr_dscr_default);
222 #endif /* CONFIG_PPC64 */
224 #ifdef HAS_PPC_PMC_PA6T
225 SYSFS_PMCSETUP(pa6t_pmc0, SPRN_PA6T_PMC0);
226 SYSFS_PMCSETUP(pa6t_pmc1, SPRN_PA6T_PMC1);
227 SYSFS_PMCSETUP(pa6t_pmc2, SPRN_PA6T_PMC2);
228 SYSFS_PMCSETUP(pa6t_pmc3, SPRN_PA6T_PMC3);
229 SYSFS_PMCSETUP(pa6t_pmc4, SPRN_PA6T_PMC4);
230 SYSFS_PMCSETUP(pa6t_pmc5, SPRN_PA6T_PMC5);
231 #ifdef CONFIG_DEBUG_KERNEL
232 SYSFS_PMCSETUP(hid0, SPRN_HID0);
233 SYSFS_PMCSETUP(hid1, SPRN_HID1);
234 SYSFS_PMCSETUP(hid4, SPRN_HID4);
235 SYSFS_PMCSETUP(hid5, SPRN_HID5);
236 SYSFS_PMCSETUP(ima0, SPRN_PA6T_IMA0);
237 SYSFS_PMCSETUP(ima1, SPRN_PA6T_IMA1);
238 SYSFS_PMCSETUP(ima2, SPRN_PA6T_IMA2);
239 SYSFS_PMCSETUP(ima3, SPRN_PA6T_IMA3);
240 SYSFS_PMCSETUP(ima4, SPRN_PA6T_IMA4);
241 SYSFS_PMCSETUP(ima5, SPRN_PA6T_IMA5);
242 SYSFS_PMCSETUP(ima6, SPRN_PA6T_IMA6);
243 SYSFS_PMCSETUP(ima7, SPRN_PA6T_IMA7);
244 SYSFS_PMCSETUP(ima8, SPRN_PA6T_IMA8);
245 SYSFS_PMCSETUP(ima9, SPRN_PA6T_IMA9);
246 SYSFS_PMCSETUP(imaat, SPRN_PA6T_IMAAT);
247 SYSFS_PMCSETUP(btcr, SPRN_PA6T_BTCR);
248 SYSFS_PMCSETUP(pccr, SPRN_PA6T_PCCR);
249 SYSFS_PMCSETUP(rpccr, SPRN_PA6T_RPCCR);
250 SYSFS_PMCSETUP(der, SPRN_PA6T_DER);
251 SYSFS_PMCSETUP(mer, SPRN_PA6T_MER);
252 SYSFS_PMCSETUP(ber, SPRN_PA6T_BER);
253 SYSFS_PMCSETUP(ier, SPRN_PA6T_IER);
254 SYSFS_PMCSETUP(sier, SPRN_PA6T_SIER);
255 SYSFS_PMCSETUP(siar, SPRN_PA6T_SIAR);
256 SYSFS_PMCSETUP(tsr0, SPRN_PA6T_TSR0);
257 SYSFS_PMCSETUP(tsr1, SPRN_PA6T_TSR1);
258 SYSFS_PMCSETUP(tsr2, SPRN_PA6T_TSR2);
259 SYSFS_PMCSETUP(tsr3, SPRN_PA6T_TSR3);
260 #endif /* CONFIG_DEBUG_KERNEL */
261 #endif /* HAS_PPC_PMC_PA6T */
263 #ifdef HAS_PPC_PMC_IBM
264 static struct device_attribute ibm_common_attrs[] = {
265 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
266 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
268 #endif /* HAS_PPC_PMC_G4 */
270 #ifdef HAS_PPC_PMC_G4
271 static struct device_attribute g4_common_attrs[] = {
272 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
273 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
274 __ATTR(mmcr2, 0600, show_mmcr2, store_mmcr2),
276 #endif /* HAS_PPC_PMC_G4 */
278 static struct device_attribute classic_pmc_attrs[] = {
279 __ATTR(pmc1, 0600, show_pmc1, store_pmc1),
280 __ATTR(pmc2, 0600, show_pmc2, store_pmc2),
281 __ATTR(pmc3, 0600, show_pmc3, store_pmc3),
282 __ATTR(pmc4, 0600, show_pmc4, store_pmc4),
283 __ATTR(pmc5, 0600, show_pmc5, store_pmc5),
284 __ATTR(pmc6, 0600, show_pmc6, store_pmc6),
286 __ATTR(pmc7, 0600, show_pmc7, store_pmc7),
287 __ATTR(pmc8, 0600, show_pmc8, store_pmc8),
291 #ifdef HAS_PPC_PMC_PA6T
292 static struct device_attribute pa6t_attrs[] = {
293 __ATTR(mmcr0, 0600, show_mmcr0, store_mmcr0),
294 __ATTR(mmcr1, 0600, show_mmcr1, store_mmcr1),
295 __ATTR(pmc0, 0600, show_pa6t_pmc0, store_pa6t_pmc0),
296 __ATTR(pmc1, 0600, show_pa6t_pmc1, store_pa6t_pmc1),
297 __ATTR(pmc2, 0600, show_pa6t_pmc2, store_pa6t_pmc2),
298 __ATTR(pmc3, 0600, show_pa6t_pmc3, store_pa6t_pmc3),
299 __ATTR(pmc4, 0600, show_pa6t_pmc4, store_pa6t_pmc4),
300 __ATTR(pmc5, 0600, show_pa6t_pmc5, store_pa6t_pmc5),
301 #ifdef CONFIG_DEBUG_KERNEL
302 __ATTR(hid0, 0600, show_hid0, store_hid0),
303 __ATTR(hid1, 0600, show_hid1, store_hid1),
304 __ATTR(hid4, 0600, show_hid4, store_hid4),
305 __ATTR(hid5, 0600, show_hid5, store_hid5),
306 __ATTR(ima0, 0600, show_ima0, store_ima0),
307 __ATTR(ima1, 0600, show_ima1, store_ima1),
308 __ATTR(ima2, 0600, show_ima2, store_ima2),
309 __ATTR(ima3, 0600, show_ima3, store_ima3),
310 __ATTR(ima4, 0600, show_ima4, store_ima4),
311 __ATTR(ima5, 0600, show_ima5, store_ima5),
312 __ATTR(ima6, 0600, show_ima6, store_ima6),
313 __ATTR(ima7, 0600, show_ima7, store_ima7),
314 __ATTR(ima8, 0600, show_ima8, store_ima8),
315 __ATTR(ima9, 0600, show_ima9, store_ima9),
316 __ATTR(imaat, 0600, show_imaat, store_imaat),
317 __ATTR(btcr, 0600, show_btcr, store_btcr),
318 __ATTR(pccr, 0600, show_pccr, store_pccr),
319 __ATTR(rpccr, 0600, show_rpccr, store_rpccr),
320 __ATTR(der, 0600, show_der, store_der),
321 __ATTR(mer, 0600, show_mer, store_mer),
322 __ATTR(ber, 0600, show_ber, store_ber),
323 __ATTR(ier, 0600, show_ier, store_ier),
324 __ATTR(sier, 0600, show_sier, store_sier),
325 __ATTR(siar, 0600, show_siar, store_siar),
326 __ATTR(tsr0, 0600, show_tsr0, store_tsr0),
327 __ATTR(tsr1, 0600, show_tsr1, store_tsr1),
328 __ATTR(tsr2, 0600, show_tsr2, store_tsr2),
329 __ATTR(tsr3, 0600, show_tsr3, store_tsr3),
330 #endif /* CONFIG_DEBUG_KERNEL */
332 #endif /* HAS_PPC_PMC_PA6T */
333 #endif /* HAS_PPC_PMC_CLASSIC */
335 static void __cpuinit register_cpu_online(unsigned int cpu)
337 struct cpu *c = &per_cpu(cpu_devices, cpu);
338 struct device *s = &c->dev;
339 struct device_attribute *attrs, *pmc_attrs;
343 if (cpu_has_feature(CPU_FTR_SMT))
344 device_create_file(s, &dev_attr_smt_snooze_delay);
348 switch (cur_cpu_spec->pmc_type) {
349 #ifdef HAS_PPC_PMC_IBM
351 attrs = ibm_common_attrs;
352 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
353 pmc_attrs = classic_pmc_attrs;
355 #endif /* HAS_PPC_PMC_IBM */
356 #ifdef HAS_PPC_PMC_G4
358 attrs = g4_common_attrs;
359 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
360 pmc_attrs = classic_pmc_attrs;
362 #endif /* HAS_PPC_PMC_G4 */
363 #ifdef HAS_PPC_PMC_PA6T
365 /* PA Semi starts counting at PMC0 */
367 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
370 #endif /* HAS_PPC_PMC_PA6T */
377 for (i = 0; i < nattrs; i++)
378 device_create_file(s, &attrs[i]);
381 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
382 device_create_file(s, &pmc_attrs[i]);
385 if (cpu_has_feature(CPU_FTR_MMCRA))
386 device_create_file(s, &dev_attr_mmcra);
388 if (cpu_has_feature(CPU_FTR_PURR))
389 device_create_file(s, &dev_attr_purr);
391 if (cpu_has_feature(CPU_FTR_SPURR))
392 device_create_file(s, &dev_attr_spurr);
394 if (cpu_has_feature(CPU_FTR_DSCR))
395 device_create_file(s, &dev_attr_dscr);
397 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
398 device_create_file(s, &dev_attr_pir);
399 #endif /* CONFIG_PPC64 */
401 cacheinfo_cpu_online(cpu);
404 #ifdef CONFIG_HOTPLUG_CPU
405 static void unregister_cpu_online(unsigned int cpu)
407 struct cpu *c = &per_cpu(cpu_devices, cpu);
408 struct device *s = &c->dev;
409 struct device_attribute *attrs, *pmc_attrs;
412 BUG_ON(!c->hotpluggable);
415 if (cpu_has_feature(CPU_FTR_SMT))
416 device_remove_file(s, &dev_attr_smt_snooze_delay);
420 switch (cur_cpu_spec->pmc_type) {
421 #ifdef HAS_PPC_PMC_IBM
423 attrs = ibm_common_attrs;
424 nattrs = sizeof(ibm_common_attrs) / sizeof(struct device_attribute);
425 pmc_attrs = classic_pmc_attrs;
427 #endif /* HAS_PPC_PMC_IBM */
428 #ifdef HAS_PPC_PMC_G4
430 attrs = g4_common_attrs;
431 nattrs = sizeof(g4_common_attrs) / sizeof(struct device_attribute);
432 pmc_attrs = classic_pmc_attrs;
434 #endif /* HAS_PPC_PMC_G4 */
435 #ifdef HAS_PPC_PMC_PA6T
437 /* PA Semi starts counting at PMC0 */
439 nattrs = sizeof(pa6t_attrs) / sizeof(struct device_attribute);
442 #endif /* HAS_PPC_PMC_PA6T */
449 for (i = 0; i < nattrs; i++)
450 device_remove_file(s, &attrs[i]);
453 for (i = 0; i < cur_cpu_spec->num_pmcs; i++)
454 device_remove_file(s, &pmc_attrs[i]);
457 if (cpu_has_feature(CPU_FTR_MMCRA))
458 device_remove_file(s, &dev_attr_mmcra);
460 if (cpu_has_feature(CPU_FTR_PURR))
461 device_remove_file(s, &dev_attr_purr);
463 if (cpu_has_feature(CPU_FTR_SPURR))
464 device_remove_file(s, &dev_attr_spurr);
466 if (cpu_has_feature(CPU_FTR_DSCR))
467 device_remove_file(s, &dev_attr_dscr);
469 if (cpu_has_feature(CPU_FTR_PPCAS_ARCH_V2))
470 device_remove_file(s, &dev_attr_pir);
471 #endif /* CONFIG_PPC64 */
473 cacheinfo_cpu_offline(cpu);
476 #ifdef CONFIG_ARCH_CPU_PROBE_RELEASE
477 ssize_t arch_cpu_probe(const char *buf, size_t count)
479 if (ppc_md.cpu_probe)
480 return ppc_md.cpu_probe(buf, count);
485 ssize_t arch_cpu_release(const char *buf, size_t count)
487 if (ppc_md.cpu_release)
488 return ppc_md.cpu_release(buf, count);
492 #endif /* CONFIG_ARCH_CPU_PROBE_RELEASE */
494 #endif /* CONFIG_HOTPLUG_CPU */
496 static int __cpuinit sysfs_cpu_notify(struct notifier_block *self,
497 unsigned long action, void *hcpu)
499 unsigned int cpu = (unsigned int)(long)hcpu;
503 case CPU_ONLINE_FROZEN:
504 register_cpu_online(cpu);
506 #ifdef CONFIG_HOTPLUG_CPU
508 case CPU_DEAD_FROZEN:
509 unregister_cpu_online(cpu);
516 static struct notifier_block __cpuinitdata sysfs_cpu_nb = {
517 .notifier_call = sysfs_cpu_notify,
520 static DEFINE_MUTEX(cpu_mutex);
522 int cpu_add_dev_attr(struct device_attribute *attr)
526 mutex_lock(&cpu_mutex);
528 for_each_possible_cpu(cpu) {
529 device_create_file(get_cpu_device(cpu), attr);
532 mutex_unlock(&cpu_mutex);
535 EXPORT_SYMBOL_GPL(cpu_add_dev_attr);
537 int cpu_add_dev_attr_group(struct attribute_group *attrs)
543 mutex_lock(&cpu_mutex);
545 for_each_possible_cpu(cpu) {
546 dev = get_cpu_device(cpu);
547 ret = sysfs_create_group(&dev->kobj, attrs);
551 mutex_unlock(&cpu_mutex);
554 EXPORT_SYMBOL_GPL(cpu_add_dev_attr_group);
557 void cpu_remove_dev_attr(struct device_attribute *attr)
561 mutex_lock(&cpu_mutex);
563 for_each_possible_cpu(cpu) {
564 device_remove_file(get_cpu_device(cpu), attr);
567 mutex_unlock(&cpu_mutex);
569 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr);
571 void cpu_remove_dev_attr_group(struct attribute_group *attrs)
576 mutex_lock(&cpu_mutex);
578 for_each_possible_cpu(cpu) {
579 dev = get_cpu_device(cpu);
580 sysfs_remove_group(&dev->kobj, attrs);
583 mutex_unlock(&cpu_mutex);
585 EXPORT_SYMBOL_GPL(cpu_remove_dev_attr_group);
591 static void register_nodes(void)
595 for (i = 0; i < MAX_NUMNODES; i++)
596 register_one_node(i);
599 int sysfs_add_device_to_node(struct device *dev, int nid)
601 struct node *node = &node_devices[nid];
602 return sysfs_create_link(&node->dev.kobj, &dev->kobj,
603 kobject_name(&dev->kobj));
605 EXPORT_SYMBOL_GPL(sysfs_add_device_to_node);
607 void sysfs_remove_device_from_node(struct device *dev, int nid)
609 struct node *node = &node_devices[nid];
610 sysfs_remove_link(&node->dev.kobj, kobject_name(&dev->kobj));
612 EXPORT_SYMBOL_GPL(sysfs_remove_device_from_node);
615 static void register_nodes(void)
622 /* Only valid if CPU is present. */
623 static ssize_t show_physical_id(struct device *dev,
624 struct device_attribute *attr, char *buf)
626 struct cpu *cpu = container_of(dev, struct cpu, dev);
628 return sprintf(buf, "%d\n", get_hard_smp_processor_id(cpu->dev.id));
630 static DEVICE_ATTR(physical_id, 0444, show_physical_id, NULL);
632 static int __init topology_init(void)
637 register_cpu_notifier(&sysfs_cpu_nb);
639 for_each_possible_cpu(cpu) {
640 struct cpu *c = &per_cpu(cpu_devices, cpu);
643 * For now, we just see if the system supports making
644 * the RTAS calls for CPU hotplug. But, there may be a
645 * more comprehensive way to do this for an individual
646 * CPU. For instance, the boot cpu might never be valid
652 if (cpu_online(cpu) || c->hotpluggable) {
653 register_cpu(c, cpu);
655 device_create_file(&c->dev, &dev_attr_physical_id);
659 register_cpu_online(cpu);
662 sysfs_create_dscr_default();
663 #endif /* CONFIG_PPC64 */
667 subsys_initcall(topology_init);