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KVM: PPC: BOOKE: Guest and hardware visible debug registers are same
[karo-tx-linux.git] / arch / powerpc / kvm / booke_emulate.c
1 /*
2  * This program is free software; you can redistribute it and/or modify
3  * it under the terms of the GNU General Public License, version 2, as
4  * published by the Free Software Foundation.
5  *
6  * This program is distributed in the hope that it will be useful,
7  * but WITHOUT ANY WARRANTY; without even the implied warranty of
8  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
9  * GNU General Public License for more details.
10  *
11  * You should have received a copy of the GNU General Public License
12  * along with this program; if not, write to the Free Software
13  * Foundation, 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
14  *
15  * Copyright IBM Corp. 2008
16  * Copyright 2011 Freescale Semiconductor, Inc.
17  *
18  * Authors: Hollis Blanchard <hollisb@us.ibm.com>
19  */
20
21 #include <linux/kvm_host.h>
22 #include <asm/disassemble.h>
23
24 #include "booke.h"
25
26 #define OP_19_XOP_RFI     50
27 #define OP_19_XOP_RFCI    51
28 #define OP_19_XOP_RFDI    39
29
30 #define OP_31_XOP_MFMSR   83
31 #define OP_31_XOP_WRTEE   131
32 #define OP_31_XOP_MTMSR   146
33 #define OP_31_XOP_WRTEEI  163
34
35 static void kvmppc_emul_rfi(struct kvm_vcpu *vcpu)
36 {
37         vcpu->arch.pc = vcpu->arch.shared->srr0;
38         kvmppc_set_msr(vcpu, vcpu->arch.shared->srr1);
39 }
40
41 static void kvmppc_emul_rfdi(struct kvm_vcpu *vcpu)
42 {
43         vcpu->arch.pc = vcpu->arch.dsrr0;
44         kvmppc_set_msr(vcpu, vcpu->arch.dsrr1);
45 }
46
47 static void kvmppc_emul_rfci(struct kvm_vcpu *vcpu)
48 {
49         vcpu->arch.pc = vcpu->arch.csrr0;
50         kvmppc_set_msr(vcpu, vcpu->arch.csrr1);
51 }
52
53 int kvmppc_booke_emulate_op(struct kvm_run *run, struct kvm_vcpu *vcpu,
54                             unsigned int inst, int *advance)
55 {
56         int emulated = EMULATE_DONE;
57         int rs = get_rs(inst);
58         int rt = get_rt(inst);
59
60         switch (get_op(inst)) {
61         case 19:
62                 switch (get_xop(inst)) {
63                 case OP_19_XOP_RFI:
64                         kvmppc_emul_rfi(vcpu);
65                         kvmppc_set_exit_type(vcpu, EMULATED_RFI_EXITS);
66                         *advance = 0;
67                         break;
68
69                 case OP_19_XOP_RFCI:
70                         kvmppc_emul_rfci(vcpu);
71                         kvmppc_set_exit_type(vcpu, EMULATED_RFCI_EXITS);
72                         *advance = 0;
73                         break;
74
75                 case OP_19_XOP_RFDI:
76                         kvmppc_emul_rfdi(vcpu);
77                         kvmppc_set_exit_type(vcpu, EMULATED_RFDI_EXITS);
78                         *advance = 0;
79                         break;
80
81                 default:
82                         emulated = EMULATE_FAIL;
83                         break;
84                 }
85                 break;
86
87         case 31:
88                 switch (get_xop(inst)) {
89
90                 case OP_31_XOP_MFMSR:
91                         kvmppc_set_gpr(vcpu, rt, vcpu->arch.shared->msr);
92                         kvmppc_set_exit_type(vcpu, EMULATED_MFMSR_EXITS);
93                         break;
94
95                 case OP_31_XOP_MTMSR:
96                         kvmppc_set_exit_type(vcpu, EMULATED_MTMSR_EXITS);
97                         kvmppc_set_msr(vcpu, kvmppc_get_gpr(vcpu, rs));
98                         break;
99
100                 case OP_31_XOP_WRTEE:
101                         vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)
102                                         | (kvmppc_get_gpr(vcpu, rs) & MSR_EE);
103                         kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
104                         break;
105
106                 case OP_31_XOP_WRTEEI:
107                         vcpu->arch.shared->msr = (vcpu->arch.shared->msr & ~MSR_EE)
108                                                          | (inst & MSR_EE);
109                         kvmppc_set_exit_type(vcpu, EMULATED_WRTEE_EXITS);
110                         break;
111
112                 default:
113                         emulated = EMULATE_FAIL;
114                 }
115
116                 break;
117
118         default:
119                 emulated = EMULATE_FAIL;
120         }
121
122         return emulated;
123 }
124
125 /*
126  * NOTE: some of these registers are not emulated on BOOKE_HV (GS-mode).
127  * Their backing store is in real registers, and these functions
128  * will return the wrong result if called for them in another context
129  * (such as debugging).
130  */
131 int kvmppc_booke_emulate_mtspr(struct kvm_vcpu *vcpu, int sprn, ulong spr_val)
132 {
133         int emulated = EMULATE_DONE;
134
135         switch (sprn) {
136         case SPRN_DEAR:
137                 vcpu->arch.shared->dar = spr_val;
138                 break;
139         case SPRN_ESR:
140                 vcpu->arch.shared->esr = spr_val;
141                 break;
142         case SPRN_CSRR0:
143                 vcpu->arch.csrr0 = spr_val;
144                 break;
145         case SPRN_CSRR1:
146                 vcpu->arch.csrr1 = spr_val;
147                 break;
148         case SPRN_DBCR0:
149                 vcpu->arch.dbg_reg.dbcr0 = spr_val;
150                 break;
151         case SPRN_DBCR1:
152                 vcpu->arch.dbg_reg.dbcr1 = spr_val;
153                 break;
154         case SPRN_DBSR:
155                 vcpu->arch.dbsr &= ~spr_val;
156                 break;
157         case SPRN_TSR:
158                 kvmppc_clr_tsr_bits(vcpu, spr_val);
159                 break;
160         case SPRN_TCR:
161                 /*
162                  * WRC is a 2-bit field that is supposed to preserve its
163                  * value once written to non-zero.
164                  */
165                 if (vcpu->arch.tcr & TCR_WRC_MASK) {
166                         spr_val &= ~TCR_WRC_MASK;
167                         spr_val |= vcpu->arch.tcr & TCR_WRC_MASK;
168                 }
169                 kvmppc_set_tcr(vcpu, spr_val);
170                 break;
171
172         case SPRN_DECAR:
173                 vcpu->arch.decar = spr_val;
174                 break;
175         /*
176          * Note: SPRG4-7 are user-readable.
177          * These values are loaded into the real SPRGs when resuming the
178          * guest (PR-mode only).
179          */
180         case SPRN_SPRG4:
181                 kvmppc_set_sprg4(vcpu, spr_val);
182                 break;
183         case SPRN_SPRG5:
184                 kvmppc_set_sprg5(vcpu, spr_val);
185                 break;
186         case SPRN_SPRG6:
187                 kvmppc_set_sprg6(vcpu, spr_val);
188                 break;
189         case SPRN_SPRG7:
190                 kvmppc_set_sprg7(vcpu, spr_val);
191                 break;
192
193         case SPRN_IVPR:
194                 vcpu->arch.ivpr = spr_val;
195 #ifdef CONFIG_KVM_BOOKE_HV
196                 mtspr(SPRN_GIVPR, spr_val);
197 #endif
198                 break;
199         case SPRN_IVOR0:
200                 vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL] = spr_val;
201                 break;
202         case SPRN_IVOR1:
203                 vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK] = spr_val;
204                 break;
205         case SPRN_IVOR2:
206                 vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE] = spr_val;
207 #ifdef CONFIG_KVM_BOOKE_HV
208                 mtspr(SPRN_GIVOR2, spr_val);
209 #endif
210                 break;
211         case SPRN_IVOR3:
212                 vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE] = spr_val;
213                 break;
214         case SPRN_IVOR4:
215                 vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL] = spr_val;
216                 break;
217         case SPRN_IVOR5:
218                 vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT] = spr_val;
219                 break;
220         case SPRN_IVOR6:
221                 vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM] = spr_val;
222                 break;
223         case SPRN_IVOR7:
224                 vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL] = spr_val;
225                 break;
226         case SPRN_IVOR8:
227                 vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL] = spr_val;
228 #ifdef CONFIG_KVM_BOOKE_HV
229                 mtspr(SPRN_GIVOR8, spr_val);
230 #endif
231                 break;
232         case SPRN_IVOR9:
233                 vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL] = spr_val;
234                 break;
235         case SPRN_IVOR10:
236                 vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER] = spr_val;
237                 break;
238         case SPRN_IVOR11:
239                 vcpu->arch.ivor[BOOKE_IRQPRIO_FIT] = spr_val;
240                 break;
241         case SPRN_IVOR12:
242                 vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG] = spr_val;
243                 break;
244         case SPRN_IVOR13:
245                 vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS] = spr_val;
246                 break;
247         case SPRN_IVOR14:
248                 vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS] = spr_val;
249                 break;
250         case SPRN_IVOR15:
251                 vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG] = spr_val;
252                 break;
253         case SPRN_MCSR:
254                 vcpu->arch.mcsr &= ~spr_val;
255                 break;
256 #if defined(CONFIG_64BIT)
257         case SPRN_EPCR:
258                 kvmppc_set_epcr(vcpu, spr_val);
259 #ifdef CONFIG_KVM_BOOKE_HV
260                 mtspr(SPRN_EPCR, vcpu->arch.shadow_epcr);
261 #endif
262                 break;
263 #endif
264         default:
265                 emulated = EMULATE_FAIL;
266         }
267
268         return emulated;
269 }
270
271 int kvmppc_booke_emulate_mfspr(struct kvm_vcpu *vcpu, int sprn, ulong *spr_val)
272 {
273         int emulated = EMULATE_DONE;
274
275         switch (sprn) {
276         case SPRN_IVPR:
277                 *spr_val = vcpu->arch.ivpr;
278                 break;
279         case SPRN_DEAR:
280                 *spr_val = vcpu->arch.shared->dar;
281                 break;
282         case SPRN_ESR:
283                 *spr_val = vcpu->arch.shared->esr;
284                 break;
285         case SPRN_EPR:
286                 *spr_val = vcpu->arch.epr;
287                 break;
288         case SPRN_CSRR0:
289                 *spr_val = vcpu->arch.csrr0;
290                 break;
291         case SPRN_CSRR1:
292                 *spr_val = vcpu->arch.csrr1;
293                 break;
294         case SPRN_DBCR0:
295                 *spr_val = vcpu->arch.dbg_reg.dbcr0;
296                 if (vcpu->guest_debug)
297                         *spr_val = *spr_val | DBCR0_EDM;
298                 break;
299         case SPRN_DBCR1:
300                 *spr_val = vcpu->arch.dbg_reg.dbcr1;
301                 break;
302         case SPRN_DBSR:
303                 *spr_val = vcpu->arch.dbsr;
304                 break;
305         case SPRN_TSR:
306                 *spr_val = vcpu->arch.tsr;
307                 break;
308         case SPRN_TCR:
309                 *spr_val = vcpu->arch.tcr;
310                 break;
311
312         case SPRN_IVOR0:
313                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_CRITICAL];
314                 break;
315         case SPRN_IVOR1:
316                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_MACHINE_CHECK];
317                 break;
318         case SPRN_IVOR2:
319                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DATA_STORAGE];
320                 break;
321         case SPRN_IVOR3:
322                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_INST_STORAGE];
323                 break;
324         case SPRN_IVOR4:
325                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_EXTERNAL];
326                 break;
327         case SPRN_IVOR5:
328                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ALIGNMENT];
329                 break;
330         case SPRN_IVOR6:
331                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_PROGRAM];
332                 break;
333         case SPRN_IVOR7:
334                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_FP_UNAVAIL];
335                 break;
336         case SPRN_IVOR8:
337                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_SYSCALL];
338                 break;
339         case SPRN_IVOR9:
340                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_AP_UNAVAIL];
341                 break;
342         case SPRN_IVOR10:
343                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DECREMENTER];
344                 break;
345         case SPRN_IVOR11:
346                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_FIT];
347                 break;
348         case SPRN_IVOR12:
349                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_WATCHDOG];
350                 break;
351         case SPRN_IVOR13:
352                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DTLB_MISS];
353                 break;
354         case SPRN_IVOR14:
355                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_ITLB_MISS];
356                 break;
357         case SPRN_IVOR15:
358                 *spr_val = vcpu->arch.ivor[BOOKE_IRQPRIO_DEBUG];
359                 break;
360         case SPRN_MCSR:
361                 *spr_val = vcpu->arch.mcsr;
362                 break;
363 #if defined(CONFIG_64BIT)
364         case SPRN_EPCR:
365                 *spr_val = vcpu->arch.epcr;
366                 break;
367 #endif
368
369         default:
370                 emulated = EMULATE_FAIL;
371         }
372
373         return emulated;
374 }