2 * Low-level SPU handling
4 * (C) Copyright IBM Deutschland Entwicklung GmbH 2005
6 * Author: Arnd Bergmann <arndb@de.ibm.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2, or (at your option)
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
25 #include <linux/interrupt.h>
26 #include <linux/list.h>
27 #include <linux/module.h>
28 #include <linux/ptrace.h>
29 #include <linux/slab.h>
30 #include <linux/wait.h>
33 #include <linux/mutex.h>
34 #include <linux/linux_logo.h>
35 #include <linux/syscore_ops.h>
37 #include <asm/spu_priv1.h>
38 #include <asm/spu_csa.h>
41 #include <asm/kexec.h>
43 const struct spu_management_ops *spu_management_ops;
44 EXPORT_SYMBOL_GPL(spu_management_ops);
46 const struct spu_priv1_ops *spu_priv1_ops;
47 EXPORT_SYMBOL_GPL(spu_priv1_ops);
49 struct cbe_spu_info cbe_spu_info[MAX_NUMNODES];
50 EXPORT_SYMBOL_GPL(cbe_spu_info);
53 * The spufs fault-handling code needs to call force_sig_info to raise signals
54 * on DMA errors. Export it here to avoid general kernel-wide access to this
57 EXPORT_SYMBOL_GPL(force_sig_info);
60 * Protects cbe_spu_info and spu->number.
62 static DEFINE_SPINLOCK(spu_lock);
65 * List of all spus in the system.
67 * This list is iterated by callers from irq context and callers that
68 * want to sleep. Thus modifications need to be done with both
69 * spu_full_list_lock and spu_full_list_mutex held, while iterating
70 * through it requires either of these locks.
72 * In addition spu_full_list_lock protects all assignmens to
75 static LIST_HEAD(spu_full_list);
76 static DEFINE_SPINLOCK(spu_full_list_lock);
77 static DEFINE_MUTEX(spu_full_list_mutex);
79 void spu_invalidate_slbs(struct spu *spu)
81 struct spu_priv2 __iomem *priv2 = spu->priv2;
84 spin_lock_irqsave(&spu->register_lock, flags);
85 if (spu_mfc_sr1_get(spu) & MFC_STATE1_RELOCATE_MASK)
86 out_be64(&priv2->slb_invalidate_all_W, 0UL);
87 spin_unlock_irqrestore(&spu->register_lock, flags);
89 EXPORT_SYMBOL_GPL(spu_invalidate_slbs);
91 /* This is called by the MM core when a segment size is changed, to
92 * request a flush of all the SPEs using a given mm
94 void spu_flush_all_slbs(struct mm_struct *mm)
99 spin_lock_irqsave(&spu_full_list_lock, flags);
100 list_for_each_entry(spu, &spu_full_list, full_list) {
102 spu_invalidate_slbs(spu);
104 spin_unlock_irqrestore(&spu_full_list_lock, flags);
107 /* The hack below stinks... try to do something better one of
108 * these days... Does it even work properly with NR_CPUS == 1 ?
110 static inline void mm_needs_global_tlbie(struct mm_struct *mm)
112 int nr = (NR_CPUS > 1) ? NR_CPUS : NR_CPUS + 1;
114 /* Global TLBIE broadcast required with SPEs. */
115 bitmap_fill(cpumask_bits(mm_cpumask(mm)), nr);
118 void spu_associate_mm(struct spu *spu, struct mm_struct *mm)
122 spin_lock_irqsave(&spu_full_list_lock, flags);
124 spin_unlock_irqrestore(&spu_full_list_lock, flags);
126 mm_needs_global_tlbie(mm);
128 EXPORT_SYMBOL_GPL(spu_associate_mm);
130 int spu_64k_pages_available(void)
132 return mmu_psize_defs[MMU_PAGE_64K].shift != 0;
134 EXPORT_SYMBOL_GPL(spu_64k_pages_available);
136 static void spu_restart_dma(struct spu *spu)
138 struct spu_priv2 __iomem *priv2 = spu->priv2;
140 if (!test_bit(SPU_CONTEXT_SWITCH_PENDING, &spu->flags))
141 out_be64(&priv2->mfc_control_RW, MFC_CNTL_RESTART_DMA_COMMAND);
143 set_bit(SPU_CONTEXT_FAULT_PENDING, &spu->flags);
148 static inline void spu_load_slb(struct spu *spu, int slbe, struct copro_slb *slb)
150 struct spu_priv2 __iomem *priv2 = spu->priv2;
152 pr_debug("%s: adding SLB[%d] 0x%016llx 0x%016llx\n",
153 __func__, slbe, slb->vsid, slb->esid);
155 out_be64(&priv2->slb_index_W, slbe);
156 /* set invalid before writing vsid */
157 out_be64(&priv2->slb_esid_RW, 0);
158 /* now it's safe to write the vsid */
159 out_be64(&priv2->slb_vsid_RW, slb->vsid);
160 /* setting the new esid makes the entry valid again */
161 out_be64(&priv2->slb_esid_RW, slb->esid);
164 static int __spu_trap_data_seg(struct spu *spu, unsigned long ea)
166 struct copro_slb slb;
169 ret = copro_calculate_slb(spu->mm, ea, &slb);
173 spu_load_slb(spu, spu->slb_replace, &slb);
176 if (spu->slb_replace >= 8)
177 spu->slb_replace = 0;
179 spu_restart_dma(spu);
180 spu->stats.slb_flt++;
184 extern int hash_page(unsigned long ea, unsigned long access, unsigned long trap); //XXX
185 static int __spu_trap_data_map(struct spu *spu, unsigned long ea, u64 dsisr)
189 pr_debug("%s, %llx, %lx\n", __func__, dsisr, ea);
192 * Handle kernel space hash faults immediately. User hash
193 * faults need to be deferred to process context.
195 if ((dsisr & MFC_DSISR_PTE_NOT_FOUND) &&
196 (REGION_ID(ea) != USER_REGION_ID)) {
198 spin_unlock(&spu->register_lock);
199 ret = hash_page(ea, _PAGE_PRESENT, 0x300);
200 spin_lock(&spu->register_lock);
203 spu_restart_dma(spu);
208 spu->class_1_dar = ea;
209 spu->class_1_dsisr = dsisr;
211 spu->stop_callback(spu, 1);
213 spu->class_1_dar = 0;
214 spu->class_1_dsisr = 0;
219 static void __spu_kernel_slb(void *addr, struct copro_slb *slb)
221 unsigned long ea = (unsigned long)addr;
224 if (REGION_ID(ea) == KERNEL_REGION_ID)
225 llp = mmu_psize_defs[mmu_linear_psize].sllp;
227 llp = mmu_psize_defs[mmu_virtual_psize].sllp;
229 slb->vsid = (get_kernel_vsid(ea, MMU_SEGSIZE_256M) << SLB_VSID_SHIFT) |
230 SLB_VSID_KERNEL | llp;
231 slb->esid = (ea & ESID_MASK) | SLB_ESID_V;
235 * Given an array of @nr_slbs SLB entries, @slbs, return non-zero if the
236 * address @new_addr is present.
238 static inline int __slb_present(struct copro_slb *slbs, int nr_slbs,
241 unsigned long ea = (unsigned long)new_addr;
244 for (i = 0; i < nr_slbs; i++)
245 if (!((slbs[i].esid ^ ea) & ESID_MASK))
252 * Setup the SPU kernel SLBs, in preparation for a context save/restore. We
253 * need to map both the context save area, and the save/restore code.
255 * Because the lscsa and code may cross segment boundaires, we check to see
256 * if mappings are required for the start and end of each range. We currently
257 * assume that the mappings are smaller that one segment - if not, something
258 * is seriously wrong.
260 void spu_setup_kernel_slbs(struct spu *spu, struct spu_lscsa *lscsa,
261 void *code, int code_size)
263 struct copro_slb slbs[4];
265 /* start and end addresses of both mappings */
267 lscsa, (void *)lscsa + sizeof(*lscsa) - 1,
268 code, code + code_size - 1
271 /* check the set of addresses, and create a new entry in the slbs array
272 * if there isn't already a SLB for that address */
273 for (i = 0; i < ARRAY_SIZE(addrs); i++) {
274 if (__slb_present(slbs, nr_slbs, addrs[i]))
277 __spu_kernel_slb(addrs[i], &slbs[nr_slbs]);
281 spin_lock_irq(&spu->register_lock);
282 /* Add the set of SLBs */
283 for (i = 0; i < nr_slbs; i++)
284 spu_load_slb(spu, i, &slbs[i]);
285 spin_unlock_irq(&spu->register_lock);
287 EXPORT_SYMBOL_GPL(spu_setup_kernel_slbs);
290 spu_irq_class_0(int irq, void *data)
293 unsigned long stat, mask;
297 spin_lock(&spu->register_lock);
298 mask = spu_int_mask_get(spu, 0);
299 stat = spu_int_stat_get(spu, 0) & mask;
301 spu->class_0_pending |= stat;
302 spu->class_0_dar = spu_mfc_dar_get(spu);
303 spu->stop_callback(spu, 0);
304 spu->class_0_pending = 0;
305 spu->class_0_dar = 0;
307 spu_int_stat_clear(spu, 0, stat);
308 spin_unlock(&spu->register_lock);
314 spu_irq_class_1(int irq, void *data)
317 unsigned long stat, mask, dar, dsisr;
321 /* atomically read & clear class1 status. */
322 spin_lock(&spu->register_lock);
323 mask = spu_int_mask_get(spu, 1);
324 stat = spu_int_stat_get(spu, 1) & mask;
325 dar = spu_mfc_dar_get(spu);
326 dsisr = spu_mfc_dsisr_get(spu);
327 if (stat & CLASS1_STORAGE_FAULT_INTR)
328 spu_mfc_dsisr_set(spu, 0ul);
329 spu_int_stat_clear(spu, 1, stat);
331 pr_debug("%s: %lx %lx %lx %lx\n", __func__, mask, stat,
334 if (stat & CLASS1_SEGMENT_FAULT_INTR)
335 __spu_trap_data_seg(spu, dar);
337 if (stat & CLASS1_STORAGE_FAULT_INTR)
338 __spu_trap_data_map(spu, dar, dsisr);
340 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_GET_INTR)
343 if (stat & CLASS1_LS_COMPARE_SUSPEND_ON_PUT_INTR)
346 spu->class_1_dsisr = 0;
347 spu->class_1_dar = 0;
349 spin_unlock(&spu->register_lock);
351 return stat ? IRQ_HANDLED : IRQ_NONE;
355 spu_irq_class_2(int irq, void *data)
360 const int mailbox_intrs =
361 CLASS2_MAILBOX_THRESHOLD_INTR | CLASS2_MAILBOX_INTR;
364 spin_lock(&spu->register_lock);
365 stat = spu_int_stat_get(spu, 2);
366 mask = spu_int_mask_get(spu, 2);
367 /* ignore interrupts we're not waiting for */
369 /* mailbox interrupts are level triggered. mask them now before
371 if (stat & mailbox_intrs)
372 spu_int_mask_and(spu, 2, ~(stat & mailbox_intrs));
373 /* acknowledge all interrupts before the callbacks */
374 spu_int_stat_clear(spu, 2, stat);
376 pr_debug("class 2 interrupt %d, %lx, %lx\n", irq, stat, mask);
378 if (stat & CLASS2_MAILBOX_INTR)
379 spu->ibox_callback(spu);
381 if (stat & CLASS2_SPU_STOP_INTR)
382 spu->stop_callback(spu, 2);
384 if (stat & CLASS2_SPU_HALT_INTR)
385 spu->stop_callback(spu, 2);
387 if (stat & CLASS2_SPU_DMA_TAG_GROUP_COMPLETE_INTR)
388 spu->mfc_callback(spu);
390 if (stat & CLASS2_MAILBOX_THRESHOLD_INTR)
391 spu->wbox_callback(spu);
393 spu->stats.class2_intr++;
395 spin_unlock(&spu->register_lock);
397 return stat ? IRQ_HANDLED : IRQ_NONE;
400 static int spu_request_irqs(struct spu *spu)
404 if (spu->irqs[0] != NO_IRQ) {
405 snprintf(spu->irq_c0, sizeof (spu->irq_c0), "spe%02d.0",
407 ret = request_irq(spu->irqs[0], spu_irq_class_0,
408 0, spu->irq_c0, spu);
412 if (spu->irqs[1] != NO_IRQ) {
413 snprintf(spu->irq_c1, sizeof (spu->irq_c1), "spe%02d.1",
415 ret = request_irq(spu->irqs[1], spu_irq_class_1,
416 0, spu->irq_c1, spu);
420 if (spu->irqs[2] != NO_IRQ) {
421 snprintf(spu->irq_c2, sizeof (spu->irq_c2), "spe%02d.2",
423 ret = request_irq(spu->irqs[2], spu_irq_class_2,
424 0, spu->irq_c2, spu);
431 if (spu->irqs[1] != NO_IRQ)
432 free_irq(spu->irqs[1], spu);
434 if (spu->irqs[0] != NO_IRQ)
435 free_irq(spu->irqs[0], spu);
440 static void spu_free_irqs(struct spu *spu)
442 if (spu->irqs[0] != NO_IRQ)
443 free_irq(spu->irqs[0], spu);
444 if (spu->irqs[1] != NO_IRQ)
445 free_irq(spu->irqs[1], spu);
446 if (spu->irqs[2] != NO_IRQ)
447 free_irq(spu->irqs[2], spu);
450 void spu_init_channels(struct spu *spu)
452 static const struct {
456 { 0x00, 1, }, { 0x01, 1, }, { 0x03, 1, }, { 0x04, 1, },
457 { 0x18, 1, }, { 0x19, 1, }, { 0x1b, 1, }, { 0x1d, 1, },
459 { 0x00, 0, }, { 0x03, 0, }, { 0x04, 0, }, { 0x15, 16, },
460 { 0x17, 1, }, { 0x18, 0, }, { 0x19, 0, }, { 0x1b, 0, },
461 { 0x1c, 1, }, { 0x1d, 0, }, { 0x1e, 1, },
463 struct spu_priv2 __iomem *priv2;
468 /* initialize all channel data to zero */
469 for (i = 0; i < ARRAY_SIZE(zero_list); i++) {
472 out_be64(&priv2->spu_chnlcntptr_RW, zero_list[i].channel);
473 for (count = 0; count < zero_list[i].count; count++)
474 out_be64(&priv2->spu_chnldata_RW, 0);
477 /* initialize channel counts to meaningful values */
478 for (i = 0; i < ARRAY_SIZE(count_list); i++) {
479 out_be64(&priv2->spu_chnlcntptr_RW, count_list[i].channel);
480 out_be64(&priv2->spu_chnlcnt_RW, count_list[i].count);
483 EXPORT_SYMBOL_GPL(spu_init_channels);
485 static struct bus_type spu_subsys = {
490 int spu_add_dev_attr(struct device_attribute *attr)
494 mutex_lock(&spu_full_list_mutex);
495 list_for_each_entry(spu, &spu_full_list, full_list)
496 device_create_file(&spu->dev, attr);
497 mutex_unlock(&spu_full_list_mutex);
501 EXPORT_SYMBOL_GPL(spu_add_dev_attr);
503 int spu_add_dev_attr_group(struct attribute_group *attrs)
508 mutex_lock(&spu_full_list_mutex);
509 list_for_each_entry(spu, &spu_full_list, full_list) {
510 rc = sysfs_create_group(&spu->dev.kobj, attrs);
512 /* we're in trouble here, but try unwinding anyway */
514 printk(KERN_ERR "%s: can't create sysfs group '%s'\n",
515 __func__, attrs->name);
517 list_for_each_entry_continue_reverse(spu,
518 &spu_full_list, full_list)
519 sysfs_remove_group(&spu->dev.kobj, attrs);
524 mutex_unlock(&spu_full_list_mutex);
528 EXPORT_SYMBOL_GPL(spu_add_dev_attr_group);
531 void spu_remove_dev_attr(struct device_attribute *attr)
535 mutex_lock(&spu_full_list_mutex);
536 list_for_each_entry(spu, &spu_full_list, full_list)
537 device_remove_file(&spu->dev, attr);
538 mutex_unlock(&spu_full_list_mutex);
540 EXPORT_SYMBOL_GPL(spu_remove_dev_attr);
542 void spu_remove_dev_attr_group(struct attribute_group *attrs)
546 mutex_lock(&spu_full_list_mutex);
547 list_for_each_entry(spu, &spu_full_list, full_list)
548 sysfs_remove_group(&spu->dev.kobj, attrs);
549 mutex_unlock(&spu_full_list_mutex);
551 EXPORT_SYMBOL_GPL(spu_remove_dev_attr_group);
553 static int spu_create_dev(struct spu *spu)
557 spu->dev.id = spu->number;
558 spu->dev.bus = &spu_subsys;
559 ret = device_register(&spu->dev);
561 printk(KERN_ERR "Can't register SPU %d with sysfs\n",
566 sysfs_add_device_to_node(&spu->dev, spu->node);
571 static int __init create_spu(void *data)
579 spu = kzalloc(sizeof (*spu), GFP_KERNEL);
583 spu->alloc_state = SPU_FREE;
585 spin_lock_init(&spu->register_lock);
586 spin_lock(&spu_lock);
587 spu->number = number++;
588 spin_unlock(&spu_lock);
590 ret = spu_create_spu(spu, data);
595 spu_mfc_sdr_setup(spu);
596 spu_mfc_sr1_set(spu, 0x33);
597 ret = spu_request_irqs(spu);
601 ret = spu_create_dev(spu);
605 mutex_lock(&cbe_spu_info[spu->node].list_mutex);
606 list_add(&spu->cbe_list, &cbe_spu_info[spu->node].spus);
607 cbe_spu_info[spu->node].n_spus++;
608 mutex_unlock(&cbe_spu_info[spu->node].list_mutex);
610 mutex_lock(&spu_full_list_mutex);
611 spin_lock_irqsave(&spu_full_list_lock, flags);
612 list_add(&spu->full_list, &spu_full_list);
613 spin_unlock_irqrestore(&spu_full_list_lock, flags);
614 mutex_unlock(&spu_full_list_mutex);
616 spu->stats.util_state = SPU_UTIL_IDLE_LOADED;
617 spu->stats.tstamp = ktime_get_ns();
619 INIT_LIST_HEAD(&spu->aff_list);
626 spu_destroy_spu(spu);
633 static const char *spu_state_names[] = {
634 "user", "system", "iowait", "idle"
637 static unsigned long long spu_acct_time(struct spu *spu,
638 enum spu_utilization_state state)
640 unsigned long long time = spu->stats.times[state];
643 * If the spu is idle or the context is stopped, utilization
644 * statistics are not updated. Apply the time delta from the
645 * last recorded state of the spu.
647 if (spu->stats.util_state == state)
648 time += ktime_get_ns() - spu->stats.tstamp;
650 return time / NSEC_PER_MSEC;
654 static ssize_t spu_stat_show(struct device *dev,
655 struct device_attribute *attr, char *buf)
657 struct spu *spu = container_of(dev, struct spu, dev);
659 return sprintf(buf, "%s %llu %llu %llu %llu "
660 "%llu %llu %llu %llu %llu %llu %llu %llu\n",
661 spu_state_names[spu->stats.util_state],
662 spu_acct_time(spu, SPU_UTIL_USER),
663 spu_acct_time(spu, SPU_UTIL_SYSTEM),
664 spu_acct_time(spu, SPU_UTIL_IOWAIT),
665 spu_acct_time(spu, SPU_UTIL_IDLE_LOADED),
666 spu->stats.vol_ctx_switch,
667 spu->stats.invol_ctx_switch,
672 spu->stats.class2_intr,
673 spu->stats.libassist);
676 static DEVICE_ATTR(stat, 0444, spu_stat_show, NULL);
680 struct crash_spu_info {
682 u32 saved_spu_runcntl_RW;
683 u32 saved_spu_status_R;
684 u32 saved_spu_npc_RW;
685 u64 saved_mfc_sr1_RW;
690 #define CRASH_NUM_SPUS 16 /* Enough for current hardware */
691 static struct crash_spu_info crash_spu_info[CRASH_NUM_SPUS];
693 static void crash_kexec_stop_spus(void)
699 for (i = 0; i < CRASH_NUM_SPUS; i++) {
700 if (!crash_spu_info[i].spu)
703 spu = crash_spu_info[i].spu;
705 crash_spu_info[i].saved_spu_runcntl_RW =
706 in_be32(&spu->problem->spu_runcntl_RW);
707 crash_spu_info[i].saved_spu_status_R =
708 in_be32(&spu->problem->spu_status_R);
709 crash_spu_info[i].saved_spu_npc_RW =
710 in_be32(&spu->problem->spu_npc_RW);
712 crash_spu_info[i].saved_mfc_dar = spu_mfc_dar_get(spu);
713 crash_spu_info[i].saved_mfc_dsisr = spu_mfc_dsisr_get(spu);
714 tmp = spu_mfc_sr1_get(spu);
715 crash_spu_info[i].saved_mfc_sr1_RW = tmp;
717 tmp &= ~MFC_STATE1_MASTER_RUN_CONTROL_MASK;
718 spu_mfc_sr1_set(spu, tmp);
724 static void crash_register_spus(struct list_head *list)
729 list_for_each_entry(spu, list, full_list) {
730 if (WARN_ON(spu->number >= CRASH_NUM_SPUS))
733 crash_spu_info[spu->number].spu = spu;
736 ret = crash_shutdown_register(&crash_kexec_stop_spus);
738 printk(KERN_ERR "Could not register SPU crash handler");
742 static inline void crash_register_spus(struct list_head *list)
747 static void spu_shutdown(void)
751 mutex_lock(&spu_full_list_mutex);
752 list_for_each_entry(spu, &spu_full_list, full_list) {
754 spu_destroy_spu(spu);
756 mutex_unlock(&spu_full_list_mutex);
759 static struct syscore_ops spu_syscore_ops = {
760 .shutdown = spu_shutdown,
763 static int __init init_spu_base(void)
767 for (i = 0; i < MAX_NUMNODES; i++) {
768 mutex_init(&cbe_spu_info[i].list_mutex);
769 INIT_LIST_HEAD(&cbe_spu_info[i].spus);
772 if (!spu_management_ops)
775 /* create system subsystem for spus */
776 ret = subsys_system_register(&spu_subsys, NULL);
780 ret = spu_enumerate_spus(create_spu);
783 printk(KERN_WARNING "%s: Error initializing spus\n",
785 goto out_unregister_subsys;
789 fb_append_extra_logo(&logo_spe_clut224, ret);
791 mutex_lock(&spu_full_list_mutex);
792 xmon_register_spus(&spu_full_list);
793 crash_register_spus(&spu_full_list);
794 mutex_unlock(&spu_full_list_mutex);
795 spu_add_dev_attr(&dev_attr_stat);
796 register_syscore_ops(&spu_syscore_ops);
802 out_unregister_subsys:
803 bus_unregister(&spu_subsys);
807 module_init(init_spu_base);
809 MODULE_LICENSE("GPL");
810 MODULE_AUTHOR("Arnd Bergmann <arndb@de.ibm.com>");