arch/powerpc/platforms/powernv/setup.c

   1 /*
   2  * PowerNV setup code.
   3  *
   4  * Copyright 2011 IBM Corp.
   5  *
   6  * This program is free software; you can redistribute it and/or
   7  * modify it under the terms of the GNU General Public License
   8  * as published by the Free Software Foundation; either version
   9  * 2 of the License, or (at your option) any later version.
  10  */
  11
  12 #undef DEBUG
  13
  14 #include <linux/cpu.h>
  15 #include <linux/errno.h>
  16 #include <linux/sched.h>
  17 #include <linux/kernel.h>
  18 #include <linux/tty.h>
  19 #include <linux/reboot.h>
  20 #include <linux/init.h>
  21 #include <linux/console.h>
  22 #include <linux/delay.h>
  23 #include <linux/irq.h>
  24 #include <linux/seq_file.h>
  25 #include <linux/of.h>
  26 #include <linux/of_fdt.h>
  27 #include <linux/interrupt.h>
  28 #include <linux/bug.h>
  29 #include <linux/pci.h>
  30 #include <linux/cpufreq.h>
  31
  32 #include <asm/machdep.h>
  33 #include <asm/firmware.h>
  34 #include <asm/xics.h>
  35 #include <asm/rtas.h>
  36 #include <asm/opal.h>
  37 #include <asm/kexec.h>
  38 #include <asm/smp.h>
  39
  40 #include "powernv.h"
  41
  42 static void __init pnv_setup_arch(void)
  43 {
  44         /* Initialize SMP */
  45         pnv_smp_init();
  46
  47         /* Setup PCI */
  48         pnv_pci_init();
  49
  50         /* Setup RTC and NVRAM callbacks */
  51         if (firmware_has_feature(FW_FEATURE_OPAL))
  52                 opal_nvram_init();
  53
  54         /* Enable NAP mode */
  55         powersave_nap = 1;
  56
  57         /* XXX PMCS */
  58 }
  59
  60 static void __init pnv_init_early(void)
  61 {
  62         /*
  63          * Initialize the LPC bus now so that legacy serial
  64          * ports can be found on it
  65          */
  66         opal_lpc_init();
  67
  68 #ifdef CONFIG_HVC_OPAL
  69         if (firmware_has_feature(FW_FEATURE_OPAL))
  70                 hvc_opal_init_early();
  71         else
  72 #endif
  73                 add_preferred_console("hvc", 0, NULL);
  74 }
  75
  76 static void __init pnv_init_IRQ(void)
  77 {
  78         xics_init();
  79
  80         WARN_ON(!ppc_md.get_irq);
  81 }
  82
  83 static void pnv_show_cpuinfo(struct seq_file *m)
  84 {
  85         struct device_node *root;
  86         const char *model = "";
  87
  88         root = of_find_node_by_path("/");
  89         if (root)
  90                 model = of_get_property(root, "model", NULL);
  91         seq_printf(m, "machine\t\t: PowerNV %s\n", model);
  92         if (firmware_has_feature(FW_FEATURE_OPALv3))
  93                 seq_printf(m, "firmware\t: OPAL v3\n");
  94         else if (firmware_has_feature(FW_FEATURE_OPALv2))
  95                 seq_printf(m, "firmware\t: OPAL v2\n");
  96         else if (firmware_has_feature(FW_FEATURE_OPAL))
  97                 seq_printf(m, "firmware\t: OPAL v1\n");
  98         else
  99                 seq_printf(m, "firmware\t: BML\n");
 100         of_node_put(root);
 101 }
 102
 103 static void pnv_prepare_going_down(void)
 104 {
 105         /*
 106          * Disable all notifiers from OPAL, we can't
 107          * service interrupts anymore anyway
 108          */
 109         opal_notifier_disable();
 110
 111         /* Soft disable interrupts */
 112         local_irq_disable();
 113
 114         /*
 115          * Return secondary CPUs to firwmare if a flash update
 116          * is pending otherwise we will get all sort of error
 117          * messages about CPU being stuck etc.. This will also
 118          * have the side effect of hard disabling interrupts so
 119          * past this point, the kernel is effectively dead.
 120          */
 121         opal_flash_term_callback();
 122 }
 123
 124 static void  __noreturn pnv_restart(char *cmd)
 125 {
 126         long rc = OPAL_BUSY;
 127
 128         pnv_prepare_going_down();
 129
 130         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 131                 rc = opal_cec_reboot();
 132                 if (rc == OPAL_BUSY_EVENT)
 133                         opal_poll_events(NULL);
 134                 else
 135                         mdelay(10);
 136         }
 137         for (;;)
 138                 opal_poll_events(NULL);
 139 }
 140
 141 static void __noreturn pnv_power_off(void)
 142 {
 143         long rc = OPAL_BUSY;
 144
 145         pnv_prepare_going_down();
 146
 147         while (rc == OPAL_BUSY || rc == OPAL_BUSY_EVENT) {
 148                 rc = opal_cec_power_down(0);
 149                 if (rc == OPAL_BUSY_EVENT)
 150                         opal_poll_events(NULL);
 151                 else
 152                         mdelay(10);
 153         }
 154         for (;;)
 155                 opal_poll_events(NULL);
 156 }
 157
 158 static void __noreturn pnv_halt(void)
 159 {
 160         pnv_power_off();
 161 }
 162
 163 static void pnv_progress(char *s, unsigned short hex)
 164 {
 165 }
 166
 167 static int pnv_dma_set_mask(struct device *dev, u64 dma_mask)
 168 {
 169         if (dev_is_pci(dev))
 170                 return pnv_pci_dma_set_mask(to_pci_dev(dev), dma_mask);
 171         return __dma_set_mask(dev, dma_mask);
 172 }
 173
 174 static void pnv_shutdown(void)
 175 {
 176         /* Let the PCI code clear up IODA tables */
 177         pnv_pci_shutdown();
 178
 179         /*
 180          * Stop OPAL activity: Unregister all OPAL interrupts so they
 181          * don't fire up while we kexec and make sure all potentially
 182          * DMA'ing ops are complete (such as dump retrieval).
 183          */
 184         opal_shutdown();
 185 }
 186
 187 #ifdef CONFIG_KEXEC
 188 static void pnv_kexec_wait_secondaries_down(void)
 189 {
 190         int my_cpu, i, notified = -1;
 191
 192         my_cpu = get_cpu();
 193
 194         for_each_online_cpu(i) {
 195                 uint8_t status;
 196                 int64_t rc;
 197
 198                 if (i == my_cpu)
 199                         continue;
 200
 201                 for (;;) {
 202                         rc = opal_query_cpu_status(get_hard_smp_processor_id(i),
 203                                                    &status);
 204                         if (rc != OPAL_SUCCESS || status != OPAL_THREAD_STARTED)
 205                                 break;
 206                         barrier();
 207                         if (i != notified) {
 208                                 printk(KERN_INFO "kexec: waiting for cpu %d "
 209                                        "(physical %d) to enter OPAL\n",
 210                                        i, paca[i].hw_cpu_id);
 211                                 notified = i;
 212                         }
 213                 }
 214         }
 215 }
 216
 217 static void pnv_kexec_cpu_down(int crash_shutdown, int secondary)
 218 {
 219         xics_kexec_teardown_cpu(secondary);
 220
 221         /* On OPAL v3, we return all CPUs to firmware */
 222
 223         if (!firmware_has_feature(FW_FEATURE_OPALv3))
 224                 return;
 225
 226         if (secondary) {
 227                 /* Return secondary CPUs to firmware on OPAL v3 */
 228                 mb();
 229                 get_paca()->kexec_state = KEXEC_STATE_REAL_MODE;
 230                 mb();
 231
 232                 /* Return the CPU to OPAL */
 233                 opal_return_cpu();
 234         } else if (crash_shutdown) {
 235                 /*
 236                  * On crash, we don't wait for secondaries to go
 237                  * down as they might be unreachable or hung, so
 238                  * instead we just wait a bit and move on.
 239                  */
 240                 mdelay(1);
 241         } else {
 242                 /* Primary waits for the secondaries to have reached OPAL */
 243                 pnv_kexec_wait_secondaries_down();
 244         }
 245 }
 246 #endif /* CONFIG_KEXEC */
 247
 248 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 249 static unsigned long pnv_memory_block_size(void)
 250 {
 251         return 256UL * 1024 * 1024;
 252 }
 253 #endif
 254
 255 static void __init pnv_setup_machdep_opal(void)
 256 {
 257         ppc_md.get_boot_time = opal_get_boot_time;
 258         ppc_md.get_rtc_time = opal_get_rtc_time;
 259         ppc_md.set_rtc_time = opal_set_rtc_time;
 260         ppc_md.restart = pnv_restart;
 261         ppc_md.power_off = pnv_power_off;
 262         ppc_md.halt = pnv_halt;
 263         ppc_md.machine_check_exception = opal_machine_check;
 264         ppc_md.mce_check_early_recovery = opal_mce_check_early_recovery;
 265 }
 266
 267 #ifdef CONFIG_PPC_POWERNV_RTAS
 268 static void __init pnv_setup_machdep_rtas(void)
 269 {
 270         if (rtas_token("get-time-of-day") != RTAS_UNKNOWN_SERVICE) {
 271                 ppc_md.get_boot_time = rtas_get_boot_time;
 272                 ppc_md.get_rtc_time = rtas_get_rtc_time;
 273                 ppc_md.set_rtc_time = rtas_set_rtc_time;
 274         }
 275         ppc_md.restart = rtas_restart;
 276         ppc_md.power_off = rtas_power_off;
 277         ppc_md.halt = rtas_halt;
 278 }
 279 #endif /* CONFIG_PPC_POWERNV_RTAS */
 280
 281 static int __init pnv_probe(void)
 282 {
 283         unsigned long root = of_get_flat_dt_root();
 284
 285         if (!of_flat_dt_is_compatible(root, "ibm,powernv"))
 286                 return 0;
 287
 288         hpte_init_native();
 289
 290         if (firmware_has_feature(FW_FEATURE_OPAL))
 291                 pnv_setup_machdep_opal();
 292 #ifdef CONFIG_PPC_POWERNV_RTAS
 293         else if (rtas.base)
 294                 pnv_setup_machdep_rtas();
 295 #endif /* CONFIG_PPC_POWERNV_RTAS */
 296
 297         pr_debug("PowerNV detected !\n");
 298
 299         return 1;
 300 }
 301
 302 /*
 303  * Returns the cpu frequency for 'cpu' in Hz. This is used by
 304  * /proc/cpuinfo
 305  */
 306 unsigned long pnv_get_proc_freq(unsigned int cpu)
 307 {
 308         unsigned long ret_freq;
 309
 310         ret_freq = cpufreq_quick_get(cpu) * 1000ul;
 311
 312         /*
 313          * If the backend cpufreq driver does not exist,
 314          * then fallback to old way of reporting the clockrate.
 315          */
 316         if (!ret_freq)
 317                 ret_freq = ppc_proc_freq;
 318         return ret_freq;
 319 }
 320
 321 define_machine(powernv) {
 322         .name                   = "PowerNV",
 323         .probe                  = pnv_probe,
 324         .init_early             = pnv_init_early,
 325         .setup_arch             = pnv_setup_arch,
 326         .init_IRQ               = pnv_init_IRQ,
 327         .show_cpuinfo           = pnv_show_cpuinfo,
 328         .get_proc_freq          = pnv_get_proc_freq,
 329         .progress               = pnv_progress,
 330         .machine_shutdown       = pnv_shutdown,
 331         .power_save             = power7_idle,
 332         .calibrate_decr         = generic_calibrate_decr,
 333         .dma_set_mask           = pnv_dma_set_mask,
 334 #ifdef CONFIG_KEXEC
 335         .kexec_cpu_down         = pnv_kexec_cpu_down,
 336 #endif
 337 #ifdef CONFIG_MEMORY_HOTPLUG_SPARSE
 338         .memory_block_size      = pnv_memory_block_size,
 339 #endif
 340 };