arch/ppc64/kernel/cputable.c

   1 /*
   2  *  arch/ppc64/kernel/cputable.c
   3  *
   4  *  Copyright (C) 2001 Ben. Herrenschmidt (benh@kernel.crashing.org)
   5  *
   6  *  Modifications for ppc64:
   7  *      Copyright (C) 2003 Dave Engebretsen <engebret@us.ibm.com>
   8  *
   9  *  This program is free software; you can redistribute it and/or
  10  *  modify it under the terms of the GNU General Public License
  11  *  as published by the Free Software Foundation; either version
  12  *  2 of the License, or (at your option) any later version.
  13  */
  14
  15 #include <linux/config.h>
  16 #include <linux/string.h>
  17 #include <linux/sched.h>
  18 #include <linux/threads.h>
  19 #include <linux/init.h>
  20 #include <linux/module.h>
  21
  22 #include <asm/oprofile_impl.h>
  23 #include <asm/cputable.h>
  24
  25 struct cpu_spec* cur_cpu_spec = NULL;
  26 EXPORT_SYMBOL(cur_cpu_spec);
  27
  28 /* NOTE:
  29  * Unlike ppc32, ppc64 will only call this once for the boot CPU, it's
  30  * the responsibility of the appropriate CPU save/restore functions to
  31  * eventually copy these settings over. Those save/restore aren't yet
  32  * part of the cputable though. That has to be fixed for both ppc32
  33  * and ppc64
  34  */
  35 extern void __setup_cpu_power3(unsigned long offset, struct cpu_spec* spec);
  36 extern void __setup_cpu_power4(unsigned long offset, struct cpu_spec* spec);
  37 extern void __setup_cpu_ppc970(unsigned long offset, struct cpu_spec* spec);
  38 extern void __setup_cpu_be(unsigned long offset, struct cpu_spec* spec);
  39
  40
  41 /* We only set the altivec features if the kernel was compiled with altivec
  42  * support
  43  */
  44 #ifdef CONFIG_ALTIVEC
  45 #define CPU_FTR_ALTIVEC_COMP    CPU_FTR_ALTIVEC
  46 #define PPC_FEATURE_HAS_ALTIVEC_COMP PPC_FEATURE_HAS_ALTIVEC
  47 #else
  48 #define CPU_FTR_ALTIVEC_COMP    0
  49 #define PPC_FEATURE_HAS_ALTIVEC_COMP    0
  50 #endif
  51
  52 struct cpu_spec cpu_specs[] = {
  53         {       /* Power3 */
  54                 .pvr_mask               = 0xffff0000,
  55                 .pvr_value              = 0x00400000,
  56                 .cpu_name               = "POWER3 (630)",
  57                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
  58                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
  59                 .cpu_user_features = COMMON_USER_PPC64,
  60                 .icache_bsize           = 128,
  61                 .dcache_bsize           = 128,
  62                 .num_pmcs               = 8,
  63                 .cpu_setup              = __setup_cpu_power3,
  64 #ifdef CONFIG_OPROFILE
  65                 .oprofile_cpu_type      = "ppc64/power3",
  66                 .oprofile_model         = &op_model_rs64,
  67 #endif
  68         },
  69         {       /* Power3+ */
  70                 .pvr_mask               = 0xffff0000,
  71                 .pvr_value              = 0x00410000,
  72                 .cpu_name               = "POWER3 (630+)",
  73                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
  74                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR,
  75                 .cpu_user_features      = COMMON_USER_PPC64,
  76                 .icache_bsize           = 128,
  77                 .dcache_bsize           = 128,
  78                 .num_pmcs               = 8,
  79                 .cpu_setup              = __setup_cpu_power3,
  80 #ifdef CONFIG_OPROFILE
  81                 .oprofile_cpu_type      = "ppc64/power3",
  82                 .oprofile_model         = &op_model_rs64,
  83 #endif
  84         },
  85         {       /* Northstar */
  86                 .pvr_mask               = 0xffff0000,
  87                 .pvr_value              = 0x00330000,
  88                 .cpu_name               = "RS64-II (northstar)",
  89                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
  90                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
  91                         CPU_FTR_MMCRA | CPU_FTR_CTRL,
  92                 .cpu_user_features      = COMMON_USER_PPC64,
  93                 .icache_bsize           = 128,
  94                 .dcache_bsize           = 128,
  95                 .num_pmcs               = 8,
  96                 .cpu_setup              = __setup_cpu_power3,
  97 #ifdef CONFIG_OPROFILE
  98                 .oprofile_cpu_type      = "ppc64/rs64",
  99                 .oprofile_model         = &op_model_rs64,
 100 #endif
 101         },
 102         {       /* Pulsar */
 103                 .pvr_mask               = 0xffff0000,
 104                 .pvr_value              = 0x00340000,
 105                 .cpu_name               = "RS64-III (pulsar)",
 106                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 107                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
 108                         CPU_FTR_MMCRA | CPU_FTR_CTRL,
 109                 .cpu_user_features      = COMMON_USER_PPC64,
 110                 .icache_bsize           = 128,
 111                 .dcache_bsize           = 128,
 112                 .num_pmcs               = 8,
 113                 .cpu_setup              = __setup_cpu_power3,
 114 #ifdef CONFIG_OPROFILE
 115                 .oprofile_cpu_type      = "ppc64/rs64",
 116                 .oprofile_model         = &op_model_rs64,
 117 #endif
 118         },
 119         {       /* I-star */
 120                 .pvr_mask               = 0xffff0000,
 121                 .pvr_value              = 0x00360000,
 122                 .cpu_name               = "RS64-III (icestar)",
 123                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 124                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
 125                         CPU_FTR_MMCRA | CPU_FTR_CTRL,
 126                 .cpu_user_features      = COMMON_USER_PPC64,
 127                 .icache_bsize           = 128,
 128                 .dcache_bsize           = 128,
 129                 .num_pmcs               = 8,
 130                 .cpu_setup              = __setup_cpu_power3,
 131 #ifdef CONFIG_OPROFILE
 132                 .oprofile_cpu_type      = "ppc64/rs64",
 133                 .oprofile_model         = &op_model_rs64,
 134 #endif
 135         },
 136         {       /* S-star */
 137                 .pvr_mask               = 0xffff0000,
 138                 .pvr_value              = 0x00370000,
 139                 .cpu_name               = "RS64-IV (sstar)",
 140                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 141                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE | CPU_FTR_IABR |
 142                         CPU_FTR_MMCRA | CPU_FTR_CTRL,
 143                 .cpu_user_features      = COMMON_USER_PPC64,
 144                 .icache_bsize           = 128,
 145                 .dcache_bsize           = 128,
 146                 .num_pmcs               = 8,
 147                 .cpu_setup              = __setup_cpu_power3,
 148 #ifdef CONFIG_OPROFILE
 149                 .oprofile_cpu_type      = "ppc64/rs64",
 150                 .oprofile_model         = &op_model_rs64,
 151 #endif
 152         },
 153         {       /* Power4 */
 154                 .pvr_mask               = 0xffff0000,
 155                 .pvr_value              = 0x00350000,
 156                 .cpu_name               = "POWER4 (gp)",
 157                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 158                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 159                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
 160                 .cpu_user_features      = COMMON_USER_PPC64,
 161                 .icache_bsize           = 128,
 162                 .dcache_bsize           = 128,
 163                 .num_pmcs               = 8,
 164                 .cpu_setup              = __setup_cpu_power4,
 165 #ifdef CONFIG_OPROFILE
 166                 .oprofile_cpu_type      = "ppc64/power4",
 167                 .oprofile_model         = &op_model_rs64,
 168 #endif
 169         },
 170         {       /* Power4+ */
 171                 .pvr_mask               = 0xffff0000,
 172                 .pvr_value              = 0x00380000,
 173                 .cpu_name               = "POWER4+ (gq)",
 174                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 175                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 176                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA,
 177                 .cpu_user_features      = COMMON_USER_PPC64,
 178                 .icache_bsize           = 128,
 179                 .dcache_bsize           = 128,
 180                 .num_pmcs               = 8,
 181                 .cpu_setup              = __setup_cpu_power4,
 182 #ifdef CONFIG_OPROFILE
 183                 .oprofile_cpu_type      = "ppc64/power4",
 184                 .oprofile_model         = &op_model_power4,
 185 #endif
 186         },
 187         {       /* PPC970 */
 188                 .pvr_mask               = 0xffff0000,
 189                 .pvr_value              = 0x00390000,
 190                 .cpu_name               = "PPC970",
 191                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 192                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 193                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
 194                         CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
 195                 .cpu_user_features      = COMMON_USER_PPC64 |
 196                         PPC_FEATURE_HAS_ALTIVEC_COMP,
 197                 .icache_bsize           = 128,
 198                 .dcache_bsize           = 128,
 199                 .num_pmcs               = 8,
 200                 .cpu_setup              = __setup_cpu_ppc970,
 201 #ifdef CONFIG_OPROFILE
 202                 .oprofile_cpu_type      = "ppc64/970",
 203                 .oprofile_model         = &op_model_power4,
 204 #endif
 205         },
 206         {       /* PPC970FX */
 207                 .pvr_mask               = 0xffff0000,
 208                 .pvr_value              = 0x003c0000,
 209                 .cpu_name               = "PPC970FX",
 210                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 211                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 212                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
 213                         CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
 214                 .cpu_user_features      = COMMON_USER_PPC64 |
 215                         PPC_FEATURE_HAS_ALTIVEC_COMP,
 216                 .icache_bsize           = 128,
 217                 .dcache_bsize           = 128,
 218                 .num_pmcs               = 8,
 219                 .cpu_setup              = __setup_cpu_ppc970,
 220 #ifdef CONFIG_OPROFILE
 221                 .oprofile_cpu_type      = "ppc64/970",
 222                 .oprofile_model         = &op_model_power4,
 223 #endif
 224         },
 225         {       /* PPC970MP */
 226                 .pvr_mask               = 0xffff0000,
 227                 .pvr_value              = 0x00440000,
 228                 .cpu_name               = "PPC970MP",
 229                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 230                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 231                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
 232                         CPU_FTR_CAN_NAP | CPU_FTR_MMCRA,
 233                 .cpu_user_features      = COMMON_USER_PPC64 |
 234                         PPC_FEATURE_HAS_ALTIVEC_COMP,
 235                 .icache_bsize           = 128,
 236                 .dcache_bsize           = 128,
 237                 .cpu_setup              = __setup_cpu_ppc970,
 238 #ifdef CONFIG_OPROFILE
 239                 .oprofile_cpu_type      = "ppc64/970",
 240                 .oprofile_model         = &op_model_power4,
 241 #endif
 242         },
 243         {       /* Power5 */
 244                 .pvr_mask               = 0xffff0000,
 245                 .pvr_value              = 0x003a0000,
 246                 .cpu_name               = "POWER5 (gr)",
 247                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 248                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 249                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
 250                         CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
 251                         CPU_FTR_MMCRA_SIHV,
 252                 .cpu_user_features      = COMMON_USER_PPC64,
 253                 .icache_bsize           = 128,
 254                 .dcache_bsize           = 128,
 255                 .num_pmcs               = 6,
 256                 .cpu_setup              = __setup_cpu_power4,
 257 #ifdef CONFIG_OPROFILE
 258                 .oprofile_cpu_type      = "ppc64/power5",
 259                 .oprofile_model         = &op_model_power4,
 260 #endif
 261         },
 262         {       /* Power5 */
 263                 .pvr_mask               = 0xffff0000,
 264                 .pvr_value              = 0x003b0000,
 265                 .cpu_name               = "POWER5 (gs)",
 266                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 267                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 268                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_MMCRA | CPU_FTR_SMT |
 269                         CPU_FTR_COHERENT_ICACHE | CPU_FTR_LOCKLESS_TLBIE |
 270                         CPU_FTR_MMCRA_SIHV,
 271                 .cpu_user_features      = COMMON_USER_PPC64,
 272                 .icache_bsize           = 128,
 273                 .dcache_bsize           = 128,
 274                 .num_pmcs               = 6,
 275                 .cpu_setup              = __setup_cpu_power4,
 276 #ifdef CONFIG_OPROFILE
 277                 .oprofile_cpu_type      = "ppc64/power5",
 278                 .oprofile_model         = &op_model_power4,
 279 #endif
 280         },
 281         {       /* BE DD1.x */
 282                 .pvr_mask               = 0xffff0000,
 283                 .pvr_value              = 0x00700000,
 284                 .cpu_name               = "Broadband Engine",
 285                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 286                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 287                         CPU_FTR_PPCAS_ARCH_V2 | CPU_FTR_ALTIVEC_COMP |
 288                         CPU_FTR_SMT,
 289                 .cpu_user_features      = COMMON_USER_PPC64 |
 290                         PPC_FEATURE_HAS_ALTIVEC_COMP,
 291                 .icache_bsize           = 128,
 292                 .dcache_bsize           = 128,
 293                 .cpu_setup              = __setup_cpu_be,
 294         },
 295         {       /* default match */
 296                 .pvr_mask               = 0x00000000,
 297                 .pvr_value              = 0x00000000,
 298                 .cpu_name               = "POWER4 (compatible)",
 299                 .cpu_features           = CPU_FTR_SPLIT_ID_CACHE |
 300                         CPU_FTR_USE_TB | CPU_FTR_HPTE_TABLE |
 301                         CPU_FTR_PPCAS_ARCH_V2,
 302                 .cpu_user_features      = COMMON_USER_PPC64,
 303                 .icache_bsize           = 128,
 304                 .dcache_bsize           = 128,
 305                 .num_pmcs               = 6,
 306                 .cpu_setup              = __setup_cpu_power4,
 307         }
 308 };