arch/s390/kernel/irq.c

   1 /*
   2  *    Copyright IBM Corp. 2004, 2011
   3  *    Author(s): Martin Schwidefsky <schwidefsky@de.ibm.com>,
   4  *               Holger Smolinski <Holger.Smolinski@de.ibm.com>,
   5  *               Thomas Spatzier <tspat@de.ibm.com>,
   6  *
   7  * This file contains interrupt related functions.
   8  */
   9
  10 #include <linux/kernel_stat.h>
  11 #include <linux/interrupt.h>
  12 #include <linux/seq_file.h>
  13 #include <linux/proc_fs.h>
  14 #include <linux/profile.h>
  15 #include <linux/module.h>
  16 #include <linux/kernel.h>
  17 #include <linux/ftrace.h>
  18 #include <linux/errno.h>
  19 #include <linux/slab.h>
  20 #include <linux/cpu.h>
  21 #include <asm/irq_regs.h>
  22 #include <asm/cputime.h>
  23 #include <asm/lowcore.h>
  24 #include <asm/irq.h>
  25 #include "entry.h"
  26
  27 DEFINE_PER_CPU_SHARED_ALIGNED(struct irq_stat, irq_stat);
  28 EXPORT_PER_CPU_SYMBOL_GPL(irq_stat);
  29
  30 struct irq_class {
  31         char *name;
  32         char *desc;
  33 };
  34
  35 /*
  36  * The list of "main" irq classes on s390. This is the list of interrrupts
  37  * that appear both in /proc/stat ("intr" line) and /proc/interrupts.
  38  * Historically only external and I/O interrupts have been part of /proc/stat.
  39  * We can't add the split external and I/O sub classes since the first field
  40  * in the "intr" line in /proc/stat is supposed to be the sum of all other
  41  * fields.
  42  * Since the external and I/O interrupt fields are already sums we would end
  43  * up with having a sum which accounts each interrupt twice.
  44  */
  45 static const struct irq_class irqclass_main_desc[NR_IRQS] = {
  46         [EXTERNAL_INTERRUPT] = {.name = "EXT"},
  47         [IO_INTERRUPT]       = {.name = "I/O"}
  48 };
  49
  50 /*
  51  * The list of split external and I/O interrupts that appear only in
  52  * /proc/interrupts.
  53  * In addition this list contains non external / I/O events like NMIs.
  54  */
  55 static const struct irq_class irqclass_sub_desc[NR_ARCH_IRQS] = {
  56         [IRQEXT_CLK] = {.name = "CLK", .desc = "[EXT] Clock Comparator"},
  57         [IRQEXT_EXC] = {.name = "EXC", .desc = "[EXT] External Call"},
  58         [IRQEXT_EMS] = {.name = "EMS", .desc = "[EXT] Emergency Signal"},
  59         [IRQEXT_TMR] = {.name = "TMR", .desc = "[EXT] CPU Timer"},
  60         [IRQEXT_TLA] = {.name = "TAL", .desc = "[EXT] Timing Alert"},
  61         [IRQEXT_PFL] = {.name = "PFL", .desc = "[EXT] Pseudo Page Fault"},
  62         [IRQEXT_DSD] = {.name = "DSD", .desc = "[EXT] DASD Diag"},
  63         [IRQEXT_VRT] = {.name = "VRT", .desc = "[EXT] Virtio"},
  64         [IRQEXT_SCP] = {.name = "SCP", .desc = "[EXT] Service Call"},
  65         [IRQEXT_IUC] = {.name = "IUC", .desc = "[EXT] IUCV"},
  66         [IRQEXT_CMS] = {.name = "CMS", .desc = "[EXT] CPU-Measurement: Sampling"},
  67         [IRQEXT_CMC] = {.name = "CMC", .desc = "[EXT] CPU-Measurement: Counter"},
  68         [IRQEXT_CMR] = {.name = "CMR", .desc = "[EXT] CPU-Measurement: RI"},
  69         [IRQIO_CIO]  = {.name = "CIO", .desc = "[I/O] Common I/O Layer Interrupt"},
  70         [IRQIO_QAI]  = {.name = "QAI", .desc = "[I/O] QDIO Adapter Interrupt"},
  71         [IRQIO_DAS]  = {.name = "DAS", .desc = "[I/O] DASD"},
  72         [IRQIO_C15]  = {.name = "C15", .desc = "[I/O] 3215"},
  73         [IRQIO_C70]  = {.name = "C70", .desc = "[I/O] 3270"},
  74         [IRQIO_TAP]  = {.name = "TAP", .desc = "[I/O] Tape"},
  75         [IRQIO_VMR]  = {.name = "VMR", .desc = "[I/O] Unit Record Devices"},
  76         [IRQIO_LCS]  = {.name = "LCS", .desc = "[I/O] LCS"},
  77         [IRQIO_CLW]  = {.name = "CLW", .desc = "[I/O] CLAW"},
  78         [IRQIO_CTC]  = {.name = "CTC", .desc = "[I/O] CTC"},
  79         [IRQIO_APB]  = {.name = "APB", .desc = "[I/O] AP Bus"},
  80         [IRQIO_ADM]  = {.name = "ADM", .desc = "[I/O] EADM Subchannel"},
  81         [IRQIO_CSC]  = {.name = "CSC", .desc = "[I/O] CHSC Subchannel"},
  82         [IRQIO_PCI]  = {.name = "PCI", .desc = "[I/O] PCI Interrupt" },
  83         [IRQIO_MSI]  = {.name = "MSI", .desc = "[I/O] MSI Interrupt" },
  84         [NMI_NMI]    = {.name = "NMI", .desc = "[NMI] Machine Check"},
  85         [CPU_RST]    = {.name = "RST", .desc = "[CPU] CPU Restart"},
  86 };
  87
  88 /*
  89  * show_interrupts is needed by /proc/interrupts.
  90  */
  91 int show_interrupts(struct seq_file *p, void *v)
  92 {
  93         int irq = *(loff_t *) v;
  94         int cpu;
  95
  96         get_online_cpus();
  97         if (irq == 0) {
  98                 seq_puts(p, "           ");
  99                 for_each_online_cpu(cpu)
 100                         seq_printf(p, "CPU%d       ", cpu);
 101                 seq_putc(p, '\n');
 102         }
 103         if (irq < NR_IRQS) {
 104                 seq_printf(p, "%s: ", irqclass_main_desc[irq].name);
 105                 for_each_online_cpu(cpu)
 106                         seq_printf(p, "%10u ", kstat_cpu(cpu).irqs[irq]);
 107                 seq_putc(p, '\n');
 108                 goto skip_arch_irqs;
 109         }
 110         for (irq = 0; irq < NR_ARCH_IRQS; irq++) {
 111                 seq_printf(p, "%s: ", irqclass_sub_desc[irq].name);
 112                 for_each_online_cpu(cpu)
 113                         seq_printf(p, "%10u ", per_cpu(irq_stat, cpu).irqs[irq]);
 114                 if (irqclass_sub_desc[irq].desc)
 115                         seq_printf(p, "  %s", irqclass_sub_desc[irq].desc);
 116                 seq_putc(p, '\n');
 117         }
 118 skip_arch_irqs:
 119         put_online_cpus();
 120         return 0;
 121 }
 122
 123 /*
 124  * Switch to the asynchronous interrupt stack for softirq execution.
 125  */
 126 asmlinkage void do_softirq(void)
 127 {
 128         unsigned long flags, old, new;
 129
 130         if (in_interrupt())
 131                 return;
 132
 133         local_irq_save(flags);
 134
 135         if (local_softirq_pending()) {
 136                 /* Get current stack pointer. */
 137                 asm volatile("la %0,0(15)" : "=a" (old));
 138                 /* Check against async. stack address range. */
 139                 new = S390_lowcore.async_stack;
 140                 if (((new - old) >> (PAGE_SHIFT + THREAD_ORDER)) != 0) {
 141                         /* Need to switch to the async. stack. */
 142                         new -= STACK_FRAME_OVERHEAD;
 143                         ((struct stack_frame *) new)->back_chain = old;
 144
 145                         asm volatile("   la    15,0(%0)\n"
 146                                      "   basr  14,%2\n"
 147                                      "   la    15,0(%1)\n"
 148                                      : : "a" (new), "a" (old),
 149                                          "a" (__do_softirq)
 150                                      : "0", "1", "2", "3", "4", "5", "14",
 151                                        "cc", "memory" );
 152                 } else {
 153                         /* We are already on the async stack. */
 154                         __do_softirq();
 155                 }
 156         }
 157
 158         local_irq_restore(flags);
 159 }
 160
 161 #ifdef CONFIG_PROC_FS
 162 void init_irq_proc(void)
 163 {
 164         struct proc_dir_entry *root_irq_dir;
 165
 166         root_irq_dir = proc_mkdir("irq", NULL);
 167         create_prof_cpu_mask(root_irq_dir);
 168 }
 169 #endif
 170
 171 /*
 172  * ext_int_hash[index] is the list head for all external interrupts that hash
 173  * to this index.
 174  */
 175 static struct list_head ext_int_hash[256];
 176
 177 struct ext_int_info {
 178         ext_int_handler_t handler;
 179         u16 code;
 180         struct list_head entry;
 181         struct rcu_head rcu;
 182 };
 183
 184 /* ext_int_hash_lock protects the handler lists for external interrupts */
 185 DEFINE_SPINLOCK(ext_int_hash_lock);
 186
 187 static void __init init_external_interrupts(void)
 188 {
 189         int idx;
 190
 191         for (idx = 0; idx < ARRAY_SIZE(ext_int_hash); idx++)
 192                 INIT_LIST_HEAD(&ext_int_hash[idx]);
 193 }
 194
 195 static inline int ext_hash(u16 code)
 196 {
 197         return (code + (code >> 9)) & 0xff;
 198 }
 199
 200 int register_external_interrupt(u16 code, ext_int_handler_t handler)
 201 {
 202         struct ext_int_info *p;
 203         unsigned long flags;
 204         int index;
 205
 206         p = kmalloc(sizeof(*p), GFP_ATOMIC);
 207         if (!p)
 208                 return -ENOMEM;
 209         p->code = code;
 210         p->handler = handler;
 211         index = ext_hash(code);
 212
 213         spin_lock_irqsave(&ext_int_hash_lock, flags);
 214         list_add_rcu(&p->entry, &ext_int_hash[index]);
 215         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 216         return 0;
 217 }
 218 EXPORT_SYMBOL(register_external_interrupt);
 219
 220 int unregister_external_interrupt(u16 code, ext_int_handler_t handler)
 221 {
 222         struct ext_int_info *p;
 223         unsigned long flags;
 224         int index = ext_hash(code);
 225
 226         spin_lock_irqsave(&ext_int_hash_lock, flags);
 227         list_for_each_entry_rcu(p, &ext_int_hash[index], entry) {
 228                 if (p->code == code && p->handler == handler) {
 229                         list_del_rcu(&p->entry);
 230                         kfree_rcu(p, rcu);
 231                 }
 232         }
 233         spin_unlock_irqrestore(&ext_int_hash_lock, flags);
 234         return 0;
 235 }
 236 EXPORT_SYMBOL(unregister_external_interrupt);
 237
 238 void __irq_entry do_extint(struct pt_regs *regs, struct ext_code ext_code,
 239                            unsigned int param32, unsigned long param64)
 240 {
 241         struct pt_regs *old_regs;
 242         struct ext_int_info *p;
 243         int index;
 244
 245         old_regs = set_irq_regs(regs);
 246         irq_enter();
 247         if (S390_lowcore.int_clock >= S390_lowcore.clock_comparator) {
 248                 /* Serve timer interrupts first. */
 249                 clock_comparator_work();
 250         }
 251         kstat_incr_irqs_this_cpu(EXTERNAL_INTERRUPT, NULL);
 252         if (ext_code.code != 0x1004)
 253                 __get_cpu_var(s390_idle).nohz_delay = 1;
 254
 255         index = ext_hash(ext_code.code);
 256         rcu_read_lock();
 257         list_for_each_entry_rcu(p, &ext_int_hash[index], entry)
 258                 if (likely(p->code == ext_code.code))
 259                         p->handler(ext_code, param32, param64);
 260         rcu_read_unlock();
 261         irq_exit();
 262         set_irq_regs(old_regs);
 263 }
 264
 265 void __init init_IRQ(void)
 266 {
 267         init_external_interrupts();
 268 }
 269
 270 static DEFINE_SPINLOCK(sc_irq_lock);
 271 static int sc_irq_refcount;
 272
 273 void service_subclass_irq_register(void)
 274 {
 275         spin_lock(&sc_irq_lock);
 276         if (!sc_irq_refcount)
 277                 ctl_set_bit(0, 9);
 278         sc_irq_refcount++;
 279         spin_unlock(&sc_irq_lock);
 280 }
 281 EXPORT_SYMBOL(service_subclass_irq_register);
 282
 283 void service_subclass_irq_unregister(void)
 284 {
 285         spin_lock(&sc_irq_lock);
 286         sc_irq_refcount--;
 287         if (!sc_irq_refcount)
 288                 ctl_clear_bit(0, 9);
 289         spin_unlock(&sc_irq_lock);
 290 }
 291 EXPORT_SYMBOL(service_subclass_irq_unregister);
 292
 293 static DEFINE_SPINLOCK(ma_subclass_lock);
 294 static int ma_subclass_refcount;
 295
 296 void measurement_alert_subclass_register(void)
 297 {
 298         spin_lock(&ma_subclass_lock);
 299         if (!ma_subclass_refcount)
 300                 ctl_set_bit(0, 5);
 301         ma_subclass_refcount++;
 302         spin_unlock(&ma_subclass_lock);
 303 }
 304 EXPORT_SYMBOL(measurement_alert_subclass_register);
 305
 306 void measurement_alert_subclass_unregister(void)
 307 {
 308         spin_lock(&ma_subclass_lock);
 309         ma_subclass_refcount--;
 310         if (!ma_subclass_refcount)
 311                 ctl_clear_bit(0, 5);
 312         spin_unlock(&ma_subclass_lock);
 313 }
 314 EXPORT_SYMBOL(measurement_alert_subclass_unregister);