2 * S390 64-bit swsusp implementation
4 * Copyright IBM Corp. 2009
6 * Author(s): Hans-Joachim Picht <hans@linux.vnet.ibm.com>
7 * Michael Holzheu <holzheu@linux.vnet.ibm.com>
11 #include <asm/ptrace.h>
12 #include <asm/asm-offsets.h>
15 * Save register context in absolute 0 lowcore and call swsusp_save() to
16 * create in-memory kernel image. The context is saved in the designated
17 * "store status" memory locations (see POP).
18 * We return from this function twice. The first time during the suspend to
19 * disk process. The second time via the swsusp_arch_resume() function
20 * (see below) in the resume process.
21 * This function runs with disabled interrupts.
25 .globl swsusp_arch_suspend
27 stmg %r6,%r15,__SF_GPRS(%r15)
29 aghi %r15,-STACK_FRAME_OVERHEAD
30 stg %r1,__SF_BACKCHAIN(%r15)
33 stnsm __SF_EMPTY(%r15),0xfb
35 /* Switch off lowcore protection */
36 stctg %c0,%c0,__SF_EMPTY(%r15)
37 ni __SF_EMPTY+4(%r15),0xef
38 lctlg %c0,%c0,__SF_EMPTY(%r15)
40 /* Store prefix register on stack */
43 /* Save prefix register contents for lowcore */
44 llgf %r4,__SF_EMPTY(%r15)
46 /* Get pointer to save area */
50 mvc 0x318(4,%r1),__SF_EMPTY(%r15) /* move prefix to lowcore */
51 stfpc 0x31c(%r1) /* store fpu control */
52 std 0,0x200(%r1) /* store f0 */
53 std 1,0x208(%r1) /* store f1 */
54 std 2,0x210(%r1) /* store f2 */
55 std 3,0x218(%r1) /* store f3 */
56 std 4,0x220(%r1) /* store f4 */
57 std 5,0x228(%r1) /* store f5 */
58 std 6,0x230(%r1) /* store f6 */
59 std 7,0x238(%r1) /* store f7 */
60 std 8,0x240(%r1) /* store f8 */
61 std 9,0x248(%r1) /* store f9 */
62 std 10,0x250(%r1) /* store f10 */
63 std 11,0x258(%r1) /* store f11 */
64 std 12,0x260(%r1) /* store f12 */
65 std 13,0x268(%r1) /* store f13 */
66 std 14,0x270(%r1) /* store f14 */
67 std 15,0x278(%r1) /* store f15 */
68 stam %a0,%a15,0x340(%r1) /* store access registers */
69 stctg %c0,%c15,0x380(%r1) /* store control registers */
70 stmg %r0,%r15,0x280(%r1) /* store general registers */
72 stpt 0x328(%r1) /* store timer */
73 stckc 0x330(%r1) /* store clock comparator */
76 stosm __SF_EMPTY(%r15),0x04
78 /* Set prefix page to zero */
79 xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
89 brasl %r14,swsusp_save
91 /* Switch on lowcore protection */
92 stctg %c0,%c0,__SF_EMPTY(%r15)
93 oi __SF_EMPTY+4(%r15),0x10
94 lctlg %c0,%c0,__SF_EMPTY(%r15)
96 /* Restore prefix register and return */
99 lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)
104 * Restore saved memory image to correct place and restore register context.
105 * Then we return to the function that called swsusp_arch_suspend().
106 * swsusp_arch_resume() runs with disabled interrupts.
108 .globl swsusp_arch_resume
110 stmg %r6,%r15,__SF_GPRS(%r15)
112 aghi %r15,-STACK_FRAME_OVERHEAD
113 stg %r1,__SF_BACKCHAIN(%r15)
116 /* Save boot cpu number */
117 brasl %r14,smp_get_phys_cpu_id
121 stnsm __SF_EMPTY(%r15),0xfb
123 /* Switch off lowcore protection */
124 stctg %c0,%c0,__SF_EMPTY(%r15)
125 ni __SF_EMPTY+4(%r15),0xef
126 lctlg %c0,%c0,__SF_EMPTY(%r15)
128 /* Set prefix page to zero */
129 xc __SF_EMPTY(4,%r15),__SF_EMPTY(%r15)
132 /* Restore saved image */
133 larl %r1,restore_pblist
151 /* Restore registers */
152 lghi %r13,0x1000 /* %r1 = pointer to save arae */
154 spt 0x328(%r13) /* reprogram timer */
155 //sckc 0x330(%r13) /* set clock comparator */
157 lctlg %c0,%c15,0x380(%r13) /* load control registers */
158 lam %a0,%a15,0x340(%r13) /* load access registers */
160 lfpc 0x31c(%r13) /* load fpu control */
161 ld 0,0x200(%r13) /* load f0 */
162 ld 1,0x208(%r13) /* load f1 */
163 ld 2,0x210(%r13) /* load f2 */
164 ld 3,0x218(%r13) /* load f3 */
165 ld 4,0x220(%r13) /* load f4 */
166 ld 5,0x228(%r13) /* load f5 */
167 ld 6,0x230(%r13) /* load f6 */
168 ld 7,0x238(%r13) /* load f7 */
169 ld 8,0x240(%r13) /* load f8 */
170 ld 9,0x248(%r13) /* load f9 */
171 ld 10,0x250(%r13) /* load f10 */
172 ld 11,0x258(%r13) /* load f11 */
173 ld 12,0x260(%r13) /* load f12 */
174 ld 13,0x268(%r13) /* load f13 */
175 ld 14,0x270(%r13) /* load f14 */
176 ld 15,0x278(%r13) /* load f15 */
181 /* Pointer to save arae */
186 lgr %r2,%r10 /* get cpu id */
188 brasl %r14,smp_switch_boot_cpu_in_resume
190 /* Restore prefix register */
193 /* Switch on lowcore protection */
194 stctg %c0,%c0,__SF_EMPTY(%r15)
195 oi __SF_EMPTY+4(%r15),0x10
196 lctlg %c0,%c0,__SF_EMPTY(%r15)
199 stosm __SF_EMPTY(%r15),0x04
202 lmg %r6,%r15,STACK_FRAME_OVERHEAD + __SF_GPRS(%r15)