2 * Copyright 2010 Tilera Corporation. All Rights Reserved.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation, version 2.
8 * This program is distributed in the hope that it will be useful, but
9 * WITHOUT ANY WARRANTY; without even the implied warranty of
10 * MERCHANTABILITY OR FITNESS FOR A PARTICULAR PURPOSE, GOOD TITLE or
11 * NON INFRINGEMENT. See the GNU General Public License for
15 #ifndef _ASM_TILE_PROCESSOR_H
16 #define _ASM_TILE_PROCESSOR_H
21 * NOTE: we don't include <linux/ptrace.h> or <linux/percpu.h> as one
22 * normally would, due to #include dependencies.
24 #include <linux/types.h>
25 #include <asm/ptrace.h>
26 #include <asm/percpu.h>
28 #include <arch/chip.h>
29 #include <arch/spr_def.h>
39 * Default implementation of macro that returns current
40 * instruction pointer ("program counter").
42 void *current_text_addr(void);
44 #if CHIP_HAS_TILE_DMA()
45 /* Capture the state of a suspended DMA. */
46 struct tile_dma_state {
50 unsigned long strides;
51 unsigned long chunk_size;
52 unsigned long src_chunk;
53 unsigned long dest_chunk;
59 * A mask of the DMA status register for selecting only the 'running'
62 #define DMA_STATUS_MASK \
63 (SPR_DMA_STATUS__RUNNING_MASK | SPR_DMA_STATUS__DONE_MASK)
67 * Track asynchronous TLB events (faults and access violations)
68 * that occur while we are in kernel mode from DMA or the SN processor.
71 short fault_num; /* original fault number; 0 if none */
72 char is_fault; /* was it a fault (vs an access violation) */
73 char is_write; /* for fault: was it caused by a write? */
74 unsigned long address; /* what address faulted? */
77 #ifdef CONFIG_HARDWALL
79 struct hardwall_task {
80 /* Which hardwall is this task tied to? (or NULL if none) */
81 struct hardwall_info *info;
82 /* Chains this task into the list at info->task_head. */
83 struct list_head list;
86 #define HARDWALL_TYPES 1 /* udn */
88 #define HARDWALL_TYPES 3 /* udn, idn, and ipi */
92 struct thread_struct {
93 /* kernel stack pointer */
97 /* starting user stack pointer (for page migration) */
99 /* pid of process that created this one */
101 #if CHIP_HAS_TILE_DMA()
102 /* DMA info for suspended threads (byte == 0 means no DMA state) */
103 struct tile_dma_state tile_dma_state;
105 /* User EX_CONTEXT registers */
106 unsigned long ex_context[2];
107 /* User SYSTEM_SAVE registers */
108 unsigned long system_save[4];
109 /* User interrupt mask */
110 unsigned long long interrupt_mask;
111 /* User interrupt-control 0 state */
112 unsigned long intctrl_0;
113 #if CHIP_HAS_PROC_STATUS_SPR()
114 /* Any other miscellaneous processor state bits */
115 unsigned long proc_status;
117 #if !CHIP_HAS_FIXED_INTVEC_BASE()
118 /* Interrupt base for PL0 interrupts */
119 unsigned long interrupt_vector_base;
121 #if CHIP_HAS_TILE_RTF_HWM()
122 /* Tile cache retry fifo high-water mark */
123 unsigned long tile_rtf_hwm;
125 #if CHIP_HAS_DSTREAM_PF()
126 /* Data stream prefetch control */
127 unsigned long dstream_pf;
129 #ifdef CONFIG_HARDWALL
130 /* Hardwall information for various resources. */
131 struct hardwall_task hardwall[HARDWALL_TYPES];
133 #if CHIP_HAS_TILE_DMA()
134 /* Async DMA TLB fault information */
135 struct async_tlb dma_async_tlb;
137 #if CHIP_HAS_SN_PROC()
138 /* Was static network processor when we were switched out? */
140 /* Async SNI TLB fault information */
141 struct async_tlb sn_async_tlb;
145 #endif /* !__ASSEMBLY__ */
148 * Start with "sp" this many bytes below the top of the kernel stack.
149 * This preserves the invariant that a called function may write to *sp.
151 #define STACK_TOP_DELTA 8
154 * When entering the kernel via a fault, start with the top of the
155 * pt_regs structure this many bytes below the top of the page.
156 * This aligns the pt_regs structure optimally for cache-line access.
159 #define KSTK_PTREGS_GAP 48
161 #define KSTK_PTREGS_GAP 56
167 #define TASK_SIZE_MAX (MEM_LOW_END + 1)
169 #define TASK_SIZE_MAX PAGE_OFFSET
172 /* TASK_SIZE and related variables are always checked in "current" context. */
174 #define COMPAT_TASK_SIZE (1UL << 31)
175 #define TASK_SIZE ((current_thread_info()->status & TS_COMPAT) ?\
176 COMPAT_TASK_SIZE : TASK_SIZE_MAX)
178 #define TASK_SIZE TASK_SIZE_MAX
181 /* We provide a minimal "vdso" a la x86; just the sigreturn code for now. */
182 #define VDSO_BASE (TASK_SIZE - PAGE_SIZE)
184 #define STACK_TOP VDSO_BASE
186 /* STACK_TOP_MAX is used temporarily in execve and should not check COMPAT. */
187 #define STACK_TOP_MAX TASK_SIZE_MAX
190 * This decides where the kernel will search for a free chunk of vm
191 * space during mmap's, if it is using bottom-up mapping.
193 #define TASK_UNMAPPED_BASE (PAGE_ALIGN(TASK_SIZE / 3))
195 #define HAVE_ARCH_PICK_MMAP_LAYOUT
197 #define INIT_THREAD { \
198 .ksp = (unsigned long)init_stack + THREAD_SIZE - STACK_TOP_DELTA, \
199 .interrupt_mask = -1ULL \
202 /* Kernel stack top for the task that first boots on this cpu. */
203 DECLARE_PER_CPU(unsigned long, boot_sp);
205 /* PC to boot from on this cpu. */
206 DECLARE_PER_CPU(unsigned long, boot_pc);
208 /* Do necessary setup to start up a newly executed thread. */
209 static inline void start_thread(struct pt_regs *regs,
210 unsigned long pc, unsigned long usp)
214 single_step_execve();
217 /* Free all resources held by a thread. */
218 static inline void release_thread(struct task_struct *dead_task)
220 /* Nothing for now */
223 extern int kernel_thread(int (*fn)(void *), void *arg, unsigned long flags);
225 extern int do_work_pending(struct pt_regs *regs, u32 flags);
229 * Return saved (kernel) PC of a blocked thread.
230 * Only used in a printk() in kernel/sched.c, so don't work too hard.
232 #define thread_saved_pc(t) ((t)->thread.pc)
234 unsigned long get_wchan(struct task_struct *p);
236 /* Return initial ksp value for given task. */
237 #define task_ksp0(task) ((unsigned long)(task)->stack + THREAD_SIZE)
239 /* Return some info about the user process TASK. */
240 #define KSTK_TOP(task) (task_ksp0(task) - STACK_TOP_DELTA)
241 #define task_pt_regs(task) \
242 ((struct pt_regs *)(task_ksp0(task) - KSTK_PTREGS_GAP) - 1)
243 #define current_pt_regs() \
244 ((struct pt_regs *)((stack_pointer | (THREAD_SIZE - 1)) - \
245 (KSTK_PTREGS_GAP - 1)) - 1)
246 #define task_sp(task) (task_pt_regs(task)->sp)
247 #define task_pc(task) (task_pt_regs(task)->pc)
248 /* Aliases for pc and sp (used in fs/proc/array.c) */
249 #define KSTK_EIP(task) task_pc(task)
250 #define KSTK_ESP(task) task_sp(task)
252 /* Standard format for printing registers and other word-size data. */
254 # define REGFMT "0x%016lx"
256 # define REGFMT "0x%08lx"
260 * Do some slow action (e.g. read a slow SPR).
261 * Note that this must also have compiler-barrier semantics since
262 * it may be used in a busy loop reading memory.
264 static inline void cpu_relax(void)
266 __insn_mfspr(SPR_PASS);
270 /* Info on this processor (see fs/proc/cpuinfo.c) */
271 struct seq_operations;
272 extern const struct seq_operations cpuinfo_op;
274 /* Provide information about the chip model. */
275 extern char chip_model[64];
277 /* Data on which physical memory controller corresponds to which NUMA node. */
278 extern int node_controller[];
280 #if CHIP_HAS_CBOX_HOME_MAP()
281 /* Does the heap allocator return hash-for-home pages by default? */
282 extern int hash_default;
284 /* Should kernel stack pages be hash-for-home? */
285 extern int kstack_hash;
287 /* Does MAP_ANONYMOUS return hash-for-home pages by default? */
288 #define uheap_hash hash_default
291 #define hash_default 0
292 #define kstack_hash 0
296 /* Are we using huge pages in the TLB for kernel data? */
297 extern int kdata_huge;
299 /* Support standard Linux prefetching. */
300 #define ARCH_HAS_PREFETCH
301 #define prefetch(x) __builtin_prefetch(x)
302 #define PREFETCH_STRIDE CHIP_L2_LINE_SIZE()
304 /* Bring a value into the L1D, faulting the TLB if necessary. */
306 #define prefetch_L1(x) __insn_prefetch_l1_fault((void *)(x))
308 #define prefetch_L1(x) __insn_prefetch_L1((void *)(x))
311 #else /* __ASSEMBLY__ */
313 /* Do some slow action (e.g. read a slow SPR). */
314 #define CPU_RELAX mfspr zero, SPR_PASS
316 #endif /* !__ASSEMBLY__ */
318 /* Assembly code assumes that the PL is in the low bits. */
319 #if SPR_EX_CONTEXT_1_1__PL_SHIFT != 0
320 # error Fix assembly assumptions about PL
323 /* We sometimes use these macros for EX_CONTEXT_0_1 as well. */
324 #if SPR_EX_CONTEXT_1_1__PL_SHIFT != SPR_EX_CONTEXT_0_1__PL_SHIFT || \
325 SPR_EX_CONTEXT_1_1__PL_RMASK != SPR_EX_CONTEXT_0_1__PL_RMASK || \
326 SPR_EX_CONTEXT_1_1__ICS_SHIFT != SPR_EX_CONTEXT_0_1__ICS_SHIFT || \
327 SPR_EX_CONTEXT_1_1__ICS_RMASK != SPR_EX_CONTEXT_0_1__ICS_RMASK
328 # error Fix assumptions that EX1 macros work for both PL0 and PL1
331 /* Allow pulling apart and recombining the PL and ICS bits in EX_CONTEXT. */
332 #define EX1_PL(ex1) \
333 (((ex1) >> SPR_EX_CONTEXT_1_1__PL_SHIFT) & SPR_EX_CONTEXT_1_1__PL_RMASK)
334 #define EX1_ICS(ex1) \
335 (((ex1) >> SPR_EX_CONTEXT_1_1__ICS_SHIFT) & SPR_EX_CONTEXT_1_1__ICS_RMASK)
336 #define PL_ICS_EX1(pl, ics) \
337 (((pl) << SPR_EX_CONTEXT_1_1__PL_SHIFT) | \
338 ((ics) << SPR_EX_CONTEXT_1_1__ICS_SHIFT))
341 * Provide symbolic constants for PLs.
342 * Note that assembly code assumes that USER_PL is zero.
345 #if CONFIG_KERNEL_PL == 2
348 #define KERNEL_PL CONFIG_KERNEL_PL
350 /* SYSTEM_SAVE_K_0 holds the current cpu number ORed with ksp0. */
351 #define CPU_LOG_MASK_VALUE 12
352 #define CPU_MASK_VALUE ((1 << CPU_LOG_MASK_VALUE) - 1)
353 #if CONFIG_NR_CPUS > CPU_MASK_VALUE
354 # error Too many cpus!
356 #define raw_smp_processor_id() \
357 ((int)__insn_mfspr(SPR_SYSTEM_SAVE_K_0) & CPU_MASK_VALUE)
358 #define get_current_ksp0() \
359 (__insn_mfspr(SPR_SYSTEM_SAVE_K_0) & ~CPU_MASK_VALUE)
360 #define next_current_ksp0(task) ({ \
361 unsigned long __ksp0 = task_ksp0(task); \
362 int __cpu = raw_smp_processor_id(); \
363 BUG_ON(__ksp0 & CPU_MASK_VALUE); \
367 #endif /* _ASM_TILE_PROCESSOR_H */