arch/x86/kernel/cpu/microcode/amd.c

   1 /*
   2  *  AMD CPU Microcode Update Driver for Linux
   3  *  Copyright (C) 2008-2011 Advanced Micro Devices Inc.
   4  *
   5  *  Author: Peter Oruba <peter.oruba@amd.com>
   6  *
   7  *  Based on work by:
   8  *  Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
   9  *
  10  *  Maintainers:
  11  *  Andreas Herrmann <herrmann.der.user@googlemail.com>
  12  *  Borislav Petkov <bp@alien8.de>
  13  *
  14  *  This driver allows to upgrade microcode on F10h AMD
  15  *  CPUs and later.
  16  *
  17  *  Licensed under the terms of the GNU General Public
  18  *  License version 2. See file COPYING for details.
  19  */
  20
  21 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
  22
  23 #include <linux/firmware.h>
  24 #include <linux/uaccess.h>
  25 #include <linux/vmalloc.h>
  26 #include <linux/kernel.h>
  27 #include <linux/module.h>
  28 #include <linux/pci.h>
  29
  30 #include <asm/microcode.h>
  31 #include <asm/processor.h>
  32 #include <asm/msr.h>
  33 #include <asm/microcode_amd.h>
  34
  35 MODULE_DESCRIPTION("AMD Microcode Update Driver");
  36 MODULE_AUTHOR("Peter Oruba");
  37 MODULE_LICENSE("GPL v2");
  38
  39 static struct equiv_cpu_entry *equiv_cpu_table;
  40
  41 struct ucode_patch {
  42         struct list_head plist;
  43         void *data;
  44         u32 patch_id;
  45         u16 equiv_cpu;
  46 };
  47
  48 static LIST_HEAD(pcache);
  49
  50 static u16 __find_equiv_id(unsigned int cpu)
  51 {
  52         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
  53         return find_equiv_id(equiv_cpu_table, uci->cpu_sig.sig);
  54 }
  55
  56 static u32 find_cpu_family_by_equiv_cpu(u16 equiv_cpu)
  57 {
  58         int i = 0;
  59
  60         BUG_ON(!equiv_cpu_table);
  61
  62         while (equiv_cpu_table[i].equiv_cpu != 0) {
  63                 if (equiv_cpu == equiv_cpu_table[i].equiv_cpu)
  64                         return equiv_cpu_table[i].installed_cpu;
  65                 i++;
  66         }
  67         return 0;
  68 }
  69
  70 /*
  71  * a small, trivial cache of per-family ucode patches
  72  */
  73 static struct ucode_patch *cache_find_patch(u16 equiv_cpu)
  74 {
  75         struct ucode_patch *p;
  76
  77         list_for_each_entry(p, &pcache, plist)
  78                 if (p->equiv_cpu == equiv_cpu)
  79                         return p;
  80         return NULL;
  81 }
  82
  83 static void update_cache(struct ucode_patch *new_patch)
  84 {
  85         struct ucode_patch *p;
  86
  87         list_for_each_entry(p, &pcache, plist) {
  88                 if (p->equiv_cpu == new_patch->equiv_cpu) {
  89                         if (p->patch_id >= new_patch->patch_id)
  90                                 /* we already have the latest patch */
  91                                 return;
  92
  93                         list_replace(&p->plist, &new_patch->plist);
  94                         kfree(p->data);
  95                         kfree(p);
  96                         return;
  97                 }
  98         }
  99         /* no patch found, add it */
 100         list_add_tail(&new_patch->plist, &pcache);
 101 }
 102
 103 static void free_cache(void)
 104 {
 105         struct ucode_patch *p, *tmp;
 106
 107         list_for_each_entry_safe(p, tmp, &pcache, plist) {
 108                 __list_del(p->plist.prev, p->plist.next);
 109                 kfree(p->data);
 110                 kfree(p);
 111         }
 112 }
 113
 114 static struct ucode_patch *find_patch(unsigned int cpu)
 115 {
 116         u16 equiv_id;
 117
 118         equiv_id = __find_equiv_id(cpu);
 119         if (!equiv_id)
 120                 return NULL;
 121
 122         return cache_find_patch(equiv_id);
 123 }
 124
 125 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
 126 {
 127         struct cpuinfo_x86 *c = &cpu_data(cpu);
 128         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 129         struct ucode_patch *p;
 130
 131         csig->sig = cpuid_eax(0x00000001);
 132         csig->rev = c->microcode;
 133
 134         /*
 135          * a patch could have been loaded early, set uci->mc so that
 136          * mc_bp_resume() can call apply_microcode()
 137          */
 138         p = find_patch(cpu);
 139         if (p && (p->patch_id == csig->rev))
 140                 uci->mc = p->data;
 141
 142         pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
 143
 144         return 0;
 145 }
 146
 147 static unsigned int verify_patch_size(u8 family, u32 patch_size,
 148                                       unsigned int size)
 149 {
 150         u32 max_size;
 151
 152 #define F1XH_MPB_MAX_SIZE 2048
 153 #define F14H_MPB_MAX_SIZE 1824
 154 #define F15H_MPB_MAX_SIZE 4096
 155 #define F16H_MPB_MAX_SIZE 3458
 156
 157         switch (family) {
 158         case 0x14:
 159                 max_size = F14H_MPB_MAX_SIZE;
 160                 break;
 161         case 0x15:
 162                 max_size = F15H_MPB_MAX_SIZE;
 163                 break;
 164         case 0x16:
 165                 max_size = F16H_MPB_MAX_SIZE;
 166                 break;
 167         default:
 168                 max_size = F1XH_MPB_MAX_SIZE;
 169                 break;
 170         }
 171
 172         if (patch_size > min_t(u32, size, max_size)) {
 173                 pr_err("patch size mismatch\n");
 174                 return 0;
 175         }
 176
 177         return patch_size;
 178 }
 179
 180 /*
 181  * Those patch levels cannot be updated to newer ones and thus should be final.
 182  */
 183 static u32 final_levels[] = {
 184         0x01000098,
 185         0x0100009f,
 186         0x010000af,
 187         0, /* T-101 terminator */
 188 };
 189
 190 /*
 191  * Check the current patch level on this CPU.
 192  *
 193  * @rev: Use it to return the patch level. It is set to 0 in the case of
 194  * error.
 195  *
 196  * Returns:
 197  *  - true: if update should stop
 198  *  - false: otherwise
 199  */
 200 bool check_current_patch_level(u32 *rev, bool early)
 201 {
 202         u32 lvl, dummy, i;
 203         bool ret = false;
 204         u32 *levels;
 205
 206         native_rdmsr(MSR_AMD64_PATCH_LEVEL, lvl, dummy);
 207
 208         if (IS_ENABLED(CONFIG_X86_32) && early)
 209                 levels = (u32 *)__pa_nodebug(&final_levels);
 210         else
 211                 levels = final_levels;
 212
 213         for (i = 0; levels[i]; i++) {
 214                 if (lvl == levels[i]) {
 215                         lvl = 0;
 216                         ret = true;
 217                         break;
 218                 }
 219         }
 220
 221         if (rev)
 222                 *rev = lvl;
 223
 224         return ret;
 225 }
 226
 227 int __apply_microcode_amd(struct microcode_amd *mc_amd)
 228 {
 229         u32 rev, dummy;
 230
 231         native_wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
 232
 233         /* verify patch application was successful */
 234         native_rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
 235         if (rev != mc_amd->hdr.patch_id)
 236                 return -1;
 237
 238         return 0;
 239 }
 240
 241 int apply_microcode_amd(int cpu)
 242 {
 243         struct cpuinfo_x86 *c = &cpu_data(cpu);
 244         struct microcode_amd *mc_amd;
 245         struct ucode_cpu_info *uci;
 246         struct ucode_patch *p;
 247         u32 rev;
 248
 249         BUG_ON(raw_smp_processor_id() != cpu);
 250
 251         uci = ucode_cpu_info + cpu;
 252
 253         p = find_patch(cpu);
 254         if (!p)
 255                 return 0;
 256
 257         mc_amd  = p->data;
 258         uci->mc = p->data;
 259
 260         if (check_current_patch_level(&rev, false))
 261                 return -1;
 262
 263         /* need to apply patch? */
 264         if (rev >= mc_amd->hdr.patch_id) {
 265                 c->microcode = rev;
 266                 uci->cpu_sig.rev = rev;
 267                 return 0;
 268         }
 269
 270         if (__apply_microcode_amd(mc_amd)) {
 271                 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
 272                         cpu, mc_amd->hdr.patch_id);
 273                 return -1;
 274         }
 275         pr_info("CPU%d: new patch_level=0x%08x\n", cpu,
 276                 mc_amd->hdr.patch_id);
 277
 278         uci->cpu_sig.rev = mc_amd->hdr.patch_id;
 279         c->microcode = mc_amd->hdr.patch_id;
 280
 281         return 0;
 282 }
 283
 284 static int install_equiv_cpu_table(const u8 *buf)
 285 {
 286         unsigned int *ibuf = (unsigned int *)buf;
 287         unsigned int type = ibuf[1];
 288         unsigned int size = ibuf[2];
 289
 290         if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
 291                 pr_err("empty section/"
 292                        "invalid type field in container file section header\n");
 293                 return -EINVAL;
 294         }
 295
 296         equiv_cpu_table = vmalloc(size);
 297         if (!equiv_cpu_table) {
 298                 pr_err("failed to allocate equivalent CPU table\n");
 299                 return -ENOMEM;
 300         }
 301
 302         memcpy(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
 303
 304         /* add header length */
 305         return size + CONTAINER_HDR_SZ;
 306 }
 307
 308 static void free_equiv_cpu_table(void)
 309 {
 310         vfree(equiv_cpu_table);
 311         equiv_cpu_table = NULL;
 312 }
 313
 314 static void cleanup(void)
 315 {
 316         free_equiv_cpu_table();
 317         free_cache();
 318 }
 319
 320 /*
 321  * We return the current size even if some of the checks failed so that
 322  * we can skip over the next patch. If we return a negative value, we
 323  * signal a grave error like a memory allocation has failed and the
 324  * driver cannot continue functioning normally. In such cases, we tear
 325  * down everything we've used up so far and exit.
 326  */
 327 static int verify_and_add_patch(u8 family, u8 *fw, unsigned int leftover)
 328 {
 329         struct microcode_header_amd *mc_hdr;
 330         struct ucode_patch *patch;
 331         unsigned int patch_size, crnt_size, ret;
 332         u32 proc_fam;
 333         u16 proc_id;
 334
 335         patch_size  = *(u32 *)(fw + 4);
 336         crnt_size   = patch_size + SECTION_HDR_SIZE;
 337         mc_hdr      = (struct microcode_header_amd *)(fw + SECTION_HDR_SIZE);
 338         proc_id     = mc_hdr->processor_rev_id;
 339
 340         proc_fam = find_cpu_family_by_equiv_cpu(proc_id);
 341         if (!proc_fam) {
 342                 pr_err("No patch family for equiv ID: 0x%04x\n", proc_id);
 343                 return crnt_size;
 344         }
 345
 346         /* check if patch is for the current family */
 347         proc_fam = ((proc_fam >> 8) & 0xf) + ((proc_fam >> 20) & 0xff);
 348         if (proc_fam != family)
 349                 return crnt_size;
 350
 351         if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
 352                 pr_err("Patch-ID 0x%08x: chipset-specific code unsupported.\n",
 353                         mc_hdr->patch_id);
 354                 return crnt_size;
 355         }
 356
 357         ret = verify_patch_size(family, patch_size, leftover);
 358         if (!ret) {
 359                 pr_err("Patch-ID 0x%08x: size mismatch.\n", mc_hdr->patch_id);
 360                 return crnt_size;
 361         }
 362
 363         patch = kzalloc(sizeof(*patch), GFP_KERNEL);
 364         if (!patch) {
 365                 pr_err("Patch allocation failure.\n");
 366                 return -EINVAL;
 367         }
 368
 369         patch->data = kzalloc(patch_size, GFP_KERNEL);
 370         if (!patch->data) {
 371                 pr_err("Patch data allocation failure.\n");
 372                 kfree(patch);
 373                 return -EINVAL;
 374         }
 375
 376         /* All looks ok, copy patch... */
 377         memcpy(patch->data, fw + SECTION_HDR_SIZE, patch_size);
 378         INIT_LIST_HEAD(&patch->plist);
 379         patch->patch_id  = mc_hdr->patch_id;
 380         patch->equiv_cpu = proc_id;
 381
 382         pr_debug("%s: Added patch_id: 0x%08x, proc_id: 0x%04x\n",
 383                  __func__, patch->patch_id, proc_id);
 384
 385         /* ... and add to cache. */
 386         update_cache(patch);
 387
 388         return crnt_size;
 389 }
 390
 391 static enum ucode_state __load_microcode_amd(u8 family, const u8 *data,
 392                                              size_t size)
 393 {
 394         enum ucode_state ret = UCODE_ERROR;
 395         unsigned int leftover;
 396         u8 *fw = (u8 *)data;
 397         int crnt_size = 0;
 398         int offset;
 399
 400         offset = install_equiv_cpu_table(data);
 401         if (offset < 0) {
 402                 pr_err("failed to create equivalent cpu table\n");
 403                 return ret;
 404         }
 405         fw += offset;
 406         leftover = size - offset;
 407
 408         if (*(u32 *)fw != UCODE_UCODE_TYPE) {
 409                 pr_err("invalid type field in container file section header\n");
 410                 free_equiv_cpu_table();
 411                 return ret;
 412         }
 413
 414         while (leftover) {
 415                 crnt_size = verify_and_add_patch(family, fw, leftover);
 416                 if (crnt_size < 0)
 417                         return ret;
 418
 419                 fw       += crnt_size;
 420                 leftover -= crnt_size;
 421         }
 422
 423         return UCODE_OK;
 424 }
 425
 426 enum ucode_state load_microcode_amd(int cpu, u8 family, const u8 *data, size_t size)
 427 {
 428         enum ucode_state ret;
 429
 430         /* free old equiv table */
 431         free_equiv_cpu_table();
 432
 433         ret = __load_microcode_amd(family, data, size);
 434
 435         if (ret != UCODE_OK)
 436                 cleanup();
 437
 438 #if defined(CONFIG_MICROCODE_AMD_EARLY) && defined(CONFIG_X86_32)
 439         /* save BSP's matching patch for early load */
 440         if (cpu_data(cpu).cpu_index == boot_cpu_data.cpu_index) {
 441                 struct ucode_patch *p = find_patch(cpu);
 442                 if (p) {
 443                         memset(amd_ucode_patch, 0, PATCH_MAX_SIZE);
 444                         memcpy(amd_ucode_patch, p->data, min_t(u32, ksize(p->data),
 445                                                                PATCH_MAX_SIZE));
 446                 }
 447         }
 448 #endif
 449         return ret;
 450 }
 451
 452 /*
 453  * AMD microcode firmware naming convention, up to family 15h they are in
 454  * the legacy file:
 455  *
 456  *    amd-ucode/microcode_amd.bin
 457  *
 458  * This legacy file is always smaller than 2K in size.
 459  *
 460  * Beginning with family 15h, they are in family-specific firmware files:
 461  *
 462  *    amd-ucode/microcode_amd_fam15h.bin
 463  *    amd-ucode/microcode_amd_fam16h.bin
 464  *    ...
 465  *
 466  * These might be larger than 2K.
 467  */
 468 static enum ucode_state request_microcode_amd(int cpu, struct device *device,
 469                                               bool refresh_fw)
 470 {
 471         char fw_name[36] = "amd-ucode/microcode_amd.bin";
 472         struct cpuinfo_x86 *c = &cpu_data(cpu);
 473         enum ucode_state ret = UCODE_NFOUND;
 474         const struct firmware *fw;
 475
 476         /* reload ucode container only on the boot cpu */
 477         if (!refresh_fw || c->cpu_index != boot_cpu_data.cpu_index)
 478                 return UCODE_OK;
 479
 480         if (c->x86 >= 0x15)
 481                 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
 482
 483         if (request_firmware_direct(&fw, (const char *)fw_name, device)) {
 484                 pr_debug("failed to load file %s\n", fw_name);
 485                 goto out;
 486         }
 487
 488         ret = UCODE_ERROR;
 489         if (*(u32 *)fw->data != UCODE_MAGIC) {
 490                 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
 491                 goto fw_release;
 492         }
 493
 494         ret = load_microcode_amd(cpu, c->x86, fw->data, fw->size);
 495
 496  fw_release:
 497         release_firmware(fw);
 498
 499  out:
 500         return ret;
 501 }
 502
 503 static enum ucode_state
 504 request_microcode_user(int cpu, const void __user *buf, size_t size)
 505 {
 506         return UCODE_ERROR;
 507 }
 508
 509 static void microcode_fini_cpu_amd(int cpu)
 510 {
 511         struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
 512
 513         uci->mc = NULL;
 514 }
 515
 516 static struct microcode_ops microcode_amd_ops = {
 517         .request_microcode_user           = request_microcode_user,
 518         .request_microcode_fw             = request_microcode_amd,
 519         .collect_cpu_info                 = collect_cpu_info_amd,
 520         .apply_microcode                  = apply_microcode_amd,
 521         .microcode_fini_cpu               = microcode_fini_cpu_amd,
 522 };
 523
 524 struct microcode_ops * __init init_amd_microcode(void)
 525 {
 526         struct cpuinfo_x86 *c = &boot_cpu_data;
 527
 528         if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
 529                 pr_warning("AMD CPU family 0x%x not supported\n", c->x86);
 530                 return NULL;
 531         }
 532
 533         return &microcode_amd_ops;
 534 }
 535
 536 void __exit exit_amd_microcode(void)
 537 {
 538         cleanup();
 539 }