2 * Copyright (C) 2013 Advanced Micro Devices, Inc.
4 * Author: Jacob Shin <jacob.shin@amd.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License version 2 as
8 * published by the Free Software Foundation.
11 #include <linux/perf_event.h>
12 #include <linux/percpu.h>
13 #include <linux/types.h>
14 #include <linux/slab.h>
15 #include <linux/init.h>
16 #include <linux/cpu.h>
17 #include <linux/cpumask.h>
19 #include <asm/cpufeature.h>
20 #include <asm/perf_event.h>
23 #define NUM_COUNTERS_NB 4
24 #define NUM_COUNTERS_L2 4
25 #define MAX_COUNTERS NUM_COUNTERS_NB
27 #define RDPMC_BASE_NB 6
28 #define RDPMC_BASE_L2 10
30 #define COUNTER_SHIFT 16
39 cpumask_t *active_mask;
41 struct perf_event *events[MAX_COUNTERS];
42 struct amd_uncore *free_when_cpu_online;
45 static struct amd_uncore * __percpu *amd_uncore_nb;
46 static struct amd_uncore * __percpu *amd_uncore_l2;
48 static struct pmu amd_nb_pmu;
49 static struct pmu amd_l2_pmu;
51 static cpumask_t amd_nb_active_mask;
52 static cpumask_t amd_l2_active_mask;
54 static bool is_nb_event(struct perf_event *event)
56 return event->pmu->type == amd_nb_pmu.type;
59 static bool is_l2_event(struct perf_event *event)
61 return event->pmu->type == amd_l2_pmu.type;
64 static struct amd_uncore *event_to_amd_uncore(struct perf_event *event)
66 if (is_nb_event(event) && amd_uncore_nb)
67 return *per_cpu_ptr(amd_uncore_nb, event->cpu);
68 else if (is_l2_event(event) && amd_uncore_l2)
69 return *per_cpu_ptr(amd_uncore_l2, event->cpu);
74 static void amd_uncore_read(struct perf_event *event)
76 struct hw_perf_event *hwc = &event->hw;
81 * since we do not enable counter overflow interrupts,
82 * we do not have to worry about prev_count changing on us
85 prev = local64_read(&hwc->prev_count);
86 rdpmcl(hwc->event_base_rdpmc, new);
87 local64_set(&hwc->prev_count, new);
88 delta = (new << COUNTER_SHIFT) - (prev << COUNTER_SHIFT);
89 delta >>= COUNTER_SHIFT;
90 local64_add(delta, &event->count);
93 static void amd_uncore_start(struct perf_event *event, int flags)
95 struct hw_perf_event *hwc = &event->hw;
97 if (flags & PERF_EF_RELOAD)
98 wrmsrl(hwc->event_base, (u64)local64_read(&hwc->prev_count));
101 wrmsrl(hwc->config_base, (hwc->config | ARCH_PERFMON_EVENTSEL_ENABLE));
102 perf_event_update_userpage(event);
105 static void amd_uncore_stop(struct perf_event *event, int flags)
107 struct hw_perf_event *hwc = &event->hw;
109 wrmsrl(hwc->config_base, hwc->config);
110 hwc->state |= PERF_HES_STOPPED;
112 if ((flags & PERF_EF_UPDATE) && !(hwc->state & PERF_HES_UPTODATE)) {
113 amd_uncore_read(event);
114 hwc->state |= PERF_HES_UPTODATE;
118 static int amd_uncore_add(struct perf_event *event, int flags)
121 struct amd_uncore *uncore = event_to_amd_uncore(event);
122 struct hw_perf_event *hwc = &event->hw;
124 /* are we already assigned? */
125 if (hwc->idx != -1 && uncore->events[hwc->idx] == event)
128 for (i = 0; i < uncore->num_counters; i++) {
129 if (uncore->events[i] == event) {
135 /* if not, take the first available counter */
137 for (i = 0; i < uncore->num_counters; i++) {
138 if (cmpxchg(&uncore->events[i], NULL, event) == NULL) {
148 hwc->config_base = uncore->msr_base + (2 * hwc->idx);
149 hwc->event_base = uncore->msr_base + 1 + (2 * hwc->idx);
150 hwc->event_base_rdpmc = uncore->rdpmc_base + hwc->idx;
151 hwc->state = PERF_HES_UPTODATE | PERF_HES_STOPPED;
153 if (flags & PERF_EF_START)
154 amd_uncore_start(event, PERF_EF_RELOAD);
159 static void amd_uncore_del(struct perf_event *event, int flags)
162 struct amd_uncore *uncore = event_to_amd_uncore(event);
163 struct hw_perf_event *hwc = &event->hw;
165 amd_uncore_stop(event, PERF_EF_UPDATE);
167 for (i = 0; i < uncore->num_counters; i++) {
168 if (cmpxchg(&uncore->events[i], event, NULL) == event)
175 static int amd_uncore_event_init(struct perf_event *event)
177 struct amd_uncore *uncore;
178 struct hw_perf_event *hwc = &event->hw;
180 if (event->attr.type != event->pmu->type)
184 * NB and L2 counters (MSRs) are shared across all cores that share the
185 * same NB / L2 cache. Interrupts can be directed to a single target
186 * core, however, event counts generated by processes running on other
187 * cores cannot be masked out. So we do not support sampling and
190 if (is_sampling_event(event) || event->attach_state & PERF_ATTACH_TASK)
193 /* NB and L2 counters do not have usr/os/guest/host bits */
194 if (event->attr.exclude_user || event->attr.exclude_kernel ||
195 event->attr.exclude_host || event->attr.exclude_guest)
198 /* and we do not enable counter overflow interrupts */
199 hwc->config = event->attr.config & AMD64_RAW_EVENT_MASK_NB;
205 uncore = event_to_amd_uncore(event);
210 * since request can come in to any of the shared cores, we will remap
211 * to a single common cpu.
213 event->cpu = uncore->cpu;
218 static ssize_t amd_uncore_attr_show_cpumask(struct device *dev,
219 struct device_attribute *attr,
222 cpumask_t *active_mask;
223 struct pmu *pmu = dev_get_drvdata(dev);
225 if (pmu->type == amd_nb_pmu.type)
226 active_mask = &amd_nb_active_mask;
227 else if (pmu->type == amd_l2_pmu.type)
228 active_mask = &amd_l2_active_mask;
232 return cpumap_print_to_pagebuf(true, buf, active_mask);
234 static DEVICE_ATTR(cpumask, S_IRUGO, amd_uncore_attr_show_cpumask, NULL);
236 static struct attribute *amd_uncore_attrs[] = {
237 &dev_attr_cpumask.attr,
241 static struct attribute_group amd_uncore_attr_group = {
242 .attrs = amd_uncore_attrs,
245 PMU_FORMAT_ATTR(event, "config:0-7,32-35");
246 PMU_FORMAT_ATTR(umask, "config:8-15");
248 static struct attribute *amd_uncore_format_attr[] = {
249 &format_attr_event.attr,
250 &format_attr_umask.attr,
254 static struct attribute_group amd_uncore_format_group = {
256 .attrs = amd_uncore_format_attr,
259 static const struct attribute_group *amd_uncore_attr_groups[] = {
260 &amd_uncore_attr_group,
261 &amd_uncore_format_group,
265 static struct pmu amd_nb_pmu = {
266 .attr_groups = amd_uncore_attr_groups,
268 .event_init = amd_uncore_event_init,
269 .add = amd_uncore_add,
270 .del = amd_uncore_del,
271 .start = amd_uncore_start,
272 .stop = amd_uncore_stop,
273 .read = amd_uncore_read,
276 static struct pmu amd_l2_pmu = {
277 .attr_groups = amd_uncore_attr_groups,
279 .event_init = amd_uncore_event_init,
280 .add = amd_uncore_add,
281 .del = amd_uncore_del,
282 .start = amd_uncore_start,
283 .stop = amd_uncore_stop,
284 .read = amd_uncore_read,
287 static struct amd_uncore *amd_uncore_alloc(unsigned int cpu)
289 return kzalloc_node(sizeof(struct amd_uncore), GFP_KERNEL,
293 static int amd_uncore_cpu_up_prepare(unsigned int cpu)
295 struct amd_uncore *uncore_nb = NULL, *uncore_l2;
298 uncore_nb = amd_uncore_alloc(cpu);
301 uncore_nb->cpu = cpu;
302 uncore_nb->num_counters = NUM_COUNTERS_NB;
303 uncore_nb->rdpmc_base = RDPMC_BASE_NB;
304 uncore_nb->msr_base = MSR_F15H_NB_PERF_CTL;
305 uncore_nb->active_mask = &amd_nb_active_mask;
306 uncore_nb->pmu = &amd_nb_pmu;
307 *per_cpu_ptr(amd_uncore_nb, cpu) = uncore_nb;
311 uncore_l2 = amd_uncore_alloc(cpu);
314 uncore_l2->cpu = cpu;
315 uncore_l2->num_counters = NUM_COUNTERS_L2;
316 uncore_l2->rdpmc_base = RDPMC_BASE_L2;
317 uncore_l2->msr_base = MSR_F16H_L2I_PERF_CTL;
318 uncore_l2->active_mask = &amd_l2_active_mask;
319 uncore_l2->pmu = &amd_l2_pmu;
320 *per_cpu_ptr(amd_uncore_l2, cpu) = uncore_l2;
330 static struct amd_uncore *
331 amd_uncore_find_online_sibling(struct amd_uncore *this,
332 struct amd_uncore * __percpu *uncores)
335 struct amd_uncore *that;
337 for_each_online_cpu(cpu) {
338 that = *per_cpu_ptr(uncores, cpu);
346 if (this->id == that->id) {
347 that->free_when_cpu_online = this;
357 static void amd_uncore_cpu_starting(unsigned int cpu)
359 unsigned int eax, ebx, ecx, edx;
360 struct amd_uncore *uncore;
363 uncore = *per_cpu_ptr(amd_uncore_nb, cpu);
364 cpuid(0x8000001e, &eax, &ebx, &ecx, &edx);
365 uncore->id = ecx & 0xff;
367 uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_nb);
368 *per_cpu_ptr(amd_uncore_nb, cpu) = uncore;
372 unsigned int apicid = cpu_data(cpu).apicid;
373 unsigned int nshared;
375 uncore = *per_cpu_ptr(amd_uncore_l2, cpu);
376 cpuid_count(0x8000001d, 2, &eax, &ebx, &ecx, &edx);
377 nshared = ((eax >> 14) & 0xfff) + 1;
378 uncore->id = apicid - (apicid % nshared);
380 uncore = amd_uncore_find_online_sibling(uncore, amd_uncore_l2);
381 *per_cpu_ptr(amd_uncore_l2, cpu) = uncore;
385 static void uncore_online(unsigned int cpu,
386 struct amd_uncore * __percpu *uncores)
388 struct amd_uncore *uncore = *per_cpu_ptr(uncores, cpu);
390 kfree(uncore->free_when_cpu_online);
391 uncore->free_when_cpu_online = NULL;
393 if (cpu == uncore->cpu)
394 cpumask_set_cpu(cpu, uncore->active_mask);
397 static void amd_uncore_cpu_online(unsigned int cpu)
400 uncore_online(cpu, amd_uncore_nb);
403 uncore_online(cpu, amd_uncore_l2);
406 static void uncore_down_prepare(unsigned int cpu,
407 struct amd_uncore * __percpu *uncores)
410 struct amd_uncore *this = *per_cpu_ptr(uncores, cpu);
412 if (this->cpu != cpu)
415 /* this cpu is going down, migrate to a shared sibling if possible */
416 for_each_online_cpu(i) {
417 struct amd_uncore *that = *per_cpu_ptr(uncores, i);
423 perf_pmu_migrate_context(this->pmu, cpu, i);
424 cpumask_clear_cpu(cpu, that->active_mask);
425 cpumask_set_cpu(i, that->active_mask);
432 static void amd_uncore_cpu_down_prepare(unsigned int cpu)
435 uncore_down_prepare(cpu, amd_uncore_nb);
438 uncore_down_prepare(cpu, amd_uncore_l2);
441 static void uncore_dead(unsigned int cpu, struct amd_uncore * __percpu *uncores)
443 struct amd_uncore *uncore = *per_cpu_ptr(uncores, cpu);
445 if (cpu == uncore->cpu)
446 cpumask_clear_cpu(cpu, uncore->active_mask);
448 if (!--uncore->refcnt)
450 *per_cpu_ptr(uncores, cpu) = NULL;
453 static void amd_uncore_cpu_dead(unsigned int cpu)
456 uncore_dead(cpu, amd_uncore_nb);
459 uncore_dead(cpu, amd_uncore_l2);
463 amd_uncore_cpu_notifier(struct notifier_block *self, unsigned long action,
466 unsigned int cpu = (long)hcpu;
468 switch (action & ~CPU_TASKS_FROZEN) {
470 if (amd_uncore_cpu_up_prepare(cpu))
471 return notifier_from_errno(-ENOMEM);
475 amd_uncore_cpu_starting(cpu);
479 amd_uncore_cpu_online(cpu);
482 case CPU_DOWN_PREPARE:
483 amd_uncore_cpu_down_prepare(cpu);
486 case CPU_UP_CANCELED:
488 amd_uncore_cpu_dead(cpu);
498 static struct notifier_block amd_uncore_cpu_notifier_block = {
499 .notifier_call = amd_uncore_cpu_notifier,
500 .priority = CPU_PRI_PERF + 1,
503 static void __init init_cpu_already_online(void *dummy)
505 unsigned int cpu = smp_processor_id();
507 amd_uncore_cpu_starting(cpu);
508 amd_uncore_cpu_online(cpu);
511 static void cleanup_cpu_online(void *dummy)
513 unsigned int cpu = smp_processor_id();
515 amd_uncore_cpu_dead(cpu);
518 static int __init amd_uncore_init(void)
520 unsigned int cpu, cpu2;
523 if (boot_cpu_data.x86_vendor != X86_VENDOR_AMD)
526 if (!cpu_has_topoext)
529 if (cpu_has_perfctr_nb) {
530 amd_uncore_nb = alloc_percpu(struct amd_uncore *);
531 if (!amd_uncore_nb) {
535 ret = perf_pmu_register(&amd_nb_pmu, amd_nb_pmu.name, -1);
539 printk(KERN_INFO "perf: AMD NB counters detected\n");
543 if (cpu_has_perfctr_l2) {
544 amd_uncore_l2 = alloc_percpu(struct amd_uncore *);
545 if (!amd_uncore_l2) {
549 ret = perf_pmu_register(&amd_l2_pmu, amd_l2_pmu.name, -1);
553 printk(KERN_INFO "perf: AMD L2I counters detected\n");
560 cpu_notifier_register_begin();
562 /* init cpus already online before registering for hotplug notifier */
563 for_each_online_cpu(cpu) {
564 ret = amd_uncore_cpu_up_prepare(cpu);
567 smp_call_function_single(cpu, init_cpu_already_online, NULL, 1);
570 __register_cpu_notifier(&amd_uncore_cpu_notifier_block);
571 cpu_notifier_register_done();
577 for_each_online_cpu(cpu2) {
580 smp_call_function_single(cpu, cleanup_cpu_online, NULL, 1);
582 cpu_notifier_register_done();
584 /* amd_uncore_nb/l2 should have been freed by cleanup_cpu_online */
585 amd_uncore_nb = amd_uncore_l2 = NULL;
586 if (cpu_has_perfctr_l2)
587 perf_pmu_unregister(&amd_l2_pmu);
589 if (cpu_has_perfctr_nb)
590 perf_pmu_unregister(&amd_nb_pmu);
592 free_percpu(amd_uncore_l2);
595 free_percpu(amd_uncore_nb);
600 device_initcall(amd_uncore_init);