2 * xsave/xrstor support.
4 * Author: Suresh Siddha <suresh.b.siddha@intel.com>
6 #include <linux/compat.h>
9 #include <asm/fpu/api.h>
10 #include <asm/fpu/internal.h>
11 #include <asm/fpu/signal.h>
12 #include <asm/fpu/regset.h>
14 #include <asm/tlbflush.h>
16 static const char *xfeature_names[] =
18 "x87 floating point registers" ,
21 "MPX bounds registers" ,
26 "unknown xstate feature" ,
30 * Mask of xstate features supported by the CPU and the kernel:
32 u64 xfeatures_mask __read_mostly;
34 static unsigned int xstate_offsets[XFEATURES_NR_MAX], xstate_sizes[XFEATURES_NR_MAX];
35 static unsigned int xstate_comp_offsets[sizeof(xfeatures_mask)*8];
37 /* The number of supported xfeatures in xfeatures_mask: */
38 static unsigned int xfeatures_nr;
41 * Return whether the system supports a given xfeature.
43 * Also return the name of the (most advanced) feature that the caller requested:
45 int cpu_has_xfeatures(u64 xfeatures_needed, const char **feature_name)
47 u64 xfeatures_missing = xfeatures_needed & ~xfeatures_mask;
49 if (unlikely(feature_name)) {
50 long xfeature_idx, max_idx;
53 * So we use FLS here to be able to print the most advanced
54 * feature that was requested but is missing. So if a driver
55 * asks about "XSTATE_SSE | XSTATE_YMM" we'll print the
56 * missing AVX feature - this is the most informative message
59 if (xfeatures_missing)
60 xfeatures_print = xfeatures_missing;
62 xfeatures_print = xfeatures_needed;
64 xfeature_idx = fls64(xfeatures_print)-1;
65 max_idx = ARRAY_SIZE(xfeature_names)-1;
66 xfeature_idx = min(xfeature_idx, max_idx);
68 *feature_name = xfeature_names[xfeature_idx];
71 if (xfeatures_missing)
76 EXPORT_SYMBOL_GPL(cpu_has_xfeatures);
79 * When executing XSAVEOPT (or other optimized XSAVE instructions), if
80 * a processor implementation detects that an FPU state component is still
81 * (or is again) in its initialized state, it may clear the corresponding
82 * bit in the header.xfeatures field, and can skip the writeout of registers
83 * to the corresponding memory layout.
85 * This means that when the bit is zero, the state component might still contain
86 * some previous - non-initialized register state.
88 * Before writing xstate information to user-space we sanitize those components,
89 * to always ensure that the memory layout of a feature will be in the init state
90 * if the corresponding header bit is zero. This is to ensure that user-space doesn't
91 * see some stale state in the memory layout during signal handling, debugging etc.
93 void fpstate_sanitize_xstate(struct fpu *fpu)
95 struct fxregs_state *fx = &fpu->state.fxsave;
102 xfeatures = fpu->state.xsave.header.xfeatures;
105 * None of the feature bits are in init state. So nothing else
106 * to do for us, as the memory layout is up to date.
108 if ((xfeatures & xfeatures_mask) == xfeatures_mask)
112 * FP is in init state
114 if (!(xfeatures & XSTATE_FP)) {
121 memset(&fx->st_space[0], 0, 128);
125 * SSE is in init state
127 if (!(xfeatures & XSTATE_SSE))
128 memset(&fx->xmm_space[0], 0, 256);
131 * First two features are FPU and SSE, which above we handled
132 * in a special way already:
135 xfeatures = (xfeatures_mask & ~xfeatures) >> 2;
138 * Update all the remaining memory layouts according to their
139 * standard xstate layout, if their header bit is in the init
143 if (xfeatures & 0x1) {
144 int offset = xstate_offsets[feature_bit];
145 int size = xstate_sizes[feature_bit];
147 memcpy((void *)fx + offset,
148 (void *)&init_fpstate.xsave + offset,
158 * Enable the extended processor state save/restore feature.
159 * Called once per CPU onlining.
161 void fpu__init_cpu_xstate(void)
163 if (!cpu_has_xsave || !xfeatures_mask)
166 cr4_set_bits(X86_CR4_OSXSAVE);
167 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
171 * Record the offsets and sizes of various xstates contained
172 * in the XSAVE state memory layout.
174 * ( Note that certain features might be non-present, for them
175 * we'll have 0 offset and 0 size. )
177 static void __init setup_xstate_features(void)
179 u32 eax, ebx, ecx, edx, leaf;
181 xfeatures_nr = fls64(xfeatures_mask);
183 for (leaf = 2; leaf < xfeatures_nr; leaf++) {
184 cpuid_count(XSTATE_CPUID, leaf, &eax, &ebx, &ecx, &edx);
186 xstate_offsets[leaf] = ebx;
187 xstate_sizes[leaf] = eax;
189 printk(KERN_INFO "x86/fpu: xstate_offset[%d]: %04x, xstate_sizes[%d]: %04x\n", leaf, ebx, leaf, eax);
194 static void __init print_xstate_feature(u64 xstate_mask)
196 const char *feature_name;
198 if (cpu_has_xfeatures(xstate_mask, &feature_name))
199 pr_info("x86/fpu: Supporting XSAVE feature 0x%02Lx: '%s'\n", xstate_mask, feature_name);
203 * Print out all the supported xstate features:
205 static void __init print_xstate_features(void)
207 print_xstate_feature(XSTATE_FP);
208 print_xstate_feature(XSTATE_SSE);
209 print_xstate_feature(XSTATE_YMM);
210 print_xstate_feature(XSTATE_BNDREGS);
211 print_xstate_feature(XSTATE_BNDCSR);
212 print_xstate_feature(XSTATE_OPMASK);
213 print_xstate_feature(XSTATE_ZMM_Hi256);
214 print_xstate_feature(XSTATE_Hi16_ZMM);
218 * This function sets up offsets and sizes of all extended states in
219 * xsave area. This supports both standard format and compacted format
220 * of the xsave aread.
222 static void __init setup_xstate_comp(void)
224 unsigned int xstate_comp_sizes[sizeof(xfeatures_mask)*8];
228 * The FP xstates and SSE xstates are legacy states. They are always
229 * in the fixed offsets in the xsave area in either compacted form
232 xstate_comp_offsets[0] = 0;
233 xstate_comp_offsets[1] = offsetof(struct fxregs_state, xmm_space);
235 if (!cpu_has_xsaves) {
236 for (i = 2; i < xfeatures_nr; i++) {
237 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
238 xstate_comp_offsets[i] = xstate_offsets[i];
239 xstate_comp_sizes[i] = xstate_sizes[i];
245 xstate_comp_offsets[2] = FXSAVE_SIZE + XSAVE_HDR_SIZE;
247 for (i = 2; i < xfeatures_nr; i++) {
248 if (test_bit(i, (unsigned long *)&xfeatures_mask))
249 xstate_comp_sizes[i] = xstate_sizes[i];
251 xstate_comp_sizes[i] = 0;
254 xstate_comp_offsets[i] = xstate_comp_offsets[i-1]
255 + xstate_comp_sizes[i-1];
261 * setup the xstate image representing the init state
263 static void __init setup_init_fpu_buf(void)
265 static int on_boot_cpu = 1;
267 WARN_ON_FPU(!on_boot_cpu);
273 setup_xstate_features();
274 print_xstate_features();
276 if (cpu_has_xsaves) {
277 init_fpstate.xsave.header.xcomp_bv = (u64)1 << 63 | xfeatures_mask;
278 init_fpstate.xsave.header.xfeatures = xfeatures_mask;
282 * Init all the features state with header_bv being 0x0
284 copy_kernel_to_xregs_booting(&init_fpstate.xsave);
287 * Dump the init state again. This is to identify the init state
288 * of any feature which is not represented by all zero's.
290 copy_xregs_to_kernel_booting(&init_fpstate.xsave);
294 * Calculate total size of enabled xstates in XCR0/xfeatures_mask.
296 static void __init init_xstate_size(void)
298 unsigned int eax, ebx, ecx, edx;
301 if (!cpu_has_xsaves) {
302 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
307 xstate_size = FXSAVE_SIZE + XSAVE_HDR_SIZE;
308 for (i = 2; i < 64; i++) {
309 if (test_bit(i, (unsigned long *)&xfeatures_mask)) {
310 cpuid_count(XSTATE_CPUID, i, &eax, &ebx, &ecx, &edx);
317 * Enable and initialize the xsave feature.
318 * Called once per system bootup.
320 void __init fpu__init_system_xstate(void)
322 unsigned int eax, ebx, ecx, edx;
323 static int on_boot_cpu = 1;
325 WARN_ON_FPU(!on_boot_cpu);
328 if (!cpu_has_xsave) {
329 pr_info("x86/fpu: Legacy x87 FPU detected.\n");
333 if (boot_cpu_data.cpuid_level < XSTATE_CPUID) {
338 cpuid_count(XSTATE_CPUID, 0, &eax, &ebx, &ecx, &edx);
339 xfeatures_mask = eax + ((u64)edx << 32);
341 if ((xfeatures_mask & XSTATE_FPSSE) != XSTATE_FPSSE) {
342 pr_err("x86/fpu: FP/SSE not present amongst the CPU's xstate features: 0x%llx.\n", xfeatures_mask);
346 /* Support only the state known to the OS: */
347 xfeatures_mask = xfeatures_mask & XCNTXT_MASK;
349 /* Enable xstate instructions to be able to continue with initialization: */
350 fpu__init_cpu_xstate();
352 /* Recompute the context size for enabled features: */
355 update_regset_xstate_info(xstate_size, xfeatures_mask);
356 fpu__init_prepare_fx_sw_frame();
357 setup_init_fpu_buf();
360 pr_info("x86/fpu: Enabled xstate features 0x%llx, context size is 0x%x bytes, using '%s' format.\n",
363 cpu_has_xsaves ? "compacted" : "standard");
367 * Restore minimal FPU state after suspend:
369 void fpu__resume_cpu(void)
372 * Restore XCR0 on xsave capable CPUs:
375 xsetbv(XCR_XFEATURE_ENABLED_MASK, xfeatures_mask);
379 * Given the xsave area and a state inside, this function returns the
380 * address of the state.
382 * This is the API that is called to get xstate address in either
383 * standard format or compacted format of xsave area.
385 * Note that if there is no data for the field in the xsave buffer
386 * this will return NULL.
389 * xstate: the thread's storage area for all FPU data
390 * xstate_feature: state which is defined in xsave.h (e.g.
391 * XSTATE_FP, XSTATE_SSE, etc...)
393 * address of the state in the xsave area, or NULL if the
394 * field is not present in the xsave buffer.
396 void *get_xsave_addr(struct xregs_state *xsave, int xstate_feature)
398 int feature_nr = fls64(xstate_feature) - 1;
400 * Do we even *have* xsave state?
402 if (!boot_cpu_has(X86_FEATURE_XSAVE))
405 xsave = ¤t->thread.fpu.state.xsave;
407 * We should not ever be requesting features that we
408 * have not enabled. Remember that pcntxt_mask is
409 * what we write to the XCR0 register.
411 WARN_ONCE(!(xfeatures_mask & xstate_feature),
412 "get of unsupported state");
414 * This assumes the last 'xsave*' instruction to
415 * have requested that 'xstate_feature' be saved.
416 * If it did not, we might be seeing and old value
417 * of the field in the buffer.
419 * This can happen because the last 'xsave' did not
420 * request that this feature be saved (unlikely)
421 * or because the "init optimization" caused it
424 if (!(xsave->header.xfeatures & xstate_feature))
427 return (void *)xsave + xstate_comp_offsets[feature_nr];
429 EXPORT_SYMBOL_GPL(get_xsave_addr);