3 * Copyright (C) 1991, 1992 Linus Torvalds
5 * Enhanced CPU detection and feature setting code by Mike Jagdis
6 * and Martin Mares, November 1997.
10 #include <linux/threads.h>
11 #include <linux/init.h>
12 #include <linux/linkage.h>
13 #include <asm/segment.h>
14 #include <asm/page_types.h>
15 #include <asm/pgtable_types.h>
16 #include <asm/cache.h>
17 #include <asm/thread_info.h>
18 #include <asm/asm-offsets.h>
19 #include <asm/setup.h>
20 #include <asm/processor-flags.h>
21 #include <asm/msr-index.h>
22 #include <asm/cpufeature.h>
23 #include <asm/percpu.h>
25 /* Physical address */
26 #define pa(X) ((X) - __PAGE_OFFSET)
29 * References to members of the new_cpu_data structure.
32 #define X86 new_cpu_data+CPUINFO_x86
33 #define X86_VENDOR new_cpu_data+CPUINFO_x86_vendor
34 #define X86_MODEL new_cpu_data+CPUINFO_x86_model
35 #define X86_MASK new_cpu_data+CPUINFO_x86_mask
36 #define X86_HARD_MATH new_cpu_data+CPUINFO_hard_math
37 #define X86_CPUID new_cpu_data+CPUINFO_cpuid_level
38 #define X86_CAPABILITY new_cpu_data+CPUINFO_x86_capability
39 #define X86_VENDOR_ID new_cpu_data+CPUINFO_x86_vendor_id
42 * This is how much memory in addition to the memory covered up to
43 * and including _end we need mapped initially.
45 * (KERNEL_IMAGE_SIZE/4096) / 1024 pages (worst case, non PAE)
46 * (KERNEL_IMAGE_SIZE/4096) / 512 + 4 pages (worst case for PAE)
48 * Modulo rounding, each megabyte assigned here requires a kilobyte of
49 * memory, which is currently unreclaimed.
51 * This should be a multiple of a page.
53 * KERNEL_IMAGE_SIZE should be greater than pa(_end)
54 * and small than max_low_pfn, otherwise will waste some page table entries
58 #define PAGE_TABLE_SIZE(pages) (((pages) / PTRS_PER_PMD) + PTRS_PER_PGD)
60 #define PAGE_TABLE_SIZE(pages) ((pages) / PTRS_PER_PGD)
63 /* Number of possible pages in the lowmem region */
64 LOWMEM_PAGES = (((1<<32) - __PAGE_OFFSET) >> PAGE_SHIFT)
66 /* Enough space to fit pagetables for the low memory linear map */
67 MAPPING_BEYOND_END = PAGE_TABLE_SIZE(LOWMEM_PAGES) << PAGE_SHIFT
70 * Worst-case size of the kernel mapping we need to make:
71 * a relocatable kernel can live anywhere in lowmem, so we need to be able
72 * to map all of lowmem.
74 KERNEL_PAGES = LOWMEM_PAGES
76 INIT_MAP_SIZE = PAGE_TABLE_SIZE(KERNEL_PAGES) * PAGE_SIZE_asm
77 RESERVE_BRK(pagetables, INIT_MAP_SIZE)
80 * 32-bit kernel entrypoint; only used by the boot CPU. On entry,
81 * %esi points to the real-mode code as a 32-bit pointer.
82 * CS and DS must be 4 GB flat segments, but we don't depend on
83 * any particular GDT layout, because we load our own as soon as we
88 /* test KEEP_SEGMENTS flag to see if the bootloader is asking
89 us to not reload segments */
90 testb $(1<<6), BP_loadflags(%esi)
94 * Set segments to known values.
96 lgdt pa(boot_gdt_descr)
97 movl $(__BOOT_DS),%eax
105 * Clear BSS first so that there are no surprises...
109 movl $pa(__bss_start),%edi
110 movl $pa(__bss_stop),%ecx
115 * Copy bootup parameters out of the way.
116 * Note: %esi still has the pointer to the real-mode data.
117 * With the kexec as boot loader, parameter segment might be loaded beyond
118 * kernel image and might not even be addressable by early boot page tables.
119 * (kexec on panic case). Hence copy out the parameters before initializing
122 movl $pa(boot_params),%edi
123 movl $(PARAM_SIZE/4),%ecx
127 movl pa(boot_params) + NEW_CL_POINTER,%esi
129 jz 1f # No command line
130 movl $pa(boot_command_line),%edi
131 movl $(COMMAND_LINE_SIZE/4),%ecx
136 #ifdef CONFIG_OLPC_OPENFIRMWARE
137 /* save OFW's pgdir table for later use when calling into OFW */
139 movl %eax, pa(olpc_ofw_pgd)
143 * Initialize page tables. This creates a PDE and a set of page
144 * tables, which are located immediately beyond __brk_base. The variable
145 * _brk_end is set up to point to the first "safe" location.
146 * Mappings are created both at virtual address 0 (identity mapping)
147 * and PAGE_OFFSET for up to _end.
149 * Note that the stack is not yet set up!
151 #ifdef CONFIG_X86_PAE
154 * In PAE mode initial_page_table is statically defined to contain
155 * enough entries to cover the VMSPLIT option (that is the top 1, 2 or 3
156 * entries). The identity mapping is handled by pointing two PGD entries
157 * to the first kernel PMD.
159 * Note the upper half of each PMD or PTE are always zero at this stage.
162 #define KPMDS (((-__PAGE_OFFSET) >> 30) & 3) /* Number of kernel PMDs */
164 xorl %ebx,%ebx /* %ebx is kept at zero */
166 movl $pa(__brk_base), %edi
167 movl $pa(initial_pg_pmd), %edx
168 movl $PTE_IDENT_ATTR, %eax
170 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PMD entry */
171 movl %ecx,(%edx) /* Store PMD entry */
172 /* Upper half already zero */
184 * End condition: we must map up to the end + MAPPING_BEYOND_END.
186 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
190 addl $__PAGE_OFFSET, %edi
191 movl %edi, pa(_brk_end)
193 movl %eax, pa(max_pfn_mapped)
195 /* Do early initialization of the fixmap area */
196 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
197 movl %eax,pa(initial_pg_pmd+0x1000*KPMDS-8)
200 page_pde_offset = (__PAGE_OFFSET >> 20);
202 movl $pa(__brk_base), %edi
203 movl $pa(initial_page_table), %edx
204 movl $PTE_IDENT_ATTR, %eax
206 leal PDE_IDENT_ATTR(%edi),%ecx /* Create PDE entry */
207 movl %ecx,(%edx) /* Store identity PDE entry */
208 movl %ecx,page_pde_offset(%edx) /* Store kernel PDE entry */
216 * End condition: we must map up to the end + MAPPING_BEYOND_END.
218 movl $pa(_end) + MAPPING_BEYOND_END + PTE_IDENT_ATTR, %ebp
221 addl $__PAGE_OFFSET, %edi
222 movl %edi, pa(_brk_end)
224 movl %eax, pa(max_pfn_mapped)
226 /* Do early initialization of the fixmap area */
227 movl $pa(initial_pg_fixmap)+PDE_IDENT_ATTR,%eax
228 movl %eax,pa(initial_page_table+0xffc)
231 #ifdef CONFIG_PARAVIRT
232 /* This is can only trip for a broken bootloader... */
233 cmpw $0x207, pa(boot_params + BP_version)
236 /* Paravirt-compatible boot parameters. Look to see what architecture
237 we're booting under. */
238 movl pa(boot_params + BP_hardware_subarch), %eax
239 cmpl $num_subarch_entries, %eax
242 movl pa(subarch_entries)(,%eax,4), %eax
243 subl $__PAGE_OFFSET, %eax
249 /* Unknown implementation; there's really
250 nothing we can do at this point. */
256 .long default_entry /* normal x86/PC */
257 .long lguest_entry /* lguest hypervisor */
258 .long xen_entry /* Xen hypervisor */
259 .long default_entry /* Moorestown MID */
260 num_subarch_entries = (. - subarch_entries) / 4
264 #endif /* CONFIG_PARAVIRT */
267 * Non-boot CPU entry point; entered from trampoline.S
268 * We can't lgdt here, because lgdt itself uses a data segment, but
269 * we know the trampoline has already loaded the boot_gdt for us.
271 * If cpu hotplug is not supported then this code can go in init section
272 * which will be freed later
278 ENTRY(startup_32_smp)
280 movl $(__BOOT_DS),%eax
285 #endif /* CONFIG_SMP */
289 * New page tables may be in 4Mbyte page mode and may
290 * be using the global pages.
292 * NOTE! If we are on a 486 we may have no cr4 at all!
293 * So we do not try to touch it unless we really have
294 * some bits in it to set. This won't work if the BSP
295 * implements cr4 but this AP does not -- very unlikely
296 * but be warned! The same applies to the pse feature
297 * if not equally supported. --macro
299 * NOTE! We have to correct for the fact that we're
300 * not yet offset PAGE_OFFSET..
302 #define cr4_bits pa(mmu_cr4_features)
306 movl %cr4,%eax # Turn on paging options (PSE,PAE,..)
310 testb $X86_CR4_PAE, %al # check if PAE is enabled
313 /* Check if extended functions are implemented */
314 movl $0x80000000, %eax
316 /* Value must be in the range 0x80000001 to 0x8000ffff */
317 subl $0x80000001, %eax
318 cmpl $(0x8000ffff-0x80000001), %eax
321 /* Clear bogus XD_DISABLE bits */
324 mov $0x80000001, %eax
326 /* Execute Disable bit supported? */
327 btl $(X86_FEATURE_NX & 31), %edx
330 /* Setup EFER (Extended Feature Enable Register) */
335 /* Make changes effective */
343 movl $pa(initial_page_table), %eax
344 movl %eax,%cr3 /* set the page table pointer.. */
347 movl %eax,%cr0 /* ..and set paging (PG) bit */
348 ljmp $__BOOT_CS,$1f /* Clear prefetch and normalize %eip */
350 /* Set up the stack pointer */
354 * Initialize eflags. Some BIOS's leave bits like NT set. This would
355 * confuse the debugger if this code is traced.
356 * XXX - best to initialize before switching to protected mode.
363 jz 1f /* Initial CPU cleans BSS */
366 #endif /* CONFIG_SMP */
369 * start system 32-bit setup. We need to re-do some of the things done
370 * in 16-bit mode for the "real" operations.
376 movl $-1,X86_CPUID # -1 for no CPUID initially
378 /* check if it is 486 or 386. */
380 * XXX - this does a lot of unnecessary setup. Alignment checks don't
381 * apply at our cpl of 0 and the stack ought to be aligned already, and
382 * we don't need to preserve eflags.
385 movb $3,X86 # at least 386
387 popl %eax # get EFLAGS
388 movl %eax,%ecx # save original EFLAGS
389 xorl $0x240000,%eax # flip AC and ID bits in EFLAGS
390 pushl %eax # copy to EFLAGS
392 pushfl # get new EFLAGS
393 popl %eax # put it in eax
394 xorl %ecx,%eax # change in flags
395 pushl %ecx # restore original EFLAGS
397 testl $0x40000,%eax # check if AC bit changed
400 movb $4,X86 # at least 486
401 testl $0x200000,%eax # check if ID bit changed
404 /* get vendor info */
405 xorl %eax,%eax # call CPUID with 0 -> return vendor ID
407 movl %eax,X86_CPUID # save CPUID level
408 movl %ebx,X86_VENDOR_ID # lo 4 chars
409 movl %edx,X86_VENDOR_ID+4 # next 4 chars
410 movl %ecx,X86_VENDOR_ID+8 # last 4 chars
412 orl %eax,%eax # do we have processor info as well?
415 movl $1,%eax # Use the CPUID instruction to get CPU type
417 movb %al,%cl # save reg for future use
418 andb $0x0f,%ah # mask processor family
420 andb $0xf0,%al # mask model
423 andb $0x0f,%cl # mask mask revision
425 movl %edx,X86_CAPABILITY
427 is486: movl $0x50022,%ecx # set AM, WP, NE and MP
430 is386: movl $2,%ecx # set MP
432 andl $0x80000011,%eax # Save PG,PE,ET
439 ljmp $(__KERNEL_CS),$1f
440 1: movl $(__KERNEL_DS),%eax # reload all the segment registers
441 movl %eax,%ss # after changing gdt.
443 movl $(__USER_DS),%eax # DS/ES contains default USER segment
447 movl $(__KERNEL_PERCPU), %eax
448 movl %eax,%fs # set this cpu's percpu
450 #ifdef CONFIG_CC_STACKPROTECTOR
452 * The linker can't handle this by relocation. Manually set
453 * base address in stack canary segment descriptor.
458 movl $stack_canary,%ecx
459 movw %cx, 8 * GDT_ENTRY_STACK_CANARY + 2(%eax)
461 movb %cl, 8 * GDT_ENTRY_STACK_CANARY + 4(%eax)
462 movb %ch, 8 * GDT_ENTRY_STACK_CANARY + 7(%eax)
465 movl $(__KERNEL_STACK_CANARY),%eax
468 xorl %eax,%eax # Clear LDT
471 cld # gcc2 wants the direction flag cleared at all times
472 pushl $0 # fake return address for unwinder
476 cmpb $0,%cl # the first CPU calls start_kernel
478 movl (stack_start), %esp
480 #endif /* CONFIG_SMP */
484 * We depend on ET to be correct. This checks for 287/387.
487 movb $0,X86_HARD_MATH
493 movl %cr0,%eax /* no coprocessor: have to set bits */
494 xorl $4,%eax /* set EM */
498 1: movb $1,X86_HARD_MATH
499 .byte 0xDB,0xE4 /* fsetpm for 287, ignored by 387 */
505 * sets up a idt with 256 entries pointing to
506 * ignore_int, interrupt gates. It doesn't actually load
507 * idt - that can be done only after paging has been enabled
508 * and the kernel moved to PAGE_OFFSET. Interrupts
509 * are enabled elsewhere, when we can be relatively
510 * sure everything is ok.
512 * Warning: %esi is live across this function.
516 movl $(__KERNEL_CS << 16),%eax
517 movw %dx,%ax /* selector = 0x0010 = cs */
518 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
529 .macro set_early_handler handler,trapno
531 movl $(__KERNEL_CS << 16),%eax
533 movw $0x8E00,%dx /* interrupt gate - dpl=0, present */
535 movl %eax,8*\trapno(%edi)
536 movl %edx,8*\trapno+4(%edi)
539 set_early_handler handler=early_divide_err,trapno=0
540 set_early_handler handler=early_illegal_opcode,trapno=6
541 set_early_handler handler=early_protection_fault,trapno=13
542 set_early_handler handler=early_page_fault,trapno=14
548 pushl $0 /* fake errcode */
551 early_illegal_opcode:
553 pushl $0 /* fake errcode */
556 early_protection_fault:
568 movl $(__KERNEL_DS),%eax
571 cmpl $2,early_recursion_flag
573 incl early_recursion_flag
576 pushl %edx /* trapno */
585 /* This is the default interrupt "handler" :-) */
595 movl $(__KERNEL_DS),%eax
598 cmpl $2,early_recursion_flag
600 incl early_recursion_flag
619 #include "verify_cpu.S"
624 .long i386_start_kernel
631 #ifdef CONFIG_X86_PAE
635 ENTRY(initial_page_table)
640 ENTRY(empty_zero_page)
642 ENTRY(swapper_pg_dir)
646 * This starts the data section.
648 #ifdef CONFIG_X86_PAE
650 /* Page-aligned for the benefit of paravirt? */
652 ENTRY(initial_page_table)
653 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0 /* low identity map */
655 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
656 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
657 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x2000),0
660 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
661 .long pa(initial_pg_pmd+PGD_IDENT_ATTR+0x1000),0
665 .long pa(initial_pg_pmd+PGD_IDENT_ATTR),0
667 # error "Kernel PMDs should be 1, 2 or 3"
669 .align PAGE_SIZE_asm /* needs to be page-sized too */
674 .long init_thread_union+THREAD_SIZE
679 early_recursion_flag:
683 .asciz "Unknown interrupt or fault at: %p %p %p\n"
687 .ascii "BUG: Int %d: CR2 %p\n"
689 .ascii " EDI %p ESI %p EBP %p ESP %p\n"
690 .ascii " EBX %p EDX %p ECX %p EAX %p\n"
692 .ascii " err %p EIP %p CS %p flg %p\n"
693 .ascii "Stack: %p %p %p %p %p %p %p %p\n"
694 .ascii " %p %p %p %p %p %p %p %p\n"
695 .asciz " %p %p %p %p %p %p %p %p\n"
697 #include "../../x86/xen/xen-head.S"
700 * The IDT and GDT 'descriptors' are a strange 48-bit object
701 * only used by the lidt and lgdt instructions. They are not
702 * like usual segment descriptors - they consist of a 16-bit
703 * segment size, and 32-bit linear address value:
706 .globl boot_gdt_descr
710 # early boot GDT descriptor (must use 1:1 address mapping)
711 .word 0 # 32 bit align gdt_desc.address
714 .long boot_gdt - __PAGE_OFFSET
716 .word 0 # 32-bit align idt_desc.address
718 .word IDT_ENTRIES*8-1 # idt contains 256 entries
721 # boot GDT descriptor (later on used by CPU#0):
722 .word 0 # 32 bit align gdt_desc.address
723 ENTRY(early_gdt_descr)
724 .word GDT_ENTRIES*8-1
725 .long gdt_page /* Overwritten for secondary CPUs */
728 * The boot_gdt must mirror the equivalent in setup.S and is
729 * used only for booting.
731 .align L1_CACHE_BYTES
733 .fill GDT_ENTRY_BOOT_CS,8,0
734 .quad 0x00cf9a000000ffff /* kernel 4GB code at 0x00000000 */
735 .quad 0x00cf92000000ffff /* kernel 4GB data at 0x00000000 */