2 * AMD CPU Microcode Update Driver for Linux
3 * Copyright (C) 2008 Advanced Micro Devices Inc.
5 * Author: Peter Oruba <peter.oruba@amd.com>
8 * Tigran Aivazian <tigran@aivazian.fsnet.co.uk>
10 * This driver allows to upgrade microcode on AMD
11 * family 0x10 and 0x11 processors.
13 * Licensed under the terms of the GNU General Public
14 * License version 2. See file COPYING for details.
17 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
19 #include <linux/firmware.h>
20 #include <linux/pci_ids.h>
21 #include <linux/uaccess.h>
22 #include <linux/vmalloc.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/pci.h>
27 #include <asm/microcode.h>
28 #include <asm/processor.h>
31 MODULE_DESCRIPTION("AMD Microcode Update Driver");
32 MODULE_AUTHOR("Peter Oruba");
33 MODULE_LICENSE("GPL v2");
35 #define UCODE_MAGIC 0x00414d44
36 #define UCODE_EQUIV_CPU_TABLE_TYPE 0x00000000
37 #define UCODE_UCODE_TYPE 0x00000001
39 struct equiv_cpu_entry {
41 u32 fixed_errata_mask;
42 u32 fixed_errata_compare;
45 } __attribute__((packed));
47 struct microcode_header_amd {
53 u32 mc_patch_data_checksum;
62 } __attribute__((packed));
64 struct microcode_amd {
65 struct microcode_header_amd hdr;
69 #define SECTION_HDR_SIZE 8
70 #define CONTAINER_HDR_SZ 12
72 static struct equiv_cpu_entry *equiv_cpu_table;
74 static int collect_cpu_info_amd(int cpu, struct cpu_signature *csig)
76 struct cpuinfo_x86 *c = &cpu_data(cpu);
78 if (c->x86_vendor != X86_VENDOR_AMD || c->x86 < 0x10) {
79 pr_warning("CPU%d: family %d not supported\n", cpu, c->x86);
83 csig->rev = c->microcode;
84 pr_info("CPU%d: patch_level=0x%08x\n", cpu, csig->rev);
89 static int get_matching_microcode(int cpu, struct microcode_header_amd *mc_hdr,
92 unsigned int current_cpu_id;
96 BUG_ON(equiv_cpu_table == NULL);
97 current_cpu_id = cpuid_eax(0x00000001);
99 while (equiv_cpu_table[i].installed_cpu != 0) {
100 if (current_cpu_id == equiv_cpu_table[i].installed_cpu) {
101 equiv_cpu_id = equiv_cpu_table[i].equiv_cpu;
110 if (mc_hdr->processor_rev_id != equiv_cpu_id)
113 /* ucode might be chipset specific -- currently we don't support this */
114 if (mc_hdr->nb_dev_id || mc_hdr->sb_dev_id) {
115 pr_err("CPU%d: chipset specific code not yet supported\n",
120 if (mc_hdr->patch_id <= rev)
126 static int apply_microcode_amd(int cpu)
129 int cpu_num = raw_smp_processor_id();
130 struct ucode_cpu_info *uci = ucode_cpu_info + cpu_num;
131 struct microcode_amd *mc_amd = uci->mc;
132 struct cpuinfo_x86 *c = &cpu_data(cpu);
134 /* We should bind the task to the CPU */
135 BUG_ON(cpu_num != cpu);
140 wrmsrl(MSR_AMD64_PATCH_LOADER, (u64)(long)&mc_amd->hdr.data_code);
141 /* get patch id after patching */
142 rdmsr(MSR_AMD64_PATCH_LEVEL, rev, dummy);
144 /* check current patch id and patch's id for match */
145 if (rev != mc_amd->hdr.patch_id) {
146 pr_err("CPU%d: update failed for patch_level=0x%08x\n",
147 cpu, mc_amd->hdr.patch_id);
151 pr_info("CPU%d: new patch_level=0x%08x\n", cpu, rev);
152 uci->cpu_sig.rev = rev;
158 static unsigned int verify_ucode_size(int cpu, const u8 *buf, unsigned int size)
160 struct cpuinfo_x86 *c = &cpu_data(cpu);
161 u32 max_size, actual_size;
163 #define F1XH_MPB_MAX_SIZE 2048
164 #define F14H_MPB_MAX_SIZE 1824
165 #define F15H_MPB_MAX_SIZE 4096
166 #define F16H_MPB_MAX_SIZE 3458
170 max_size = F14H_MPB_MAX_SIZE;
173 max_size = F15H_MPB_MAX_SIZE;
176 max_size = F16H_MPB_MAX_SIZE;
179 max_size = F1XH_MPB_MAX_SIZE;
183 actual_size = *(u32 *)(buf + 4);
185 if (actual_size + SECTION_HDR_SIZE > size || actual_size > max_size) {
186 pr_err("section size mismatch\n");
193 static struct microcode_header_amd *
194 get_next_ucode(int cpu, const u8 *buf, unsigned int size, unsigned int *mc_size)
196 struct microcode_header_amd *mc = NULL;
197 unsigned int actual_size = 0;
199 if (*(u32 *)buf != UCODE_UCODE_TYPE) {
200 pr_err("invalid type field in container file section header\n");
204 actual_size = verify_ucode_size(cpu, buf, size);
208 mc = vzalloc(actual_size);
212 get_ucode_data(mc, buf + SECTION_HDR_SIZE, actual_size);
213 *mc_size = actual_size + SECTION_HDR_SIZE;
219 static int install_equiv_cpu_table(const u8 *buf)
221 unsigned int *ibuf = (unsigned int *)buf;
222 unsigned int type = ibuf[1];
223 unsigned int size = ibuf[2];
225 if (type != UCODE_EQUIV_CPU_TABLE_TYPE || !size) {
226 pr_err("empty section/"
227 "invalid type field in container file section header\n");
231 equiv_cpu_table = vmalloc(size);
232 if (!equiv_cpu_table) {
233 pr_err("failed to allocate equivalent CPU table\n");
237 get_ucode_data(equiv_cpu_table, buf + CONTAINER_HDR_SZ, size);
239 /* add header length */
240 return size + CONTAINER_HDR_SZ;
243 static void free_equiv_cpu_table(void)
245 vfree(equiv_cpu_table);
246 equiv_cpu_table = NULL;
249 static enum ucode_state
250 generic_load_microcode(int cpu, const u8 *data, size_t size)
252 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
253 struct microcode_header_amd *mc_hdr = NULL;
254 unsigned int mc_size, leftover;
256 const u8 *ucode_ptr = data;
258 unsigned int new_rev = uci->cpu_sig.rev;
259 enum ucode_state state = UCODE_OK;
261 offset = install_equiv_cpu_table(ucode_ptr);
263 pr_err("failed to create equivalent cpu table\n");
268 leftover = size - offset;
271 mc_hdr = get_next_ucode(cpu, ucode_ptr, leftover, &mc_size);
275 if (get_matching_microcode(cpu, mc_hdr, new_rev)) {
277 new_rev = mc_hdr->patch_id;
282 ucode_ptr += mc_size;
287 state = UCODE_NFOUND;
294 pr_debug("CPU%d update ucode (0x%08x -> 0x%08x)\n",
295 cpu, uci->cpu_sig.rev, new_rev);
302 free_equiv_cpu_table();
308 * AMD microcode firmware naming convention, up to family 15h they are in
311 * amd-ucode/microcode_amd.bin
313 * This legacy file is always smaller than 2K in size.
315 * Starting at family 15h they are in family specific firmware files:
317 * amd-ucode/microcode_amd_fam15h.bin
318 * amd-ucode/microcode_amd_fam16h.bin
321 * These might be larger than 2K.
323 static enum ucode_state request_microcode_amd(int cpu, struct device *device)
325 char fw_name[36] = "amd-ucode/microcode_amd.bin";
326 const struct firmware *fw;
327 enum ucode_state ret = UCODE_NFOUND;
328 struct cpuinfo_x86 *c = &cpu_data(cpu);
331 snprintf(fw_name, sizeof(fw_name), "amd-ucode/microcode_amd_fam%.2xh.bin", c->x86);
333 if (request_firmware(&fw, (const char *)fw_name, device)) {
334 pr_err("failed to load file %s\n", fw_name);
339 if (*(u32 *)fw->data != UCODE_MAGIC) {
340 pr_err("invalid magic value (0x%08x)\n", *(u32 *)fw->data);
344 ret = generic_load_microcode(cpu, fw->data, fw->size);
347 release_firmware(fw);
353 static enum ucode_state
354 request_microcode_user(int cpu, const void __user *buf, size_t size)
356 pr_info("AMD microcode update via /dev/cpu/microcode not supported\n");
360 static void microcode_fini_cpu_amd(int cpu)
362 struct ucode_cpu_info *uci = ucode_cpu_info + cpu;
368 static struct microcode_ops microcode_amd_ops = {
369 .request_microcode_user = request_microcode_user,
370 .request_microcode_fw = request_microcode_amd,
371 .collect_cpu_info = collect_cpu_info_amd,
372 .apply_microcode = apply_microcode_amd,
373 .microcode_fini_cpu = microcode_fini_cpu_amd,
376 struct microcode_ops * __init init_amd_microcode(void)
378 return µcode_amd_ops;