arch/x86/kvm/x86.c

   1 /*
   2  * Kernel-based Virtual Machine driver for Linux
   3  *
   4  * derived from drivers/kvm/kvm_main.c
   5  *
   6  * Copyright (C) 2006 Qumranet, Inc.
   7  * Copyright (C) 2008 Qumranet, Inc.
   8  * Copyright IBM Corporation, 2008
   9  * Copyright 2010 Red Hat, Inc. and/or its affiliates.
  10  *
  11  * Authors:
  12  *   Avi Kivity   <avi@qumranet.com>
  13  *   Yaniv Kamay  <yaniv@qumranet.com>
  14  *   Amit Shah    <amit.shah@qumranet.com>
  15  *   Ben-Ami Yassour <benami@il.ibm.com>
  16  *
  17  * This work is licensed under the terms of the GNU GPL, version 2.  See
  18  * the COPYING file in the top-level directory.
  19  *
  20  */
  21
  22 #include <linux/kvm_host.h>
  23 #include "irq.h"
  24 #include "mmu.h"
  25 #include "i8254.h"
  26 #include "tss.h"
  27 #include "kvm_cache_regs.h"
  28 #include "x86.h"
  29 #include "cpuid.h"
  30 #include "assigned-dev.h"
  31 #include "pmu.h"
  32 #include "hyperv.h"
  33
  34 #include <linux/clocksource.h>
  35 #include <linux/interrupt.h>
  36 #include <linux/kvm.h>
  37 #include <linux/fs.h>
  38 #include <linux/vmalloc.h>
  39 #include <linux/module.h>
  40 #include <linux/mman.h>
  41 #include <linux/highmem.h>
  42 #include <linux/iommu.h>
  43 #include <linux/intel-iommu.h>
  44 #include <linux/cpufreq.h>
  45 #include <linux/user-return-notifier.h>
  46 #include <linux/srcu.h>
  47 #include <linux/slab.h>
  48 #include <linux/perf_event.h>
  49 #include <linux/uaccess.h>
  50 #include <linux/hash.h>
  51 #include <linux/pci.h>
  52 #include <linux/timekeeper_internal.h>
  53 #include <linux/pvclock_gtod.h>
  54 #include <trace/events/kvm.h>
  55
  56 #define CREATE_TRACE_POINTS
  57 #include "trace.h"
  58
  59 #include <asm/debugreg.h>
  60 #include <asm/msr.h>
  61 #include <asm/desc.h>
  62 #include <asm/mce.h>
  63 #include <linux/kernel_stat.h>
  64 #include <asm/fpu/internal.h> /* Ugh! */
  65 #include <asm/pvclock.h>
  66 #include <asm/div64.h>
  67
  68 #define MAX_IO_MSRS 256
  69 #define KVM_MAX_MCE_BANKS 32
  70 #define KVM_MCE_CAP_SUPPORTED (MCG_CTL_P | MCG_SER_P)
  71
  72 #define emul_to_vcpu(ctxt) \
  73         container_of(ctxt, struct kvm_vcpu, arch.emulate_ctxt)
  74
  75 /* EFER defaults:
  76  * - enable syscall per default because its emulated by KVM
  77  * - enable LME and LMA per default on 64 bit KVM
  78  */
  79 #ifdef CONFIG_X86_64
  80 static
  81 u64 __read_mostly efer_reserved_bits = ~((u64)(EFER_SCE | EFER_LME | EFER_LMA));
  82 #else
  83 static u64 __read_mostly efer_reserved_bits = ~((u64)EFER_SCE);
  84 #endif
  85
  86 #define VM_STAT(x) offsetof(struct kvm, stat.x), KVM_STAT_VM
  87 #define VCPU_STAT(x) offsetof(struct kvm_vcpu, stat.x), KVM_STAT_VCPU
  88
  89 static void update_cr8_intercept(struct kvm_vcpu *vcpu);
  90 static void process_nmi(struct kvm_vcpu *vcpu);
  91 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags);
  92
  93 struct kvm_x86_ops *kvm_x86_ops;
  94 EXPORT_SYMBOL_GPL(kvm_x86_ops);
  95
  96 static bool ignore_msrs = 0;
  97 module_param(ignore_msrs, bool, S_IRUGO | S_IWUSR);
  98
  99 unsigned int min_timer_period_us = 500;
 100 module_param(min_timer_period_us, uint, S_IRUGO | S_IWUSR);
 101
 102 static bool __read_mostly kvmclock_periodic_sync = true;
 103 module_param(kvmclock_periodic_sync, bool, S_IRUGO);
 104
 105 bool kvm_has_tsc_control;
 106 EXPORT_SYMBOL_GPL(kvm_has_tsc_control);
 107 u32  kvm_max_guest_tsc_khz;
 108 EXPORT_SYMBOL_GPL(kvm_max_guest_tsc_khz);
 109
 110 /* tsc tolerance in parts per million - default to 1/2 of the NTP threshold */
 111 static u32 tsc_tolerance_ppm = 250;
 112 module_param(tsc_tolerance_ppm, uint, S_IRUGO | S_IWUSR);
 113
 114 /* lapic timer advance (tscdeadline mode only) in nanoseconds */
 115 unsigned int lapic_timer_advance_ns = 0;
 116 module_param(lapic_timer_advance_ns, uint, S_IRUGO | S_IWUSR);
 117
 118 static bool backwards_tsc_observed = false;
 119
 120 #define KVM_NR_SHARED_MSRS 16
 121
 122 struct kvm_shared_msrs_global {
 123         int nr;
 124         u32 msrs[KVM_NR_SHARED_MSRS];
 125 };
 126
 127 struct kvm_shared_msrs {
 128         struct user_return_notifier urn;
 129         bool registered;
 130         struct kvm_shared_msr_values {
 131                 u64 host;
 132                 u64 curr;
 133         } values[KVM_NR_SHARED_MSRS];
 134 };
 135
 136 static struct kvm_shared_msrs_global __read_mostly shared_msrs_global;
 137 static struct kvm_shared_msrs __percpu *shared_msrs;
 138
 139 struct kvm_stats_debugfs_item debugfs_entries[] = {
 140         { "pf_fixed", VCPU_STAT(pf_fixed) },
 141         { "pf_guest", VCPU_STAT(pf_guest) },
 142         { "tlb_flush", VCPU_STAT(tlb_flush) },
 143         { "invlpg", VCPU_STAT(invlpg) },
 144         { "exits", VCPU_STAT(exits) },
 145         { "io_exits", VCPU_STAT(io_exits) },
 146         { "mmio_exits", VCPU_STAT(mmio_exits) },
 147         { "signal_exits", VCPU_STAT(signal_exits) },
 148         { "irq_window", VCPU_STAT(irq_window_exits) },
 149         { "nmi_window", VCPU_STAT(nmi_window_exits) },
 150         { "halt_exits", VCPU_STAT(halt_exits) },
 151         { "halt_successful_poll", VCPU_STAT(halt_successful_poll) },
 152         { "halt_attempted_poll", VCPU_STAT(halt_attempted_poll) },
 153         { "halt_wakeup", VCPU_STAT(halt_wakeup) },
 154         { "hypercalls", VCPU_STAT(hypercalls) },
 155         { "request_irq", VCPU_STAT(request_irq_exits) },
 156         { "irq_exits", VCPU_STAT(irq_exits) },
 157         { "host_state_reload", VCPU_STAT(host_state_reload) },
 158         { "efer_reload", VCPU_STAT(efer_reload) },
 159         { "fpu_reload", VCPU_STAT(fpu_reload) },
 160         { "insn_emulation", VCPU_STAT(insn_emulation) },
 161         { "insn_emulation_fail", VCPU_STAT(insn_emulation_fail) },
 162         { "irq_injections", VCPU_STAT(irq_injections) },
 163         { "nmi_injections", VCPU_STAT(nmi_injections) },
 164         { "mmu_shadow_zapped", VM_STAT(mmu_shadow_zapped) },
 165         { "mmu_pte_write", VM_STAT(mmu_pte_write) },
 166         { "mmu_pte_updated", VM_STAT(mmu_pte_updated) },
 167         { "mmu_pde_zapped", VM_STAT(mmu_pde_zapped) },
 168         { "mmu_flooded", VM_STAT(mmu_flooded) },
 169         { "mmu_recycled", VM_STAT(mmu_recycled) },
 170         { "mmu_cache_miss", VM_STAT(mmu_cache_miss) },
 171         { "mmu_unsync", VM_STAT(mmu_unsync) },
 172         { "remote_tlb_flush", VM_STAT(remote_tlb_flush) },
 173         { "largepages", VM_STAT(lpages) },
 174         { NULL }
 175 };
 176
 177 u64 __read_mostly host_xcr0;
 178
 179 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt);
 180
 181 static inline void kvm_async_pf_hash_reset(struct kvm_vcpu *vcpu)
 182 {
 183         int i;
 184         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU); i++)
 185                 vcpu->arch.apf.gfns[i] = ~0;
 186 }
 187
 188 static void kvm_on_user_return(struct user_return_notifier *urn)
 189 {
 190         unsigned slot;
 191         struct kvm_shared_msrs *locals
 192                 = container_of(urn, struct kvm_shared_msrs, urn);
 193         struct kvm_shared_msr_values *values;
 194
 195         for (slot = 0; slot < shared_msrs_global.nr; ++slot) {
 196                 values = &locals->values[slot];
 197                 if (values->host != values->curr) {
 198                         wrmsrl(shared_msrs_global.msrs[slot], values->host);
 199                         values->curr = values->host;
 200                 }
 201         }
 202         locals->registered = false;
 203         user_return_notifier_unregister(urn);
 204 }
 205
 206 static void shared_msr_update(unsigned slot, u32 msr)
 207 {
 208         u64 value;
 209         unsigned int cpu = smp_processor_id();
 210         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 211
 212         /* only read, and nobody should modify it at this time,
 213          * so don't need lock */
 214         if (slot >= shared_msrs_global.nr) {
 215                 printk(KERN_ERR "kvm: invalid MSR slot!");
 216                 return;
 217         }
 218         rdmsrl_safe(msr, &value);
 219         smsr->values[slot].host = value;
 220         smsr->values[slot].curr = value;
 221 }
 222
 223 void kvm_define_shared_msr(unsigned slot, u32 msr)
 224 {
 225         BUG_ON(slot >= KVM_NR_SHARED_MSRS);
 226         shared_msrs_global.msrs[slot] = msr;
 227         if (slot >= shared_msrs_global.nr)
 228                 shared_msrs_global.nr = slot + 1;
 229 }
 230 EXPORT_SYMBOL_GPL(kvm_define_shared_msr);
 231
 232 static void kvm_shared_msr_cpu_online(void)
 233 {
 234         unsigned i;
 235
 236         for (i = 0; i < shared_msrs_global.nr; ++i)
 237                 shared_msr_update(i, shared_msrs_global.msrs[i]);
 238 }
 239
 240 int kvm_set_shared_msr(unsigned slot, u64 value, u64 mask)
 241 {
 242         unsigned int cpu = smp_processor_id();
 243         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 244         int err;
 245
 246         if (((value ^ smsr->values[slot].curr) & mask) == 0)
 247                 return 0;
 248         smsr->values[slot].curr = value;
 249         err = wrmsrl_safe(shared_msrs_global.msrs[slot], value);
 250         if (err)
 251                 return 1;
 252
 253         if (!smsr->registered) {
 254                 smsr->urn.on_user_return = kvm_on_user_return;
 255                 user_return_notifier_register(&smsr->urn);
 256                 smsr->registered = true;
 257         }
 258         return 0;
 259 }
 260 EXPORT_SYMBOL_GPL(kvm_set_shared_msr);
 261
 262 static void drop_user_return_notifiers(void)
 263 {
 264         unsigned int cpu = smp_processor_id();
 265         struct kvm_shared_msrs *smsr = per_cpu_ptr(shared_msrs, cpu);
 266
 267         if (smsr->registered)
 268                 kvm_on_user_return(&smsr->urn);
 269 }
 270
 271 u64 kvm_get_apic_base(struct kvm_vcpu *vcpu)
 272 {
 273         return vcpu->arch.apic_base;
 274 }
 275 EXPORT_SYMBOL_GPL(kvm_get_apic_base);
 276
 277 int kvm_set_apic_base(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
 278 {
 279         u64 old_state = vcpu->arch.apic_base &
 280                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 281         u64 new_state = msr_info->data &
 282                 (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE);
 283         u64 reserved_bits = ((~0ULL) << cpuid_maxphyaddr(vcpu)) |
 284                 0x2ff | (guest_cpuid_has_x2apic(vcpu) ? 0 : X2APIC_ENABLE);
 285
 286         if (!msr_info->host_initiated &&
 287             ((msr_info->data & reserved_bits) != 0 ||
 288              new_state == X2APIC_ENABLE ||
 289              (new_state == MSR_IA32_APICBASE_ENABLE &&
 290               old_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE)) ||
 291              (new_state == (MSR_IA32_APICBASE_ENABLE | X2APIC_ENABLE) &&
 292               old_state == 0)))
 293                 return 1;
 294
 295         kvm_lapic_set_base(vcpu, msr_info->data);
 296         return 0;
 297 }
 298 EXPORT_SYMBOL_GPL(kvm_set_apic_base);
 299
 300 asmlinkage __visible void kvm_spurious_fault(void)
 301 {
 302         /* Fault while not rebooting.  We want the trace. */
 303         BUG();
 304 }
 305 EXPORT_SYMBOL_GPL(kvm_spurious_fault);
 306
 307 #define EXCPT_BENIGN            0
 308 #define EXCPT_CONTRIBUTORY      1
 309 #define EXCPT_PF                2
 310
 311 static int exception_class(int vector)
 312 {
 313         switch (vector) {
 314         case PF_VECTOR:
 315                 return EXCPT_PF;
 316         case DE_VECTOR:
 317         case TS_VECTOR:
 318         case NP_VECTOR:
 319         case SS_VECTOR:
 320         case GP_VECTOR:
 321                 return EXCPT_CONTRIBUTORY;
 322         default:
 323                 break;
 324         }
 325         return EXCPT_BENIGN;
 326 }
 327
 328 #define EXCPT_FAULT             0
 329 #define EXCPT_TRAP              1
 330 #define EXCPT_ABORT             2
 331 #define EXCPT_INTERRUPT         3
 332
 333 static int exception_type(int vector)
 334 {
 335         unsigned int mask;
 336
 337         if (WARN_ON(vector > 31 || vector == NMI_VECTOR))
 338                 return EXCPT_INTERRUPT;
 339
 340         mask = 1 << vector;
 341
 342         /* #DB is trap, as instruction watchpoints are handled elsewhere */
 343         if (mask & ((1 << DB_VECTOR) | (1 << BP_VECTOR) | (1 << OF_VECTOR)))
 344                 return EXCPT_TRAP;
 345
 346         if (mask & ((1 << DF_VECTOR) | (1 << MC_VECTOR)))
 347                 return EXCPT_ABORT;
 348
 349         /* Reserved exceptions will result in fault */
 350         return EXCPT_FAULT;
 351 }
 352
 353 static void kvm_multiple_exception(struct kvm_vcpu *vcpu,
 354                 unsigned nr, bool has_error, u32 error_code,
 355                 bool reinject)
 356 {
 357         u32 prev_nr;
 358         int class1, class2;
 359
 360         kvm_make_request(KVM_REQ_EVENT, vcpu);
 361
 362         if (!vcpu->arch.exception.pending) {
 363         queue:
 364                 if (has_error && !is_protmode(vcpu))
 365                         has_error = false;
 366                 vcpu->arch.exception.pending = true;
 367                 vcpu->arch.exception.has_error_code = has_error;
 368                 vcpu->arch.exception.nr = nr;
 369                 vcpu->arch.exception.error_code = error_code;
 370                 vcpu->arch.exception.reinject = reinject;
 371                 return;
 372         }
 373
 374         /* to check exception */
 375         prev_nr = vcpu->arch.exception.nr;
 376         if (prev_nr == DF_VECTOR) {
 377                 /* triple fault -> shutdown */
 378                 kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
 379                 return;
 380         }
 381         class1 = exception_class(prev_nr);
 382         class2 = exception_class(nr);
 383         if ((class1 == EXCPT_CONTRIBUTORY && class2 == EXCPT_CONTRIBUTORY)
 384                 || (class1 == EXCPT_PF && class2 != EXCPT_BENIGN)) {
 385                 /* generate double fault per SDM Table 5-5 */
 386                 vcpu->arch.exception.pending = true;
 387                 vcpu->arch.exception.has_error_code = true;
 388                 vcpu->arch.exception.nr = DF_VECTOR;
 389                 vcpu->arch.exception.error_code = 0;
 390         } else
 391                 /* replace previous exception with a new one in a hope
 392                    that instruction re-execution will regenerate lost
 393                    exception */
 394                 goto queue;
 395 }
 396
 397 void kvm_queue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 398 {
 399         kvm_multiple_exception(vcpu, nr, false, 0, false);
 400 }
 401 EXPORT_SYMBOL_GPL(kvm_queue_exception);
 402
 403 void kvm_requeue_exception(struct kvm_vcpu *vcpu, unsigned nr)
 404 {
 405         kvm_multiple_exception(vcpu, nr, false, 0, true);
 406 }
 407 EXPORT_SYMBOL_GPL(kvm_requeue_exception);
 408
 409 void kvm_complete_insn_gp(struct kvm_vcpu *vcpu, int err)
 410 {
 411         if (err)
 412                 kvm_inject_gp(vcpu, 0);
 413         else
 414                 kvm_x86_ops->skip_emulated_instruction(vcpu);
 415 }
 416 EXPORT_SYMBOL_GPL(kvm_complete_insn_gp);
 417
 418 void kvm_inject_page_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 419 {
 420         ++vcpu->stat.pf_guest;
 421         vcpu->arch.cr2 = fault->address;
 422         kvm_queue_exception_e(vcpu, PF_VECTOR, fault->error_code);
 423 }
 424 EXPORT_SYMBOL_GPL(kvm_inject_page_fault);
 425
 426 static bool kvm_propagate_fault(struct kvm_vcpu *vcpu, struct x86_exception *fault)
 427 {
 428         if (mmu_is_nested(vcpu) && !fault->nested_page_fault)
 429                 vcpu->arch.nested_mmu.inject_page_fault(vcpu, fault);
 430         else
 431                 vcpu->arch.mmu.inject_page_fault(vcpu, fault);
 432
 433         return fault->nested_page_fault;
 434 }
 435
 436 void kvm_inject_nmi(struct kvm_vcpu *vcpu)
 437 {
 438         atomic_inc(&vcpu->arch.nmi_queued);
 439         kvm_make_request(KVM_REQ_NMI, vcpu);
 440 }
 441 EXPORT_SYMBOL_GPL(kvm_inject_nmi);
 442
 443 void kvm_queue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 444 {
 445         kvm_multiple_exception(vcpu, nr, true, error_code, false);
 446 }
 447 EXPORT_SYMBOL_GPL(kvm_queue_exception_e);
 448
 449 void kvm_requeue_exception_e(struct kvm_vcpu *vcpu, unsigned nr, u32 error_code)
 450 {
 451         kvm_multiple_exception(vcpu, nr, true, error_code, true);
 452 }
 453 EXPORT_SYMBOL_GPL(kvm_requeue_exception_e);
 454
 455 /*
 456  * Checks if cpl <= required_cpl; if true, return true.  Otherwise queue
 457  * a #GP and return false.
 458  */
 459 bool kvm_require_cpl(struct kvm_vcpu *vcpu, int required_cpl)
 460 {
 461         if (kvm_x86_ops->get_cpl(vcpu) <= required_cpl)
 462                 return true;
 463         kvm_queue_exception_e(vcpu, GP_VECTOR, 0);
 464         return false;
 465 }
 466 EXPORT_SYMBOL_GPL(kvm_require_cpl);
 467
 468 bool kvm_require_dr(struct kvm_vcpu *vcpu, int dr)
 469 {
 470         if ((dr != 4 && dr != 5) || !kvm_read_cr4_bits(vcpu, X86_CR4_DE))
 471                 return true;
 472
 473         kvm_queue_exception(vcpu, UD_VECTOR);
 474         return false;
 475 }
 476 EXPORT_SYMBOL_GPL(kvm_require_dr);
 477
 478 /*
 479  * This function will be used to read from the physical memory of the currently
 480  * running guest. The difference to kvm_vcpu_read_guest_page is that this function
 481  * can read from guest physical or from the guest's guest physical memory.
 482  */
 483 int kvm_read_guest_page_mmu(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu,
 484                             gfn_t ngfn, void *data, int offset, int len,
 485                             u32 access)
 486 {
 487         struct x86_exception exception;
 488         gfn_t real_gfn;
 489         gpa_t ngpa;
 490
 491         ngpa     = gfn_to_gpa(ngfn);
 492         real_gfn = mmu->translate_gpa(vcpu, ngpa, access, &exception);
 493         if (real_gfn == UNMAPPED_GVA)
 494                 return -EFAULT;
 495
 496         real_gfn = gpa_to_gfn(real_gfn);
 497
 498         return kvm_vcpu_read_guest_page(vcpu, real_gfn, data, offset, len);
 499 }
 500 EXPORT_SYMBOL_GPL(kvm_read_guest_page_mmu);
 501
 502 static int kvm_read_nested_guest_page(struct kvm_vcpu *vcpu, gfn_t gfn,
 503                                void *data, int offset, int len, u32 access)
 504 {
 505         return kvm_read_guest_page_mmu(vcpu, vcpu->arch.walk_mmu, gfn,
 506                                        data, offset, len, access);
 507 }
 508
 509 /*
 510  * Load the pae pdptrs.  Return true is they are all valid.
 511  */
 512 int load_pdptrs(struct kvm_vcpu *vcpu, struct kvm_mmu *mmu, unsigned long cr3)
 513 {
 514         gfn_t pdpt_gfn = cr3 >> PAGE_SHIFT;
 515         unsigned offset = ((cr3 & (PAGE_SIZE-1)) >> 5) << 2;
 516         int i;
 517         int ret;
 518         u64 pdpte[ARRAY_SIZE(mmu->pdptrs)];
 519
 520         ret = kvm_read_guest_page_mmu(vcpu, mmu, pdpt_gfn, pdpte,
 521                                       offset * sizeof(u64), sizeof(pdpte),
 522                                       PFERR_USER_MASK|PFERR_WRITE_MASK);
 523         if (ret < 0) {
 524                 ret = 0;
 525                 goto out;
 526         }
 527         for (i = 0; i < ARRAY_SIZE(pdpte); ++i) {
 528                 if (is_present_gpte(pdpte[i]) &&
 529                     (pdpte[i] &
 530                      vcpu->arch.mmu.guest_rsvd_check.rsvd_bits_mask[0][2])) {
 531                         ret = 0;
 532                         goto out;
 533                 }
 534         }
 535         ret = 1;
 536
 537         memcpy(mmu->pdptrs, pdpte, sizeof(mmu->pdptrs));
 538         __set_bit(VCPU_EXREG_PDPTR,
 539                   (unsigned long *)&vcpu->arch.regs_avail);
 540         __set_bit(VCPU_EXREG_PDPTR,
 541                   (unsigned long *)&vcpu->arch.regs_dirty);
 542 out:
 543
 544         return ret;
 545 }
 546 EXPORT_SYMBOL_GPL(load_pdptrs);
 547
 548 static bool pdptrs_changed(struct kvm_vcpu *vcpu)
 549 {
 550         u64 pdpte[ARRAY_SIZE(vcpu->arch.walk_mmu->pdptrs)];
 551         bool changed = true;
 552         int offset;
 553         gfn_t gfn;
 554         int r;
 555
 556         if (is_long_mode(vcpu) || !is_pae(vcpu))
 557                 return false;
 558
 559         if (!test_bit(VCPU_EXREG_PDPTR,
 560                       (unsigned long *)&vcpu->arch.regs_avail))
 561                 return true;
 562
 563         gfn = (kvm_read_cr3(vcpu) & ~31u) >> PAGE_SHIFT;
 564         offset = (kvm_read_cr3(vcpu) & ~31u) & (PAGE_SIZE - 1);
 565         r = kvm_read_nested_guest_page(vcpu, gfn, pdpte, offset, sizeof(pdpte),
 566                                        PFERR_USER_MASK | PFERR_WRITE_MASK);
 567         if (r < 0)
 568                 goto out;
 569         changed = memcmp(pdpte, vcpu->arch.walk_mmu->pdptrs, sizeof(pdpte)) != 0;
 570 out:
 571
 572         return changed;
 573 }
 574
 575 int kvm_set_cr0(struct kvm_vcpu *vcpu, unsigned long cr0)
 576 {
 577         unsigned long old_cr0 = kvm_read_cr0(vcpu);
 578         unsigned long update_bits = X86_CR0_PG | X86_CR0_WP;
 579
 580         cr0 |= X86_CR0_ET;
 581
 582 #ifdef CONFIG_X86_64
 583         if (cr0 & 0xffffffff00000000UL)
 584                 return 1;
 585 #endif
 586
 587         cr0 &= ~CR0_RESERVED_BITS;
 588
 589         if ((cr0 & X86_CR0_NW) && !(cr0 & X86_CR0_CD))
 590                 return 1;
 591
 592         if ((cr0 & X86_CR0_PG) && !(cr0 & X86_CR0_PE))
 593                 return 1;
 594
 595         if (!is_paging(vcpu) && (cr0 & X86_CR0_PG)) {
 596 #ifdef CONFIG_X86_64
 597                 if ((vcpu->arch.efer & EFER_LME)) {
 598                         int cs_db, cs_l;
 599
 600                         if (!is_pae(vcpu))
 601                                 return 1;
 602                         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
 603                         if (cs_l)
 604                                 return 1;
 605                 } else
 606 #endif
 607                 if (is_pae(vcpu) && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 608                                                  kvm_read_cr3(vcpu)))
 609                         return 1;
 610         }
 611
 612         if (!(cr0 & X86_CR0_PG) && kvm_read_cr4_bits(vcpu, X86_CR4_PCIDE))
 613                 return 1;
 614
 615         kvm_x86_ops->set_cr0(vcpu, cr0);
 616
 617         if ((cr0 ^ old_cr0) & X86_CR0_PG) {
 618                 kvm_clear_async_pf_completion_queue(vcpu);
 619                 kvm_async_pf_hash_reset(vcpu);
 620         }
 621
 622         if ((cr0 ^ old_cr0) & update_bits)
 623                 kvm_mmu_reset_context(vcpu);
 624
 625         if ((cr0 ^ old_cr0) & X86_CR0_CD)
 626                 kvm_zap_gfn_range(vcpu->kvm, 0, ~0ULL);
 627
 628         return 0;
 629 }
 630 EXPORT_SYMBOL_GPL(kvm_set_cr0);
 631
 632 void kvm_lmsw(struct kvm_vcpu *vcpu, unsigned long msw)
 633 {
 634         (void)kvm_set_cr0(vcpu, kvm_read_cr0_bits(vcpu, ~0x0eul) | (msw & 0x0f));
 635 }
 636 EXPORT_SYMBOL_GPL(kvm_lmsw);
 637
 638 static void kvm_load_guest_xcr0(struct kvm_vcpu *vcpu)
 639 {
 640         if (kvm_read_cr4_bits(vcpu, X86_CR4_OSXSAVE) &&
 641                         !vcpu->guest_xcr0_loaded) {
 642                 /* kvm_set_xcr() also depends on this */
 643                 xsetbv(XCR_XFEATURE_ENABLED_MASK, vcpu->arch.xcr0);
 644                 vcpu->guest_xcr0_loaded = 1;
 645         }
 646 }
 647
 648 static void kvm_put_guest_xcr0(struct kvm_vcpu *vcpu)
 649 {
 650         if (vcpu->guest_xcr0_loaded) {
 651                 if (vcpu->arch.xcr0 != host_xcr0)
 652                         xsetbv(XCR_XFEATURE_ENABLED_MASK, host_xcr0);
 653                 vcpu->guest_xcr0_loaded = 0;
 654         }
 655 }
 656
 657 static int __kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 658 {
 659         u64 xcr0 = xcr;
 660         u64 old_xcr0 = vcpu->arch.xcr0;
 661         u64 valid_bits;
 662
 663         /* Only support XCR_XFEATURE_ENABLED_MASK(xcr0) now  */
 664         if (index != XCR_XFEATURE_ENABLED_MASK)
 665                 return 1;
 666         if (!(xcr0 & XSTATE_FP))
 667                 return 1;
 668         if ((xcr0 & XSTATE_YMM) && !(xcr0 & XSTATE_SSE))
 669                 return 1;
 670
 671         /*
 672          * Do not allow the guest to set bits that we do not support
 673          * saving.  However, xcr0 bit 0 is always set, even if the
 674          * emulated CPU does not support XSAVE (see fx_init).
 675          */
 676         valid_bits = vcpu->arch.guest_supported_xcr0 | XSTATE_FP;
 677         if (xcr0 & ~valid_bits)
 678                 return 1;
 679
 680         if ((!(xcr0 & XSTATE_BNDREGS)) != (!(xcr0 & XSTATE_BNDCSR)))
 681                 return 1;
 682
 683         if (xcr0 & XSTATE_AVX512) {
 684                 if (!(xcr0 & XSTATE_YMM))
 685                         return 1;
 686                 if ((xcr0 & XSTATE_AVX512) != XSTATE_AVX512)
 687                         return 1;
 688         }
 689         kvm_put_guest_xcr0(vcpu);
 690         vcpu->arch.xcr0 = xcr0;
 691
 692         if ((xcr0 ^ old_xcr0) & XSTATE_EXTEND_MASK)
 693                 kvm_update_cpuid(vcpu);
 694         return 0;
 695 }
 696
 697 int kvm_set_xcr(struct kvm_vcpu *vcpu, u32 index, u64 xcr)
 698 {
 699         if (kvm_x86_ops->get_cpl(vcpu) != 0 ||
 700             __kvm_set_xcr(vcpu, index, xcr)) {
 701                 kvm_inject_gp(vcpu, 0);
 702                 return 1;
 703         }
 704         return 0;
 705 }
 706 EXPORT_SYMBOL_GPL(kvm_set_xcr);
 707
 708 int kvm_set_cr4(struct kvm_vcpu *vcpu, unsigned long cr4)
 709 {
 710         unsigned long old_cr4 = kvm_read_cr4(vcpu);
 711         unsigned long pdptr_bits = X86_CR4_PGE | X86_CR4_PSE | X86_CR4_PAE |
 712                                    X86_CR4_SMEP | X86_CR4_SMAP;
 713
 714         if (cr4 & CR4_RESERVED_BITS)
 715                 return 1;
 716
 717         if (!guest_cpuid_has_xsave(vcpu) && (cr4 & X86_CR4_OSXSAVE))
 718                 return 1;
 719
 720         if (!guest_cpuid_has_smep(vcpu) && (cr4 & X86_CR4_SMEP))
 721                 return 1;
 722
 723         if (!guest_cpuid_has_smap(vcpu) && (cr4 & X86_CR4_SMAP))
 724                 return 1;
 725
 726         if (!guest_cpuid_has_fsgsbase(vcpu) && (cr4 & X86_CR4_FSGSBASE))
 727                 return 1;
 728
 729         if (is_long_mode(vcpu)) {
 730                 if (!(cr4 & X86_CR4_PAE))
 731                         return 1;
 732         } else if (is_paging(vcpu) && (cr4 & X86_CR4_PAE)
 733                    && ((cr4 ^ old_cr4) & pdptr_bits)
 734                    && !load_pdptrs(vcpu, vcpu->arch.walk_mmu,
 735                                    kvm_read_cr3(vcpu)))
 736                 return 1;
 737
 738         if ((cr4 & X86_CR4_PCIDE) && !(old_cr4 & X86_CR4_PCIDE)) {
 739                 if (!guest_cpuid_has_pcid(vcpu))
 740                         return 1;
 741
 742                 /* PCID can not be enabled when cr3[11:0]!=000H or EFER.LMA=0 */
 743                 if ((kvm_read_cr3(vcpu) & X86_CR3_PCID_MASK) || !is_long_mode(vcpu))
 744                         return 1;
 745         }
 746
 747         if (kvm_x86_ops->set_cr4(vcpu, cr4))
 748                 return 1;
 749
 750         if (((cr4 ^ old_cr4) & pdptr_bits) ||
 751             (!(cr4 & X86_CR4_PCIDE) && (old_cr4 & X86_CR4_PCIDE)))
 752                 kvm_mmu_reset_context(vcpu);
 753
 754         if ((cr4 ^ old_cr4) & X86_CR4_OSXSAVE)
 755                 kvm_update_cpuid(vcpu);
 756
 757         return 0;
 758 }
 759 EXPORT_SYMBOL_GPL(kvm_set_cr4);
 760
 761 int kvm_set_cr3(struct kvm_vcpu *vcpu, unsigned long cr3)
 762 {
 763 #ifdef CONFIG_X86_64
 764         cr3 &= ~CR3_PCID_INVD;
 765 #endif
 766
 767         if (cr3 == kvm_read_cr3(vcpu) && !pdptrs_changed(vcpu)) {
 768                 kvm_mmu_sync_roots(vcpu);
 769                 kvm_make_request(KVM_REQ_TLB_FLUSH, vcpu);
 770                 return 0;
 771         }
 772
 773         if (is_long_mode(vcpu)) {
 774                 if (cr3 & CR3_L_MODE_RESERVED_BITS)
 775                         return 1;
 776         } else if (is_pae(vcpu) && is_paging(vcpu) &&
 777                    !load_pdptrs(vcpu, vcpu->arch.walk_mmu, cr3))
 778                 return 1;
 779
 780         vcpu->arch.cr3 = cr3;
 781         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
 782         kvm_mmu_new_cr3(vcpu);
 783         return 0;
 784 }
 785 EXPORT_SYMBOL_GPL(kvm_set_cr3);
 786
 787 int kvm_set_cr8(struct kvm_vcpu *vcpu, unsigned long cr8)
 788 {
 789         if (cr8 & CR8_RESERVED_BITS)
 790                 return 1;
 791         if (lapic_in_kernel(vcpu))
 792                 kvm_lapic_set_tpr(vcpu, cr8);
 793         else
 794                 vcpu->arch.cr8 = cr8;
 795         return 0;
 796 }
 797 EXPORT_SYMBOL_GPL(kvm_set_cr8);
 798
 799 unsigned long kvm_get_cr8(struct kvm_vcpu *vcpu)
 800 {
 801         if (lapic_in_kernel(vcpu))
 802                 return kvm_lapic_get_cr8(vcpu);
 803         else
 804                 return vcpu->arch.cr8;
 805 }
 806 EXPORT_SYMBOL_GPL(kvm_get_cr8);
 807
 808 static void kvm_update_dr0123(struct kvm_vcpu *vcpu)
 809 {
 810         int i;
 811
 812         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)) {
 813                 for (i = 0; i < KVM_NR_DB_REGS; i++)
 814                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
 815                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_RELOAD;
 816         }
 817 }
 818
 819 static void kvm_update_dr6(struct kvm_vcpu *vcpu)
 820 {
 821         if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 822                 kvm_x86_ops->set_dr6(vcpu, vcpu->arch.dr6);
 823 }
 824
 825 static void kvm_update_dr7(struct kvm_vcpu *vcpu)
 826 {
 827         unsigned long dr7;
 828
 829         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 830                 dr7 = vcpu->arch.guest_debug_dr7;
 831         else
 832                 dr7 = vcpu->arch.dr7;
 833         kvm_x86_ops->set_dr7(vcpu, dr7);
 834         vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_BP_ENABLED;
 835         if (dr7 & DR7_BP_EN_MASK)
 836                 vcpu->arch.switch_db_regs |= KVM_DEBUGREG_BP_ENABLED;
 837 }
 838
 839 static u64 kvm_dr6_fixed(struct kvm_vcpu *vcpu)
 840 {
 841         u64 fixed = DR6_FIXED_1;
 842
 843         if (!guest_cpuid_has_rtm(vcpu))
 844                 fixed |= DR6_RTM;
 845         return fixed;
 846 }
 847
 848 static int __kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 849 {
 850         switch (dr) {
 851         case 0 ... 3:
 852                 vcpu->arch.db[dr] = val;
 853                 if (!(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP))
 854                         vcpu->arch.eff_db[dr] = val;
 855                 break;
 856         case 4:
 857                 /* fall through */
 858         case 6:
 859                 if (val & 0xffffffff00000000ULL)
 860                         return -1; /* #GP */
 861                 vcpu->arch.dr6 = (val & DR6_VOLATILE) | kvm_dr6_fixed(vcpu);
 862                 kvm_update_dr6(vcpu);
 863                 break;
 864         case 5:
 865                 /* fall through */
 866         default: /* 7 */
 867                 if (val & 0xffffffff00000000ULL)
 868                         return -1; /* #GP */
 869                 vcpu->arch.dr7 = (val & DR7_VOLATILE) | DR7_FIXED_1;
 870                 kvm_update_dr7(vcpu);
 871                 break;
 872         }
 873
 874         return 0;
 875 }
 876
 877 int kvm_set_dr(struct kvm_vcpu *vcpu, int dr, unsigned long val)
 878 {
 879         if (__kvm_set_dr(vcpu, dr, val)) {
 880                 kvm_inject_gp(vcpu, 0);
 881                 return 1;
 882         }
 883         return 0;
 884 }
 885 EXPORT_SYMBOL_GPL(kvm_set_dr);
 886
 887 int kvm_get_dr(struct kvm_vcpu *vcpu, int dr, unsigned long *val)
 888 {
 889         switch (dr) {
 890         case 0 ... 3:
 891                 *val = vcpu->arch.db[dr];
 892                 break;
 893         case 4:
 894                 /* fall through */
 895         case 6:
 896                 if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP)
 897                         *val = vcpu->arch.dr6;
 898                 else
 899                         *val = kvm_x86_ops->get_dr6(vcpu);
 900                 break;
 901         case 5:
 902                 /* fall through */
 903         default: /* 7 */
 904                 *val = vcpu->arch.dr7;
 905                 break;
 906         }
 907         return 0;
 908 }
 909 EXPORT_SYMBOL_GPL(kvm_get_dr);
 910
 911 bool kvm_rdpmc(struct kvm_vcpu *vcpu)
 912 {
 913         u32 ecx = kvm_register_read(vcpu, VCPU_REGS_RCX);
 914         u64 data;
 915         int err;
 916
 917         err = kvm_pmu_rdpmc(vcpu, ecx, &data);
 918         if (err)
 919                 return err;
 920         kvm_register_write(vcpu, VCPU_REGS_RAX, (u32)data);
 921         kvm_register_write(vcpu, VCPU_REGS_RDX, data >> 32);
 922         return err;
 923 }
 924 EXPORT_SYMBOL_GPL(kvm_rdpmc);
 925
 926 /*
 927  * List of msr numbers which we expose to userspace through KVM_GET_MSRS
 928  * and KVM_SET_MSRS, and KVM_GET_MSR_INDEX_LIST.
 929  *
 930  * This list is modified at module load time to reflect the
 931  * capabilities of the host cpu. This capabilities test skips MSRs that are
 932  * kvm-specific. Those are put in emulated_msrs; filtering of emulated_msrs
 933  * may depend on host virtualization features rather than host cpu features.
 934  */
 935
 936 static u32 msrs_to_save[] = {
 937         MSR_IA32_SYSENTER_CS, MSR_IA32_SYSENTER_ESP, MSR_IA32_SYSENTER_EIP,
 938         MSR_STAR,
 939 #ifdef CONFIG_X86_64
 940         MSR_CSTAR, MSR_KERNEL_GS_BASE, MSR_SYSCALL_MASK, MSR_LSTAR,
 941 #endif
 942         MSR_IA32_TSC, MSR_IA32_CR_PAT, MSR_VM_HSAVE_PA,
 943         MSR_IA32_FEATURE_CONTROL, MSR_IA32_BNDCFGS
 944 };
 945
 946 static unsigned num_msrs_to_save;
 947
 948 static u32 emulated_msrs[] = {
 949         MSR_KVM_SYSTEM_TIME, MSR_KVM_WALL_CLOCK,
 950         MSR_KVM_SYSTEM_TIME_NEW, MSR_KVM_WALL_CLOCK_NEW,
 951         HV_X64_MSR_GUEST_OS_ID, HV_X64_MSR_HYPERCALL,
 952         HV_X64_MSR_TIME_REF_COUNT, HV_X64_MSR_REFERENCE_TSC,
 953         HV_X64_MSR_CRASH_P0, HV_X64_MSR_CRASH_P1, HV_X64_MSR_CRASH_P2,
 954         HV_X64_MSR_CRASH_P3, HV_X64_MSR_CRASH_P4, HV_X64_MSR_CRASH_CTL,
 955         HV_X64_MSR_APIC_ASSIST_PAGE, MSR_KVM_ASYNC_PF_EN, MSR_KVM_STEAL_TIME,
 956         MSR_KVM_PV_EOI_EN,
 957
 958         MSR_IA32_TSC_ADJUST,
 959         MSR_IA32_TSCDEADLINE,
 960         MSR_IA32_MISC_ENABLE,
 961         MSR_IA32_MCG_STATUS,
 962         MSR_IA32_MCG_CTL,
 963         MSR_IA32_SMBASE,
 964 };
 965
 966 static unsigned num_emulated_msrs;
 967
 968 bool kvm_valid_efer(struct kvm_vcpu *vcpu, u64 efer)
 969 {
 970         if (efer & efer_reserved_bits)
 971                 return false;
 972
 973         if (efer & EFER_FFXSR) {
 974                 struct kvm_cpuid_entry2 *feat;
 975
 976                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 977                 if (!feat || !(feat->edx & bit(X86_FEATURE_FXSR_OPT)))
 978                         return false;
 979         }
 980
 981         if (efer & EFER_SVME) {
 982                 struct kvm_cpuid_entry2 *feat;
 983
 984                 feat = kvm_find_cpuid_entry(vcpu, 0x80000001, 0);
 985                 if (!feat || !(feat->ecx & bit(X86_FEATURE_SVM)))
 986                         return false;
 987         }
 988
 989         return true;
 990 }
 991 EXPORT_SYMBOL_GPL(kvm_valid_efer);
 992
 993 static int set_efer(struct kvm_vcpu *vcpu, u64 efer)
 994 {
 995         u64 old_efer = vcpu->arch.efer;
 996
 997         if (!kvm_valid_efer(vcpu, efer))
 998                 return 1;
 999
1000         if (is_paging(vcpu)
1001             && (vcpu->arch.efer & EFER_LME) != (efer & EFER_LME))
1002                 return 1;
1003
1004         efer &= ~EFER_LMA;
1005         efer |= vcpu->arch.efer & EFER_LMA;
1006
1007         kvm_x86_ops->set_efer(vcpu, efer);
1008
1009         /* Update reserved bits */
1010         if ((efer ^ old_efer) & EFER_NX)
1011                 kvm_mmu_reset_context(vcpu);
1012
1013         return 0;
1014 }
1015
1016 void kvm_enable_efer_bits(u64 mask)
1017 {
1018        efer_reserved_bits &= ~mask;
1019 }
1020 EXPORT_SYMBOL_GPL(kvm_enable_efer_bits);
1021
1022 /*
1023  * Writes msr value into into the appropriate "register".
1024  * Returns 0 on success, non-0 otherwise.
1025  * Assumes vcpu_load() was already called.
1026  */
1027 int kvm_set_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
1028 {
1029         switch (msr->index) {
1030         case MSR_FS_BASE:
1031         case MSR_GS_BASE:
1032         case MSR_KERNEL_GS_BASE:
1033         case MSR_CSTAR:
1034         case MSR_LSTAR:
1035                 if (is_noncanonical_address(msr->data))
1036                         return 1;
1037                 break;
1038         case MSR_IA32_SYSENTER_EIP:
1039         case MSR_IA32_SYSENTER_ESP:
1040                 /*
1041                  * IA32_SYSENTER_ESP and IA32_SYSENTER_EIP cause #GP if
1042                  * non-canonical address is written on Intel but not on
1043                  * AMD (which ignores the top 32-bits, because it does
1044                  * not implement 64-bit SYSENTER).
1045                  *
1046                  * 64-bit code should hence be able to write a non-canonical
1047                  * value on AMD.  Making the address canonical ensures that
1048                  * vmentry does not fail on Intel after writing a non-canonical
1049                  * value, and that something deterministic happens if the guest
1050                  * invokes 64-bit SYSENTER.
1051                  */
1052                 msr->data = get_canonical(msr->data);
1053         }
1054         return kvm_x86_ops->set_msr(vcpu, msr);
1055 }
1056 EXPORT_SYMBOL_GPL(kvm_set_msr);
1057
1058 /*
1059  * Adapt set_msr() to msr_io()'s calling convention
1060  */
1061 static int do_get_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1062 {
1063         struct msr_data msr;
1064         int r;
1065
1066         msr.index = index;
1067         msr.host_initiated = true;
1068         r = kvm_get_msr(vcpu, &msr);
1069         if (r)
1070                 return r;
1071
1072         *data = msr.data;
1073         return 0;
1074 }
1075
1076 static int do_set_msr(struct kvm_vcpu *vcpu, unsigned index, u64 *data)
1077 {
1078         struct msr_data msr;
1079
1080         msr.data = *data;
1081         msr.index = index;
1082         msr.host_initiated = true;
1083         return kvm_set_msr(vcpu, &msr);
1084 }
1085
1086 #ifdef CONFIG_X86_64
1087 struct pvclock_gtod_data {
1088         seqcount_t      seq;
1089
1090         struct { /* extract of a clocksource struct */
1091                 int vclock_mode;
1092                 cycle_t cycle_last;
1093                 cycle_t mask;
1094                 u32     mult;
1095                 u32     shift;
1096         } clock;
1097
1098         u64             boot_ns;
1099         u64             nsec_base;
1100 };
1101
1102 static struct pvclock_gtod_data pvclock_gtod_data;
1103
1104 static void update_pvclock_gtod(struct timekeeper *tk)
1105 {
1106         struct pvclock_gtod_data *vdata = &pvclock_gtod_data;
1107         u64 boot_ns;
1108
1109         boot_ns = ktime_to_ns(ktime_add(tk->tkr_mono.base, tk->offs_boot));
1110
1111         write_seqcount_begin(&vdata->seq);
1112
1113         /* copy pvclock gtod data */
1114         vdata->clock.vclock_mode        = tk->tkr_mono.clock->archdata.vclock_mode;
1115         vdata->clock.cycle_last         = tk->tkr_mono.cycle_last;
1116         vdata->clock.mask               = tk->tkr_mono.mask;
1117         vdata->clock.mult               = tk->tkr_mono.mult;
1118         vdata->clock.shift              = tk->tkr_mono.shift;
1119
1120         vdata->boot_ns                  = boot_ns;
1121         vdata->nsec_base                = tk->tkr_mono.xtime_nsec;
1122
1123         write_seqcount_end(&vdata->seq);
1124 }
1125 #endif
1126
1127 void kvm_set_pending_timer(struct kvm_vcpu *vcpu)
1128 {
1129         /*
1130          * Note: KVM_REQ_PENDING_TIMER is implicitly checked in
1131          * vcpu_enter_guest.  This function is only called from
1132          * the physical CPU that is running vcpu.
1133          */
1134         kvm_make_request(KVM_REQ_PENDING_TIMER, vcpu);
1135 }
1136
1137 static void kvm_write_wall_clock(struct kvm *kvm, gpa_t wall_clock)
1138 {
1139         int version;
1140         int r;
1141         struct pvclock_wall_clock wc;
1142         struct timespec boot;
1143
1144         if (!wall_clock)
1145                 return;
1146
1147         r = kvm_read_guest(kvm, wall_clock, &version, sizeof(version));
1148         if (r)
1149                 return;
1150
1151         if (version & 1)
1152                 ++version;  /* first time write, random junk */
1153
1154         ++version;
1155
1156         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1157
1158         /*
1159          * The guest calculates current wall clock time by adding
1160          * system time (updated by kvm_guest_time_update below) to the
1161          * wall clock specified here.  guest system time equals host
1162          * system time for us, thus we must fill in host boot time here.
1163          */
1164         getboottime(&boot);
1165
1166         if (kvm->arch.kvmclock_offset) {
1167                 struct timespec ts = ns_to_timespec(kvm->arch.kvmclock_offset);
1168                 boot = timespec_sub(boot, ts);
1169         }
1170         wc.sec = boot.tv_sec;
1171         wc.nsec = boot.tv_nsec;
1172         wc.version = version;
1173
1174         kvm_write_guest(kvm, wall_clock, &wc, sizeof(wc));
1175
1176         version++;
1177         kvm_write_guest(kvm, wall_clock, &version, sizeof(version));
1178 }
1179
1180 static uint32_t div_frac(uint32_t dividend, uint32_t divisor)
1181 {
1182         uint32_t quotient, remainder;
1183
1184         /* Don't try to replace with do_div(), this one calculates
1185          * "(dividend << 32) / divisor" */
1186         __asm__ ( "divl %4"
1187                   : "=a" (quotient), "=d" (remainder)
1188                   : "0" (0), "1" (dividend), "r" (divisor) );
1189         return quotient;
1190 }
1191
1192 static void kvm_get_time_scale(uint32_t scaled_khz, uint32_t base_khz,
1193                                s8 *pshift, u32 *pmultiplier)
1194 {
1195         uint64_t scaled64;
1196         int32_t  shift = 0;
1197         uint64_t tps64;
1198         uint32_t tps32;
1199
1200         tps64 = base_khz * 1000LL;
1201         scaled64 = scaled_khz * 1000LL;
1202         while (tps64 > scaled64*2 || tps64 & 0xffffffff00000000ULL) {
1203                 tps64 >>= 1;
1204                 shift--;
1205         }
1206
1207         tps32 = (uint32_t)tps64;
1208         while (tps32 <= scaled64 || scaled64 & 0xffffffff00000000ULL) {
1209                 if (scaled64 & 0xffffffff00000000ULL || tps32 & 0x80000000)
1210                         scaled64 >>= 1;
1211                 else
1212                         tps32 <<= 1;
1213                 shift++;
1214         }
1215
1216         *pshift = shift;
1217         *pmultiplier = div_frac(scaled64, tps32);
1218
1219         pr_debug("%s: base_khz %u => %u, shift %d, mul %u\n",
1220                  __func__, base_khz, scaled_khz, shift, *pmultiplier);
1221 }
1222
1223 #ifdef CONFIG_X86_64
1224 static atomic_t kvm_guest_has_master_clock = ATOMIC_INIT(0);
1225 #endif
1226
1227 static DEFINE_PER_CPU(unsigned long, cpu_tsc_khz);
1228 static unsigned long max_tsc_khz;
1229
1230 static inline u64 nsec_to_cycles(struct kvm_vcpu *vcpu, u64 nsec)
1231 {
1232         return pvclock_scale_delta(nsec, vcpu->arch.virtual_tsc_mult,
1233                                    vcpu->arch.virtual_tsc_shift);
1234 }
1235
1236 static u32 adjust_tsc_khz(u32 khz, s32 ppm)
1237 {
1238         u64 v = (u64)khz * (1000000 + ppm);
1239         do_div(v, 1000000);
1240         return v;
1241 }
1242
1243 static void kvm_set_tsc_khz(struct kvm_vcpu *vcpu, u32 this_tsc_khz)
1244 {
1245         u32 thresh_lo, thresh_hi;
1246         int use_scaling = 0;
1247
1248         /* tsc_khz can be zero if TSC calibration fails */
1249         if (this_tsc_khz == 0)
1250                 return;
1251
1252         /* Compute a scale to convert nanoseconds in TSC cycles */
1253         kvm_get_time_scale(this_tsc_khz, NSEC_PER_SEC / 1000,
1254                            &vcpu->arch.virtual_tsc_shift,
1255                            &vcpu->arch.virtual_tsc_mult);
1256         vcpu->arch.virtual_tsc_khz = this_tsc_khz;
1257
1258         /*
1259          * Compute the variation in TSC rate which is acceptable
1260          * within the range of tolerance and decide if the
1261          * rate being applied is within that bounds of the hardware
1262          * rate.  If so, no scaling or compensation need be done.
1263          */
1264         thresh_lo = adjust_tsc_khz(tsc_khz, -tsc_tolerance_ppm);
1265         thresh_hi = adjust_tsc_khz(tsc_khz, tsc_tolerance_ppm);
1266         if (this_tsc_khz < thresh_lo || this_tsc_khz > thresh_hi) {
1267                 pr_debug("kvm: requested TSC rate %u falls outside tolerance [%u,%u]\n", this_tsc_khz, thresh_lo, thresh_hi);
1268                 use_scaling = 1;
1269         }
1270         kvm_x86_ops->set_tsc_khz(vcpu, this_tsc_khz, use_scaling);
1271 }
1272
1273 static u64 compute_guest_tsc(struct kvm_vcpu *vcpu, s64 kernel_ns)
1274 {
1275         u64 tsc = pvclock_scale_delta(kernel_ns-vcpu->arch.this_tsc_nsec,
1276                                       vcpu->arch.virtual_tsc_mult,
1277                                       vcpu->arch.virtual_tsc_shift);
1278         tsc += vcpu->arch.this_tsc_write;
1279         return tsc;
1280 }
1281
1282 static void kvm_track_tsc_matching(struct kvm_vcpu *vcpu)
1283 {
1284 #ifdef CONFIG_X86_64
1285         bool vcpus_matched;
1286         struct kvm_arch *ka = &vcpu->kvm->arch;
1287         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1288
1289         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1290                          atomic_read(&vcpu->kvm->online_vcpus));
1291
1292         /*
1293          * Once the masterclock is enabled, always perform request in
1294          * order to update it.
1295          *
1296          * In order to enable masterclock, the host clocksource must be TSC
1297          * and the vcpus need to have matched TSCs.  When that happens,
1298          * perform request to enable masterclock.
1299          */
1300         if (ka->use_master_clock ||
1301             (gtod->clock.vclock_mode == VCLOCK_TSC && vcpus_matched))
1302                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
1303
1304         trace_kvm_track_tsc(vcpu->vcpu_id, ka->nr_vcpus_matched_tsc,
1305                             atomic_read(&vcpu->kvm->online_vcpus),
1306                             ka->use_master_clock, gtod->clock.vclock_mode);
1307 #endif
1308 }
1309
1310 static void update_ia32_tsc_adjust_msr(struct kvm_vcpu *vcpu, s64 offset)
1311 {
1312         u64 curr_offset = kvm_x86_ops->read_tsc_offset(vcpu);
1313         vcpu->arch.ia32_tsc_adjust_msr += offset - curr_offset;
1314 }
1315
1316 void kvm_write_tsc(struct kvm_vcpu *vcpu, struct msr_data *msr)
1317 {
1318         struct kvm *kvm = vcpu->kvm;
1319         u64 offset, ns, elapsed;
1320         unsigned long flags;
1321         s64 usdiff;
1322         bool matched;
1323         bool already_matched;
1324         u64 data = msr->data;
1325
1326         raw_spin_lock_irqsave(&kvm->arch.tsc_write_lock, flags);
1327         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1328         ns = get_kernel_ns();
1329         elapsed = ns - kvm->arch.last_tsc_nsec;
1330
1331         if (vcpu->arch.virtual_tsc_khz) {
1332                 int faulted = 0;
1333
1334                 /* n.b - signed multiplication and division required */
1335                 usdiff = data - kvm->arch.last_tsc_write;
1336 #ifdef CONFIG_X86_64
1337                 usdiff = (usdiff * 1000) / vcpu->arch.virtual_tsc_khz;
1338 #else
1339                 /* do_div() only does unsigned */
1340                 asm("1: idivl %[divisor]\n"
1341                     "2: xor %%edx, %%edx\n"
1342                     "   movl $0, %[faulted]\n"
1343                     "3:\n"
1344                     ".section .fixup,\"ax\"\n"
1345                     "4: movl $1, %[faulted]\n"
1346                     "   jmp  3b\n"
1347                     ".previous\n"
1348
1349                 _ASM_EXTABLE(1b, 4b)
1350
1351                 : "=A"(usdiff), [faulted] "=r" (faulted)
1352                 : "A"(usdiff * 1000), [divisor] "rm"(vcpu->arch.virtual_tsc_khz));
1353
1354 #endif
1355                 do_div(elapsed, 1000);
1356                 usdiff -= elapsed;
1357                 if (usdiff < 0)
1358                         usdiff = -usdiff;
1359
1360                 /* idivl overflow => difference is larger than USEC_PER_SEC */
1361                 if (faulted)
1362                         usdiff = USEC_PER_SEC;
1363         } else
1364                 usdiff = USEC_PER_SEC; /* disable TSC match window below */
1365
1366         /*
1367          * Special case: TSC write with a small delta (1 second) of virtual
1368          * cycle time against real time is interpreted as an attempt to
1369          * synchronize the CPU.
1370          *
1371          * For a reliable TSC, we can match TSC offsets, and for an unstable
1372          * TSC, we add elapsed time in this computation.  We could let the
1373          * compensation code attempt to catch up if we fall behind, but
1374          * it's better to try to match offsets from the beginning.
1375          */
1376         if (usdiff < USEC_PER_SEC &&
1377             vcpu->arch.virtual_tsc_khz == kvm->arch.last_tsc_khz) {
1378                 if (!check_tsc_unstable()) {
1379                         offset = kvm->arch.cur_tsc_offset;
1380                         pr_debug("kvm: matched tsc offset for %llu\n", data);
1381                 } else {
1382                         u64 delta = nsec_to_cycles(vcpu, elapsed);
1383                         data += delta;
1384                         offset = kvm_x86_ops->compute_tsc_offset(vcpu, data);
1385                         pr_debug("kvm: adjusted tsc offset by %llu\n", delta);
1386                 }
1387                 matched = true;
1388                 already_matched = (vcpu->arch.this_tsc_generation == kvm->arch.cur_tsc_generation);
1389         } else {
1390                 /*
1391                  * We split periods of matched TSC writes into generations.
1392                  * For each generation, we track the original measured
1393                  * nanosecond time, offset, and write, so if TSCs are in
1394                  * sync, we can match exact offset, and if not, we can match
1395                  * exact software computation in compute_guest_tsc()
1396                  *
1397                  * These values are tracked in kvm->arch.cur_xxx variables.
1398                  */
1399                 kvm->arch.cur_tsc_generation++;
1400                 kvm->arch.cur_tsc_nsec = ns;
1401                 kvm->arch.cur_tsc_write = data;
1402                 kvm->arch.cur_tsc_offset = offset;
1403                 matched = false;
1404                 pr_debug("kvm: new tsc generation %llu, clock %llu\n",
1405                          kvm->arch.cur_tsc_generation, data);
1406         }
1407
1408         /*
1409          * We also track th most recent recorded KHZ, write and time to
1410          * allow the matching interval to be extended at each write.
1411          */
1412         kvm->arch.last_tsc_nsec = ns;
1413         kvm->arch.last_tsc_write = data;
1414         kvm->arch.last_tsc_khz = vcpu->arch.virtual_tsc_khz;
1415
1416         vcpu->arch.last_guest_tsc = data;
1417
1418         /* Keep track of which generation this VCPU has synchronized to */
1419         vcpu->arch.this_tsc_generation = kvm->arch.cur_tsc_generation;
1420         vcpu->arch.this_tsc_nsec = kvm->arch.cur_tsc_nsec;
1421         vcpu->arch.this_tsc_write = kvm->arch.cur_tsc_write;
1422
1423         if (guest_cpuid_has_tsc_adjust(vcpu) && !msr->host_initiated)
1424                 update_ia32_tsc_adjust_msr(vcpu, offset);
1425         kvm_x86_ops->write_tsc_offset(vcpu, offset);
1426         raw_spin_unlock_irqrestore(&kvm->arch.tsc_write_lock, flags);
1427
1428         spin_lock(&kvm->arch.pvclock_gtod_sync_lock);
1429         if (!matched) {
1430                 kvm->arch.nr_vcpus_matched_tsc = 0;
1431         } else if (!already_matched) {
1432                 kvm->arch.nr_vcpus_matched_tsc++;
1433         }
1434
1435         kvm_track_tsc_matching(vcpu);
1436         spin_unlock(&kvm->arch.pvclock_gtod_sync_lock);
1437 }
1438
1439 EXPORT_SYMBOL_GPL(kvm_write_tsc);
1440
1441 #ifdef CONFIG_X86_64
1442
1443 static cycle_t read_tsc(void)
1444 {
1445         cycle_t ret = (cycle_t)rdtsc_ordered();
1446         u64 last = pvclock_gtod_data.clock.cycle_last;
1447
1448         if (likely(ret >= last))
1449                 return ret;
1450
1451         /*
1452          * GCC likes to generate cmov here, but this branch is extremely
1453          * predictable (it's just a funciton of time and the likely is
1454          * very likely) and there's a data dependence, so force GCC
1455          * to generate a branch instead.  I don't barrier() because
1456          * we don't actually need a barrier, and if this function
1457          * ever gets inlined it will generate worse code.
1458          */
1459         asm volatile ("");
1460         return last;
1461 }
1462
1463 static inline u64 vgettsc(cycle_t *cycle_now)
1464 {
1465         long v;
1466         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1467
1468         *cycle_now = read_tsc();
1469
1470         v = (*cycle_now - gtod->clock.cycle_last) & gtod->clock.mask;
1471         return v * gtod->clock.mult;
1472 }
1473
1474 static int do_monotonic_boot(s64 *t, cycle_t *cycle_now)
1475 {
1476         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
1477         unsigned long seq;
1478         int mode;
1479         u64 ns;
1480
1481         do {
1482                 seq = read_seqcount_begin(&gtod->seq);
1483                 mode = gtod->clock.vclock_mode;
1484                 ns = gtod->nsec_base;
1485                 ns += vgettsc(cycle_now);
1486                 ns >>= gtod->clock.shift;
1487                 ns += gtod->boot_ns;
1488         } while (unlikely(read_seqcount_retry(&gtod->seq, seq)));
1489         *t = ns;
1490
1491         return mode;
1492 }
1493
1494 /* returns true if host is using tsc clocksource */
1495 static bool kvm_get_time_and_clockread(s64 *kernel_ns, cycle_t *cycle_now)
1496 {
1497         /* checked again under seqlock below */
1498         if (pvclock_gtod_data.clock.vclock_mode != VCLOCK_TSC)
1499                 return false;
1500
1501         return do_monotonic_boot(kernel_ns, cycle_now) == VCLOCK_TSC;
1502 }
1503 #endif
1504
1505 /*
1506  *
1507  * Assuming a stable TSC across physical CPUS, and a stable TSC
1508  * across virtual CPUs, the following condition is possible.
1509  * Each numbered line represents an event visible to both
1510  * CPUs at the next numbered event.
1511  *
1512  * "timespecX" represents host monotonic time. "tscX" represents
1513  * RDTSC value.
1514  *
1515  *              VCPU0 on CPU0           |       VCPU1 on CPU1
1516  *
1517  * 1.  read timespec0,tsc0
1518  * 2.                                   | timespec1 = timespec0 + N
1519  *                                      | tsc1 = tsc0 + M
1520  * 3. transition to guest               | transition to guest
1521  * 4. ret0 = timespec0 + (rdtsc - tsc0) |
1522  * 5.                                   | ret1 = timespec1 + (rdtsc - tsc1)
1523  *                                      | ret1 = timespec0 + N + (rdtsc - (tsc0 + M))
1524  *
1525  * Since ret0 update is visible to VCPU1 at time 5, to obey monotonicity:
1526  *
1527  *      - ret0 < ret1
1528  *      - timespec0 + (rdtsc - tsc0) < timespec0 + N + (rdtsc - (tsc0 + M))
1529  *              ...
1530  *      - 0 < N - M => M < N
1531  *
1532  * That is, when timespec0 != timespec1, M < N. Unfortunately that is not
1533  * always the case (the difference between two distinct xtime instances
1534  * might be smaller then the difference between corresponding TSC reads,
1535  * when updating guest vcpus pvclock areas).
1536  *
1537  * To avoid that problem, do not allow visibility of distinct
1538  * system_timestamp/tsc_timestamp values simultaneously: use a master
1539  * copy of host monotonic time values. Update that master copy
1540  * in lockstep.
1541  *
1542  * Rely on synchronization of host TSCs and guest TSCs for monotonicity.
1543  *
1544  */
1545
1546 static void pvclock_update_vm_gtod_copy(struct kvm *kvm)
1547 {
1548 #ifdef CONFIG_X86_64
1549         struct kvm_arch *ka = &kvm->arch;
1550         int vclock_mode;
1551         bool host_tsc_clocksource, vcpus_matched;
1552
1553         vcpus_matched = (ka->nr_vcpus_matched_tsc + 1 ==
1554                         atomic_read(&kvm->online_vcpus));
1555
1556         /*
1557          * If the host uses TSC clock, then passthrough TSC as stable
1558          * to the guest.
1559          */
1560         host_tsc_clocksource = kvm_get_time_and_clockread(
1561                                         &ka->master_kernel_ns,
1562                                         &ka->master_cycle_now);
1563
1564         ka->use_master_clock = host_tsc_clocksource && vcpus_matched
1565                                 && !backwards_tsc_observed
1566                                 && !ka->boot_vcpu_runs_old_kvmclock;
1567
1568         if (ka->use_master_clock)
1569                 atomic_set(&kvm_guest_has_master_clock, 1);
1570
1571         vclock_mode = pvclock_gtod_data.clock.vclock_mode;
1572         trace_kvm_update_master_clock(ka->use_master_clock, vclock_mode,
1573                                         vcpus_matched);
1574 #endif
1575 }
1576
1577 static void kvm_gen_update_masterclock(struct kvm *kvm)
1578 {
1579 #ifdef CONFIG_X86_64
1580         int i;
1581         struct kvm_vcpu *vcpu;
1582         struct kvm_arch *ka = &kvm->arch;
1583
1584         spin_lock(&ka->pvclock_gtod_sync_lock);
1585         kvm_make_mclock_inprogress_request(kvm);
1586         /* no guest entries from this point */
1587         pvclock_update_vm_gtod_copy(kvm);
1588
1589         kvm_for_each_vcpu(i, vcpu, kvm)
1590                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1591
1592         /* guest entries allowed */
1593         kvm_for_each_vcpu(i, vcpu, kvm)
1594                 clear_bit(KVM_REQ_MCLOCK_INPROGRESS, &vcpu->requests);
1595
1596         spin_unlock(&ka->pvclock_gtod_sync_lock);
1597 #endif
1598 }
1599
1600 static int kvm_guest_time_update(struct kvm_vcpu *v)
1601 {
1602         unsigned long flags, this_tsc_khz;
1603         struct kvm_vcpu_arch *vcpu = &v->arch;
1604         struct kvm_arch *ka = &v->kvm->arch;
1605         s64 kernel_ns;
1606         u64 tsc_timestamp, host_tsc;
1607         struct pvclock_vcpu_time_info guest_hv_clock;
1608         u8 pvclock_flags;
1609         bool use_master_clock;
1610
1611         kernel_ns = 0;
1612         host_tsc = 0;
1613
1614         /*
1615          * If the host uses TSC clock, then passthrough TSC as stable
1616          * to the guest.
1617          */
1618         spin_lock(&ka->pvclock_gtod_sync_lock);
1619         use_master_clock = ka->use_master_clock;
1620         if (use_master_clock) {
1621                 host_tsc = ka->master_cycle_now;
1622                 kernel_ns = ka->master_kernel_ns;
1623         }
1624         spin_unlock(&ka->pvclock_gtod_sync_lock);
1625
1626         /* Keep irq disabled to prevent changes to the clock */
1627         local_irq_save(flags);
1628         this_tsc_khz = __this_cpu_read(cpu_tsc_khz);
1629         if (unlikely(this_tsc_khz == 0)) {
1630                 local_irq_restore(flags);
1631                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1632                 return 1;
1633         }
1634         if (!use_master_clock) {
1635                 host_tsc = rdtsc();
1636                 kernel_ns = get_kernel_ns();
1637         }
1638
1639         tsc_timestamp = kvm_x86_ops->read_l1_tsc(v, host_tsc);
1640
1641         /*
1642          * We may have to catch up the TSC to match elapsed wall clock
1643          * time for two reasons, even if kvmclock is used.
1644          *   1) CPU could have been running below the maximum TSC rate
1645          *   2) Broken TSC compensation resets the base at each VCPU
1646          *      entry to avoid unknown leaps of TSC even when running
1647          *      again on the same CPU.  This may cause apparent elapsed
1648          *      time to disappear, and the guest to stand still or run
1649          *      very slowly.
1650          */
1651         if (vcpu->tsc_catchup) {
1652                 u64 tsc = compute_guest_tsc(v, kernel_ns);
1653                 if (tsc > tsc_timestamp) {
1654                         adjust_tsc_offset_guest(v, tsc - tsc_timestamp);
1655                         tsc_timestamp = tsc;
1656                 }
1657         }
1658
1659         local_irq_restore(flags);
1660
1661         if (!vcpu->pv_time_enabled)
1662                 return 0;
1663
1664         if (unlikely(vcpu->hw_tsc_khz != this_tsc_khz)) {
1665                 kvm_get_time_scale(NSEC_PER_SEC / 1000, this_tsc_khz,
1666                                    &vcpu->hv_clock.tsc_shift,
1667                                    &vcpu->hv_clock.tsc_to_system_mul);
1668                 vcpu->hw_tsc_khz = this_tsc_khz;
1669         }
1670
1671         /* With all the info we got, fill in the values */
1672         vcpu->hv_clock.tsc_timestamp = tsc_timestamp;
1673         vcpu->hv_clock.system_time = kernel_ns + v->kvm->arch.kvmclock_offset;
1674         vcpu->last_guest_tsc = tsc_timestamp;
1675
1676         if (unlikely(kvm_read_guest_cached(v->kvm, &vcpu->pv_time,
1677                 &guest_hv_clock, sizeof(guest_hv_clock))))
1678                 return 0;
1679
1680         /* This VCPU is paused, but it's legal for a guest to read another
1681          * VCPU's kvmclock, so we really have to follow the specification where
1682          * it says that version is odd if data is being modified, and even after
1683          * it is consistent.
1684          *
1685          * Version field updates must be kept separate.  This is because
1686          * kvm_write_guest_cached might use a "rep movs" instruction, and
1687          * writes within a string instruction are weakly ordered.  So there
1688          * are three writes overall.
1689          *
1690          * As a small optimization, only write the version field in the first
1691          * and third write.  The vcpu->pv_time cache is still valid, because the
1692          * version field is the first in the struct.
1693          */
1694         BUILD_BUG_ON(offsetof(struct pvclock_vcpu_time_info, version) != 0);
1695
1696         vcpu->hv_clock.version = guest_hv_clock.version + 1;
1697         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1698                                 &vcpu->hv_clock,
1699                                 sizeof(vcpu->hv_clock.version));
1700
1701         smp_wmb();
1702
1703         /* retain PVCLOCK_GUEST_STOPPED if set in guest copy */
1704         pvclock_flags = (guest_hv_clock.flags & PVCLOCK_GUEST_STOPPED);
1705
1706         if (vcpu->pvclock_set_guest_stopped_request) {
1707                 pvclock_flags |= PVCLOCK_GUEST_STOPPED;
1708                 vcpu->pvclock_set_guest_stopped_request = false;
1709         }
1710
1711         /* If the host uses TSC clocksource, then it is stable */
1712         if (use_master_clock)
1713                 pvclock_flags |= PVCLOCK_TSC_STABLE_BIT;
1714
1715         vcpu->hv_clock.flags = pvclock_flags;
1716
1717         trace_kvm_pvclock_update(v->vcpu_id, &vcpu->hv_clock);
1718
1719         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1720                                 &vcpu->hv_clock,
1721                                 sizeof(vcpu->hv_clock));
1722
1723         smp_wmb();
1724
1725         vcpu->hv_clock.version++;
1726         kvm_write_guest_cached(v->kvm, &vcpu->pv_time,
1727                                 &vcpu->hv_clock,
1728                                 sizeof(vcpu->hv_clock.version));
1729         return 0;
1730 }
1731
1732 /*
1733  * kvmclock updates which are isolated to a given vcpu, such as
1734  * vcpu->cpu migration, should not allow system_timestamp from
1735  * the rest of the vcpus to remain static. Otherwise ntp frequency
1736  * correction applies to one vcpu's system_timestamp but not
1737  * the others.
1738  *
1739  * So in those cases, request a kvmclock update for all vcpus.
1740  * We need to rate-limit these requests though, as they can
1741  * considerably slow guests that have a large number of vcpus.
1742  * The time for a remote vcpu to update its kvmclock is bound
1743  * by the delay we use to rate-limit the updates.
1744  */
1745
1746 #define KVMCLOCK_UPDATE_DELAY msecs_to_jiffies(100)
1747
1748 static void kvmclock_update_fn(struct work_struct *work)
1749 {
1750         int i;
1751         struct delayed_work *dwork = to_delayed_work(work);
1752         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1753                                            kvmclock_update_work);
1754         struct kvm *kvm = container_of(ka, struct kvm, arch);
1755         struct kvm_vcpu *vcpu;
1756
1757         kvm_for_each_vcpu(i, vcpu, kvm) {
1758                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
1759                 kvm_vcpu_kick(vcpu);
1760         }
1761 }
1762
1763 static void kvm_gen_kvmclock_update(struct kvm_vcpu *v)
1764 {
1765         struct kvm *kvm = v->kvm;
1766
1767         kvm_make_request(KVM_REQ_CLOCK_UPDATE, v);
1768         schedule_delayed_work(&kvm->arch.kvmclock_update_work,
1769                                         KVMCLOCK_UPDATE_DELAY);
1770 }
1771
1772 #define KVMCLOCK_SYNC_PERIOD (300 * HZ)
1773
1774 static void kvmclock_sync_fn(struct work_struct *work)
1775 {
1776         struct delayed_work *dwork = to_delayed_work(work);
1777         struct kvm_arch *ka = container_of(dwork, struct kvm_arch,
1778                                            kvmclock_sync_work);
1779         struct kvm *kvm = container_of(ka, struct kvm, arch);
1780
1781         if (!kvmclock_periodic_sync)
1782                 return;
1783
1784         schedule_delayed_work(&kvm->arch.kvmclock_update_work, 0);
1785         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
1786                                         KVMCLOCK_SYNC_PERIOD);
1787 }
1788
1789 static int set_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 data)
1790 {
1791         u64 mcg_cap = vcpu->arch.mcg_cap;
1792         unsigned bank_num = mcg_cap & 0xff;
1793
1794         switch (msr) {
1795         case MSR_IA32_MCG_STATUS:
1796                 vcpu->arch.mcg_status = data;
1797                 break;
1798         case MSR_IA32_MCG_CTL:
1799                 if (!(mcg_cap & MCG_CTL_P))
1800                         return 1;
1801                 if (data != 0 && data != ~(u64)0)
1802                         return -1;
1803                 vcpu->arch.mcg_ctl = data;
1804                 break;
1805         default:
1806                 if (msr >= MSR_IA32_MC0_CTL &&
1807                     msr < MSR_IA32_MCx_CTL(bank_num)) {
1808                         u32 offset = msr - MSR_IA32_MC0_CTL;
1809                         /* only 0 or all 1s can be written to IA32_MCi_CTL
1810                          * some Linux kernels though clear bit 10 in bank 4 to
1811                          * workaround a BIOS/GART TBL issue on AMD K8s, ignore
1812                          * this to avoid an uncatched #GP in the guest
1813                          */
1814                         if ((offset & 0x3) == 0 &&
1815                             data != 0 && (data | (1 << 10)) != ~(u64)0)
1816                                 return -1;
1817                         vcpu->arch.mce_banks[offset] = data;
1818                         break;
1819                 }
1820                 return 1;
1821         }
1822         return 0;
1823 }
1824
1825 static int xen_hvm_config(struct kvm_vcpu *vcpu, u64 data)
1826 {
1827         struct kvm *kvm = vcpu->kvm;
1828         int lm = is_long_mode(vcpu);
1829         u8 *blob_addr = lm ? (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_64
1830                 : (u8 *)(long)kvm->arch.xen_hvm_config.blob_addr_32;
1831         u8 blob_size = lm ? kvm->arch.xen_hvm_config.blob_size_64
1832                 : kvm->arch.xen_hvm_config.blob_size_32;
1833         u32 page_num = data & ~PAGE_MASK;
1834         u64 page_addr = data & PAGE_MASK;
1835         u8 *page;
1836         int r;
1837
1838         r = -E2BIG;
1839         if (page_num >= blob_size)
1840                 goto out;
1841         r = -ENOMEM;
1842         page = memdup_user(blob_addr + (page_num * PAGE_SIZE), PAGE_SIZE);
1843         if (IS_ERR(page)) {
1844                 r = PTR_ERR(page);
1845                 goto out;
1846         }
1847         if (kvm_vcpu_write_guest(vcpu, page_addr, page, PAGE_SIZE))
1848                 goto out_free;
1849         r = 0;
1850 out_free:
1851         kfree(page);
1852 out:
1853         return r;
1854 }
1855
1856 static int kvm_pv_enable_async_pf(struct kvm_vcpu *vcpu, u64 data)
1857 {
1858         gpa_t gpa = data & ~0x3f;
1859
1860         /* Bits 2:5 are reserved, Should be zero */
1861         if (data & 0x3c)
1862                 return 1;
1863
1864         vcpu->arch.apf.msr_val = data;
1865
1866         if (!(data & KVM_ASYNC_PF_ENABLED)) {
1867                 kvm_clear_async_pf_completion_queue(vcpu);
1868                 kvm_async_pf_hash_reset(vcpu);
1869                 return 0;
1870         }
1871
1872         if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.apf.data, gpa,
1873                                         sizeof(u32)))
1874                 return 1;
1875
1876         vcpu->arch.apf.send_user_only = !(data & KVM_ASYNC_PF_SEND_ALWAYS);
1877         kvm_async_pf_wakeup_all(vcpu);
1878         return 0;
1879 }
1880
1881 static void kvmclock_reset(struct kvm_vcpu *vcpu)
1882 {
1883         vcpu->arch.pv_time_enabled = false;
1884 }
1885
1886 static void accumulate_steal_time(struct kvm_vcpu *vcpu)
1887 {
1888         u64 delta;
1889
1890         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1891                 return;
1892
1893         delta = current->sched_info.run_delay - vcpu->arch.st.last_steal;
1894         vcpu->arch.st.last_steal = current->sched_info.run_delay;
1895         vcpu->arch.st.accum_steal = delta;
1896 }
1897
1898 static void record_steal_time(struct kvm_vcpu *vcpu)
1899 {
1900         if (!(vcpu->arch.st.msr_val & KVM_MSR_ENABLED))
1901                 return;
1902
1903         if (unlikely(kvm_read_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1904                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time))))
1905                 return;
1906
1907         vcpu->arch.st.steal.steal += vcpu->arch.st.accum_steal;
1908         vcpu->arch.st.steal.version += 2;
1909         vcpu->arch.st.accum_steal = 0;
1910
1911         kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.st.stime,
1912                 &vcpu->arch.st.steal, sizeof(struct kvm_steal_time));
1913 }
1914
1915 int kvm_set_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
1916 {
1917         bool pr = false;
1918         u32 msr = msr_info->index;
1919         u64 data = msr_info->data;
1920
1921         switch (msr) {
1922         case MSR_AMD64_NB_CFG:
1923         case MSR_IA32_UCODE_REV:
1924         case MSR_IA32_UCODE_WRITE:
1925         case MSR_VM_HSAVE_PA:
1926         case MSR_AMD64_PATCH_LOADER:
1927         case MSR_AMD64_BU_CFG2:
1928                 break;
1929
1930         case MSR_EFER:
1931                 return set_efer(vcpu, data);
1932         case MSR_K7_HWCR:
1933                 data &= ~(u64)0x40;     /* ignore flush filter disable */
1934                 data &= ~(u64)0x100;    /* ignore ignne emulation enable */
1935                 data &= ~(u64)0x8;      /* ignore TLB cache disable */
1936                 data &= ~(u64)0x40000;  /* ignore Mc status write enable */
1937                 if (data != 0) {
1938                         vcpu_unimpl(vcpu, "unimplemented HWCR wrmsr: 0x%llx\n",
1939                                     data);
1940                         return 1;
1941                 }
1942                 break;
1943         case MSR_FAM10H_MMIO_CONF_BASE:
1944                 if (data != 0) {
1945                         vcpu_unimpl(vcpu, "unimplemented MMIO_CONF_BASE wrmsr: "
1946                                     "0x%llx\n", data);
1947                         return 1;
1948                 }
1949                 break;
1950         case MSR_IA32_DEBUGCTLMSR:
1951                 if (!data) {
1952                         /* We support the non-activated case already */
1953                         break;
1954                 } else if (data & ~(DEBUGCTLMSR_LBR | DEBUGCTLMSR_BTF)) {
1955                         /* Values other than LBR and BTF are vendor-specific,
1956                            thus reserved and should throw a #GP */
1957                         return 1;
1958                 }
1959                 vcpu_unimpl(vcpu, "%s: MSR_IA32_DEBUGCTLMSR 0x%llx, nop\n",
1960                             __func__, data);
1961                 break;
1962         case 0x200 ... 0x2ff:
1963                 return kvm_mtrr_set_msr(vcpu, msr, data);
1964         case MSR_IA32_APICBASE:
1965                 return kvm_set_apic_base(vcpu, msr_info);
1966         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
1967                 return kvm_x2apic_msr_write(vcpu, msr, data);
1968         case MSR_IA32_TSCDEADLINE:
1969                 kvm_set_lapic_tscdeadline_msr(vcpu, data);
1970                 break;
1971         case MSR_IA32_TSC_ADJUST:
1972                 if (guest_cpuid_has_tsc_adjust(vcpu)) {
1973                         if (!msr_info->host_initiated) {
1974                                 s64 adj = data - vcpu->arch.ia32_tsc_adjust_msr;
1975                                 adjust_tsc_offset_guest(vcpu, adj);
1976                         }
1977                         vcpu->arch.ia32_tsc_adjust_msr = data;
1978                 }
1979                 break;
1980         case MSR_IA32_MISC_ENABLE:
1981                 vcpu->arch.ia32_misc_enable_msr = data;
1982                 break;
1983         case MSR_IA32_SMBASE:
1984                 if (!msr_info->host_initiated)
1985                         return 1;
1986                 vcpu->arch.smbase = data;
1987                 break;
1988         case MSR_KVM_WALL_CLOCK_NEW:
1989         case MSR_KVM_WALL_CLOCK:
1990                 vcpu->kvm->arch.wall_clock = data;
1991                 kvm_write_wall_clock(vcpu->kvm, data);
1992                 break;
1993         case MSR_KVM_SYSTEM_TIME_NEW:
1994         case MSR_KVM_SYSTEM_TIME: {
1995                 u64 gpa_offset;
1996                 struct kvm_arch *ka = &vcpu->kvm->arch;
1997
1998                 kvmclock_reset(vcpu);
1999
2000                 if (vcpu->vcpu_id == 0 && !msr_info->host_initiated) {
2001                         bool tmp = (msr == MSR_KVM_SYSTEM_TIME);
2002
2003                         if (ka->boot_vcpu_runs_old_kvmclock != tmp)
2004                                 set_bit(KVM_REQ_MASTERCLOCK_UPDATE,
2005                                         &vcpu->requests);
2006
2007                         ka->boot_vcpu_runs_old_kvmclock = tmp;
2008                 }
2009
2010                 vcpu->arch.time = data;
2011                 kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2012
2013                 /* we verify if the enable bit is set... */
2014                 if (!(data & 1))
2015                         break;
2016
2017                 gpa_offset = data & ~(PAGE_MASK | 1);
2018
2019                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm,
2020                      &vcpu->arch.pv_time, data & ~1ULL,
2021                      sizeof(struct pvclock_vcpu_time_info)))
2022                         vcpu->arch.pv_time_enabled = false;
2023                 else
2024                         vcpu->arch.pv_time_enabled = true;
2025
2026                 break;
2027         }
2028         case MSR_KVM_ASYNC_PF_EN:
2029                 if (kvm_pv_enable_async_pf(vcpu, data))
2030                         return 1;
2031                 break;
2032         case MSR_KVM_STEAL_TIME:
2033
2034                 if (unlikely(!sched_info_on()))
2035                         return 1;
2036
2037                 if (data & KVM_STEAL_RESERVED_MASK)
2038                         return 1;
2039
2040                 if (kvm_gfn_to_hva_cache_init(vcpu->kvm, &vcpu->arch.st.stime,
2041                                                 data & KVM_STEAL_VALID_BITS,
2042                                                 sizeof(struct kvm_steal_time)))
2043                         return 1;
2044
2045                 vcpu->arch.st.msr_val = data;
2046
2047                 if (!(data & KVM_MSR_ENABLED))
2048                         break;
2049
2050                 vcpu->arch.st.last_steal = current->sched_info.run_delay;
2051
2052                 preempt_disable();
2053                 accumulate_steal_time(vcpu);
2054                 preempt_enable();
2055
2056                 kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2057
2058                 break;
2059         case MSR_KVM_PV_EOI_EN:
2060                 if (kvm_lapic_enable_pv_eoi(vcpu, data))
2061                         return 1;
2062                 break;
2063
2064         case MSR_IA32_MCG_CTL:
2065         case MSR_IA32_MCG_STATUS:
2066         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2067                 return set_msr_mce(vcpu, msr, data);
2068
2069         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2070         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2071                 pr = true; /* fall through */
2072         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2073         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2074                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2075                         return kvm_pmu_set_msr(vcpu, msr_info);
2076
2077                 if (pr || data != 0)
2078                         vcpu_unimpl(vcpu, "disabled perfctr wrmsr: "
2079                                     "0x%x data 0x%llx\n", msr, data);
2080                 break;
2081         case MSR_K7_CLK_CTL:
2082                 /*
2083                  * Ignore all writes to this no longer documented MSR.
2084                  * Writes are only relevant for old K7 processors,
2085                  * all pre-dating SVM, but a recommended workaround from
2086                  * AMD for these chips. It is possible to specify the
2087                  * affected processor models on the command line, hence
2088                  * the need to ignore the workaround.
2089                  */
2090                 break;
2091         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2092         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2093         case HV_X64_MSR_CRASH_CTL:
2094                 return kvm_hv_set_msr_common(vcpu, msr, data,
2095                                              msr_info->host_initiated);
2096         case MSR_IA32_BBL_CR_CTL3:
2097                 /* Drop writes to this legacy MSR -- see rdmsr
2098                  * counterpart for further detail.
2099                  */
2100                 vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n", msr, data);
2101                 break;
2102         case MSR_AMD64_OSVW_ID_LENGTH:
2103                 if (!guest_cpuid_has_osvw(vcpu))
2104                         return 1;
2105                 vcpu->arch.osvw.length = data;
2106                 break;
2107         case MSR_AMD64_OSVW_STATUS:
2108                 if (!guest_cpuid_has_osvw(vcpu))
2109                         return 1;
2110                 vcpu->arch.osvw.status = data;
2111                 break;
2112         default:
2113                 if (msr && (msr == vcpu->kvm->arch.xen_hvm_config.msr))
2114                         return xen_hvm_config(vcpu, data);
2115                 if (kvm_pmu_is_valid_msr(vcpu, msr))
2116                         return kvm_pmu_set_msr(vcpu, msr_info);
2117                 if (!ignore_msrs) {
2118                         vcpu_unimpl(vcpu, "unhandled wrmsr: 0x%x data %llx\n",
2119                                     msr, data);
2120                         return 1;
2121                 } else {
2122                         vcpu_unimpl(vcpu, "ignored wrmsr: 0x%x data %llx\n",
2123                                     msr, data);
2124                         break;
2125                 }
2126         }
2127         return 0;
2128 }
2129 EXPORT_SYMBOL_GPL(kvm_set_msr_common);
2130
2131
2132 /*
2133  * Reads an msr value (of 'msr_index') into 'pdata'.
2134  * Returns 0 on success, non-0 otherwise.
2135  * Assumes vcpu_load() was already called.
2136  */
2137 int kvm_get_msr(struct kvm_vcpu *vcpu, struct msr_data *msr)
2138 {
2139         return kvm_x86_ops->get_msr(vcpu, msr);
2140 }
2141 EXPORT_SYMBOL_GPL(kvm_get_msr);
2142
2143 static int get_msr_mce(struct kvm_vcpu *vcpu, u32 msr, u64 *pdata)
2144 {
2145         u64 data;
2146         u64 mcg_cap = vcpu->arch.mcg_cap;
2147         unsigned bank_num = mcg_cap & 0xff;
2148
2149         switch (msr) {
2150         case MSR_IA32_P5_MC_ADDR:
2151         case MSR_IA32_P5_MC_TYPE:
2152                 data = 0;
2153                 break;
2154         case MSR_IA32_MCG_CAP:
2155                 data = vcpu->arch.mcg_cap;
2156                 break;
2157         case MSR_IA32_MCG_CTL:
2158                 if (!(mcg_cap & MCG_CTL_P))
2159                         return 1;
2160                 data = vcpu->arch.mcg_ctl;
2161                 break;
2162         case MSR_IA32_MCG_STATUS:
2163                 data = vcpu->arch.mcg_status;
2164                 break;
2165         default:
2166                 if (msr >= MSR_IA32_MC0_CTL &&
2167                     msr < MSR_IA32_MCx_CTL(bank_num)) {
2168                         u32 offset = msr - MSR_IA32_MC0_CTL;
2169                         data = vcpu->arch.mce_banks[offset];
2170                         break;
2171                 }
2172                 return 1;
2173         }
2174         *pdata = data;
2175         return 0;
2176 }
2177
2178 int kvm_get_msr_common(struct kvm_vcpu *vcpu, struct msr_data *msr_info)
2179 {
2180         switch (msr_info->index) {
2181         case MSR_IA32_PLATFORM_ID:
2182         case MSR_IA32_EBL_CR_POWERON:
2183         case MSR_IA32_DEBUGCTLMSR:
2184         case MSR_IA32_LASTBRANCHFROMIP:
2185         case MSR_IA32_LASTBRANCHTOIP:
2186         case MSR_IA32_LASTINTFROMIP:
2187         case MSR_IA32_LASTINTTOIP:
2188         case MSR_K8_SYSCFG:
2189         case MSR_K8_TSEG_ADDR:
2190         case MSR_K8_TSEG_MASK:
2191         case MSR_K7_HWCR:
2192         case MSR_VM_HSAVE_PA:
2193         case MSR_K8_INT_PENDING_MSG:
2194         case MSR_AMD64_NB_CFG:
2195         case MSR_FAM10H_MMIO_CONF_BASE:
2196         case MSR_AMD64_BU_CFG2:
2197                 msr_info->data = 0;
2198                 break;
2199         case MSR_K7_EVNTSEL0 ... MSR_K7_EVNTSEL3:
2200         case MSR_K7_PERFCTR0 ... MSR_K7_PERFCTR3:
2201         case MSR_P6_PERFCTR0 ... MSR_P6_PERFCTR1:
2202         case MSR_P6_EVNTSEL0 ... MSR_P6_EVNTSEL1:
2203                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2204                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2205                 msr_info->data = 0;
2206                 break;
2207         case MSR_IA32_UCODE_REV:
2208                 msr_info->data = 0x100000000ULL;
2209                 break;
2210         case MSR_MTRRcap:
2211         case 0x200 ... 0x2ff:
2212                 return kvm_mtrr_get_msr(vcpu, msr_info->index, &msr_info->data);
2213         case 0xcd: /* fsb frequency */
2214                 msr_info->data = 3;
2215                 break;
2216                 /*
2217                  * MSR_EBC_FREQUENCY_ID
2218                  * Conservative value valid for even the basic CPU models.
2219                  * Models 0,1: 000 in bits 23:21 indicating a bus speed of
2220                  * 100MHz, model 2 000 in bits 18:16 indicating 100MHz,
2221                  * and 266MHz for model 3, or 4. Set Core Clock
2222                  * Frequency to System Bus Frequency Ratio to 1 (bits
2223                  * 31:24) even though these are only valid for CPU
2224                  * models > 2, however guests may end up dividing or
2225                  * multiplying by zero otherwise.
2226                  */
2227         case MSR_EBC_FREQUENCY_ID:
2228                 msr_info->data = 1 << 24;
2229                 break;
2230         case MSR_IA32_APICBASE:
2231                 msr_info->data = kvm_get_apic_base(vcpu);
2232                 break;
2233         case APIC_BASE_MSR ... APIC_BASE_MSR + 0x3ff:
2234                 return kvm_x2apic_msr_read(vcpu, msr_info->index, &msr_info->data);
2235                 break;
2236         case MSR_IA32_TSCDEADLINE:
2237                 msr_info->data = kvm_get_lapic_tscdeadline_msr(vcpu);
2238                 break;
2239         case MSR_IA32_TSC_ADJUST:
2240                 msr_info->data = (u64)vcpu->arch.ia32_tsc_adjust_msr;
2241                 break;
2242         case MSR_IA32_MISC_ENABLE:
2243                 msr_info->data = vcpu->arch.ia32_misc_enable_msr;
2244                 break;
2245         case MSR_IA32_SMBASE:
2246                 if (!msr_info->host_initiated)
2247                         return 1;
2248                 msr_info->data = vcpu->arch.smbase;
2249                 break;
2250         case MSR_IA32_PERF_STATUS:
2251                 /* TSC increment by tick */
2252                 msr_info->data = 1000ULL;
2253                 /* CPU multiplier */
2254                 msr_info->data |= (((uint64_t)4ULL) << 40);
2255                 break;
2256         case MSR_EFER:
2257                 msr_info->data = vcpu->arch.efer;
2258                 break;
2259         case MSR_KVM_WALL_CLOCK:
2260         case MSR_KVM_WALL_CLOCK_NEW:
2261                 msr_info->data = vcpu->kvm->arch.wall_clock;
2262                 break;
2263         case MSR_KVM_SYSTEM_TIME:
2264         case MSR_KVM_SYSTEM_TIME_NEW:
2265                 msr_info->data = vcpu->arch.time;
2266                 break;
2267         case MSR_KVM_ASYNC_PF_EN:
2268                 msr_info->data = vcpu->arch.apf.msr_val;
2269                 break;
2270         case MSR_KVM_STEAL_TIME:
2271                 msr_info->data = vcpu->arch.st.msr_val;
2272                 break;
2273         case MSR_KVM_PV_EOI_EN:
2274                 msr_info->data = vcpu->arch.pv_eoi.msr_val;
2275                 break;
2276         case MSR_IA32_P5_MC_ADDR:
2277         case MSR_IA32_P5_MC_TYPE:
2278         case MSR_IA32_MCG_CAP:
2279         case MSR_IA32_MCG_CTL:
2280         case MSR_IA32_MCG_STATUS:
2281         case MSR_IA32_MC0_CTL ... MSR_IA32_MCx_CTL(KVM_MAX_MCE_BANKS) - 1:
2282                 return get_msr_mce(vcpu, msr_info->index, &msr_info->data);
2283         case MSR_K7_CLK_CTL:
2284                 /*
2285                  * Provide expected ramp-up count for K7. All other
2286                  * are set to zero, indicating minimum divisors for
2287                  * every field.
2288                  *
2289                  * This prevents guest kernels on AMD host with CPU
2290                  * type 6, model 8 and higher from exploding due to
2291                  * the rdmsr failing.
2292                  */
2293                 msr_info->data = 0x20000000;
2294                 break;
2295         case HV_X64_MSR_GUEST_OS_ID ... HV_X64_MSR_SINT15:
2296         case HV_X64_MSR_CRASH_P0 ... HV_X64_MSR_CRASH_P4:
2297         case HV_X64_MSR_CRASH_CTL:
2298                 return kvm_hv_get_msr_common(vcpu,
2299                                              msr_info->index, &msr_info->data);
2300                 break;
2301         case MSR_IA32_BBL_CR_CTL3:
2302                 /* This legacy MSR exists but isn't fully documented in current
2303                  * silicon.  It is however accessed by winxp in very narrow
2304                  * scenarios where it sets bit #19, itself documented as
2305                  * a "reserved" bit.  Best effort attempt to source coherent
2306                  * read data here should the balance of the register be
2307                  * interpreted by the guest:
2308                  *
2309                  * L2 cache control register 3: 64GB range, 256KB size,
2310                  * enabled, latency 0x1, configured
2311                  */
2312                 msr_info->data = 0xbe702111;
2313                 break;
2314         case MSR_AMD64_OSVW_ID_LENGTH:
2315                 if (!guest_cpuid_has_osvw(vcpu))
2316                         return 1;
2317                 msr_info->data = vcpu->arch.osvw.length;
2318                 break;
2319         case MSR_AMD64_OSVW_STATUS:
2320                 if (!guest_cpuid_has_osvw(vcpu))
2321                         return 1;
2322                 msr_info->data = vcpu->arch.osvw.status;
2323                 break;
2324         default:
2325                 if (kvm_pmu_is_valid_msr(vcpu, msr_info->index))
2326                         return kvm_pmu_get_msr(vcpu, msr_info->index, &msr_info->data);
2327                 if (!ignore_msrs) {
2328                         vcpu_unimpl(vcpu, "unhandled rdmsr: 0x%x\n", msr_info->index);
2329                         return 1;
2330                 } else {
2331                         vcpu_unimpl(vcpu, "ignored rdmsr: 0x%x\n", msr_info->index);
2332                         msr_info->data = 0;
2333                 }
2334                 break;
2335         }
2336         return 0;
2337 }
2338 EXPORT_SYMBOL_GPL(kvm_get_msr_common);
2339
2340 /*
2341  * Read or write a bunch of msrs. All parameters are kernel addresses.
2342  *
2343  * @return number of msrs set successfully.
2344  */
2345 static int __msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs *msrs,
2346                     struct kvm_msr_entry *entries,
2347                     int (*do_msr)(struct kvm_vcpu *vcpu,
2348                                   unsigned index, u64 *data))
2349 {
2350         int i, idx;
2351
2352         idx = srcu_read_lock(&vcpu->kvm->srcu);
2353         for (i = 0; i < msrs->nmsrs; ++i)
2354                 if (do_msr(vcpu, entries[i].index, &entries[i].data))
2355                         break;
2356         srcu_read_unlock(&vcpu->kvm->srcu, idx);
2357
2358         return i;
2359 }
2360
2361 /*
2362  * Read or write a bunch of msrs. Parameters are user addresses.
2363  *
2364  * @return number of msrs set successfully.
2365  */
2366 static int msr_io(struct kvm_vcpu *vcpu, struct kvm_msrs __user *user_msrs,
2367                   int (*do_msr)(struct kvm_vcpu *vcpu,
2368                                 unsigned index, u64 *data),
2369                   int writeback)
2370 {
2371         struct kvm_msrs msrs;
2372         struct kvm_msr_entry *entries;
2373         int r, n;
2374         unsigned size;
2375
2376         r = -EFAULT;
2377         if (copy_from_user(&msrs, user_msrs, sizeof msrs))
2378                 goto out;
2379
2380         r = -E2BIG;
2381         if (msrs.nmsrs >= MAX_IO_MSRS)
2382                 goto out;
2383
2384         size = sizeof(struct kvm_msr_entry) * msrs.nmsrs;
2385         entries = memdup_user(user_msrs->entries, size);
2386         if (IS_ERR(entries)) {
2387                 r = PTR_ERR(entries);
2388                 goto out;
2389         }
2390
2391         r = n = __msr_io(vcpu, &msrs, entries, do_msr);
2392         if (r < 0)
2393                 goto out_free;
2394
2395         r = -EFAULT;
2396         if (writeback && copy_to_user(user_msrs->entries, entries, size))
2397                 goto out_free;
2398
2399         r = n;
2400
2401 out_free:
2402         kfree(entries);
2403 out:
2404         return r;
2405 }
2406
2407 int kvm_vm_ioctl_check_extension(struct kvm *kvm, long ext)
2408 {
2409         int r;
2410
2411         switch (ext) {
2412         case KVM_CAP_IRQCHIP:
2413         case KVM_CAP_HLT:
2414         case KVM_CAP_MMU_SHADOW_CACHE_CONTROL:
2415         case KVM_CAP_SET_TSS_ADDR:
2416         case KVM_CAP_EXT_CPUID:
2417         case KVM_CAP_EXT_EMUL_CPUID:
2418         case KVM_CAP_CLOCKSOURCE:
2419         case KVM_CAP_PIT:
2420         case KVM_CAP_NOP_IO_DELAY:
2421         case KVM_CAP_MP_STATE:
2422         case KVM_CAP_SYNC_MMU:
2423         case KVM_CAP_USER_NMI:
2424         case KVM_CAP_REINJECT_CONTROL:
2425         case KVM_CAP_IRQ_INJECT_STATUS:
2426         case KVM_CAP_IOEVENTFD:
2427         case KVM_CAP_IOEVENTFD_NO_LENGTH:
2428         case KVM_CAP_PIT2:
2429         case KVM_CAP_PIT_STATE2:
2430         case KVM_CAP_SET_IDENTITY_MAP_ADDR:
2431         case KVM_CAP_XEN_HVM:
2432         case KVM_CAP_ADJUST_CLOCK:
2433         case KVM_CAP_VCPU_EVENTS:
2434         case KVM_CAP_HYPERV:
2435         case KVM_CAP_HYPERV_VAPIC:
2436         case KVM_CAP_HYPERV_SPIN:
2437         case KVM_CAP_PCI_SEGMENT:
2438         case KVM_CAP_DEBUGREGS:
2439         case KVM_CAP_X86_ROBUST_SINGLESTEP:
2440         case KVM_CAP_XSAVE:
2441         case KVM_CAP_ASYNC_PF:
2442         case KVM_CAP_GET_TSC_KHZ:
2443         case KVM_CAP_KVMCLOCK_CTRL:
2444         case KVM_CAP_READONLY_MEM:
2445         case KVM_CAP_HYPERV_TIME:
2446         case KVM_CAP_IOAPIC_POLARITY_IGNORED:
2447         case KVM_CAP_TSC_DEADLINE_TIMER:
2448         case KVM_CAP_ENABLE_CAP_VM:
2449         case KVM_CAP_DISABLE_QUIRKS:
2450         case KVM_CAP_SET_BOOT_CPU_ID:
2451         case KVM_CAP_SPLIT_IRQCHIP:
2452 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2453         case KVM_CAP_ASSIGN_DEV_IRQ:
2454         case KVM_CAP_PCI_2_3:
2455 #endif
2456                 r = 1;
2457                 break;
2458         case KVM_CAP_X86_SMM:
2459                 /* SMBASE is usually relocated above 1M on modern chipsets,
2460                  * and SMM handlers might indeed rely on 4G segment limits,
2461                  * so do not report SMM to be available if real mode is
2462                  * emulated via vm86 mode.  Still, do not go to great lengths
2463                  * to avoid userspace's usage of the feature, because it is a
2464                  * fringe case that is not enabled except via specific settings
2465                  * of the module parameters.
2466                  */
2467                 r = kvm_x86_ops->cpu_has_high_real_mode_segbase();
2468                 break;
2469         case KVM_CAP_COALESCED_MMIO:
2470                 r = KVM_COALESCED_MMIO_PAGE_OFFSET;
2471                 break;
2472         case KVM_CAP_VAPIC:
2473                 r = !kvm_x86_ops->cpu_has_accelerated_tpr();
2474                 break;
2475         case KVM_CAP_NR_VCPUS:
2476                 r = KVM_SOFT_MAX_VCPUS;
2477                 break;
2478         case KVM_CAP_MAX_VCPUS:
2479                 r = KVM_MAX_VCPUS;
2480                 break;
2481         case KVM_CAP_NR_MEMSLOTS:
2482                 r = KVM_USER_MEM_SLOTS;
2483                 break;
2484         case KVM_CAP_PV_MMU:    /* obsolete */
2485                 r = 0;
2486                 break;
2487 #ifdef CONFIG_KVM_DEVICE_ASSIGNMENT
2488         case KVM_CAP_IOMMU:
2489                 r = iommu_present(&pci_bus_type);
2490                 break;
2491 #endif
2492         case KVM_CAP_MCE:
2493                 r = KVM_MAX_MCE_BANKS;
2494                 break;
2495         case KVM_CAP_XCRS:
2496                 r = cpu_has_xsave;
2497                 break;
2498         case KVM_CAP_TSC_CONTROL:
2499                 r = kvm_has_tsc_control;
2500                 break;
2501         default:
2502                 r = 0;
2503                 break;
2504         }
2505         return r;
2506
2507 }
2508
2509 long kvm_arch_dev_ioctl(struct file *filp,
2510                         unsigned int ioctl, unsigned long arg)
2511 {
2512         void __user *argp = (void __user *)arg;
2513         long r;
2514
2515         switch (ioctl) {
2516         case KVM_GET_MSR_INDEX_LIST: {
2517                 struct kvm_msr_list __user *user_msr_list = argp;
2518                 struct kvm_msr_list msr_list;
2519                 unsigned n;
2520
2521                 r = -EFAULT;
2522                 if (copy_from_user(&msr_list, user_msr_list, sizeof msr_list))
2523                         goto out;
2524                 n = msr_list.nmsrs;
2525                 msr_list.nmsrs = num_msrs_to_save + num_emulated_msrs;
2526                 if (copy_to_user(user_msr_list, &msr_list, sizeof msr_list))
2527                         goto out;
2528                 r = -E2BIG;
2529                 if (n < msr_list.nmsrs)
2530                         goto out;
2531                 r = -EFAULT;
2532                 if (copy_to_user(user_msr_list->indices, &msrs_to_save,
2533                                  num_msrs_to_save * sizeof(u32)))
2534                         goto out;
2535                 if (copy_to_user(user_msr_list->indices + num_msrs_to_save,
2536                                  &emulated_msrs,
2537                                  num_emulated_msrs * sizeof(u32)))
2538                         goto out;
2539                 r = 0;
2540                 break;
2541         }
2542         case KVM_GET_SUPPORTED_CPUID:
2543         case KVM_GET_EMULATED_CPUID: {
2544                 struct kvm_cpuid2 __user *cpuid_arg = argp;
2545                 struct kvm_cpuid2 cpuid;
2546
2547                 r = -EFAULT;
2548                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
2549                         goto out;
2550
2551                 r = kvm_dev_ioctl_get_cpuid(&cpuid, cpuid_arg->entries,
2552                                             ioctl);
2553                 if (r)
2554                         goto out;
2555
2556                 r = -EFAULT;
2557                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
2558                         goto out;
2559                 r = 0;
2560                 break;
2561         }
2562         case KVM_X86_GET_MCE_CAP_SUPPORTED: {
2563                 u64 mce_cap;
2564
2565                 mce_cap = KVM_MCE_CAP_SUPPORTED;
2566                 r = -EFAULT;
2567                 if (copy_to_user(argp, &mce_cap, sizeof mce_cap))
2568                         goto out;
2569                 r = 0;
2570                 break;
2571         }
2572         default:
2573                 r = -EINVAL;
2574         }
2575 out:
2576         return r;
2577 }
2578
2579 static void wbinvd_ipi(void *garbage)
2580 {
2581         wbinvd();
2582 }
2583
2584 static bool need_emulate_wbinvd(struct kvm_vcpu *vcpu)
2585 {
2586         return kvm_arch_has_noncoherent_dma(vcpu->kvm);
2587 }
2588
2589 void kvm_arch_vcpu_load(struct kvm_vcpu *vcpu, int cpu)
2590 {
2591         /* Address WBINVD may be executed by guest */
2592         if (need_emulate_wbinvd(vcpu)) {
2593                 if (kvm_x86_ops->has_wbinvd_exit())
2594                         cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
2595                 else if (vcpu->cpu != -1 && vcpu->cpu != cpu)
2596                         smp_call_function_single(vcpu->cpu,
2597                                         wbinvd_ipi, NULL, 1);
2598         }
2599
2600         kvm_x86_ops->vcpu_load(vcpu, cpu);
2601
2602         /* Apply any externally detected TSC adjustments (due to suspend) */
2603         if (unlikely(vcpu->arch.tsc_offset_adjustment)) {
2604                 adjust_tsc_offset_host(vcpu, vcpu->arch.tsc_offset_adjustment);
2605                 vcpu->arch.tsc_offset_adjustment = 0;
2606                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
2607         }
2608
2609         if (unlikely(vcpu->cpu != cpu) || check_tsc_unstable()) {
2610                 s64 tsc_delta = !vcpu->arch.last_host_tsc ? 0 :
2611                                 rdtsc() - vcpu->arch.last_host_tsc;
2612                 if (tsc_delta < 0)
2613                         mark_tsc_unstable("KVM discovered backwards TSC");
2614                 if (check_tsc_unstable()) {
2615                         u64 offset = kvm_x86_ops->compute_tsc_offset(vcpu,
2616                                                 vcpu->arch.last_guest_tsc);
2617                         kvm_x86_ops->write_tsc_offset(vcpu, offset);
2618                         vcpu->arch.tsc_catchup = 1;
2619                 }
2620                 /*
2621                  * On a host with synchronized TSC, there is no need to update
2622                  * kvmclock on vcpu->cpu migration
2623                  */
2624                 if (!vcpu->kvm->arch.use_master_clock || vcpu->cpu == -1)
2625                         kvm_make_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu);
2626                 if (vcpu->cpu != cpu)
2627                         kvm_migrate_timers(vcpu);
2628                 vcpu->cpu = cpu;
2629         }
2630
2631         accumulate_steal_time(vcpu);
2632         kvm_make_request(KVM_REQ_STEAL_UPDATE, vcpu);
2633 }
2634
2635 void kvm_arch_vcpu_put(struct kvm_vcpu *vcpu)
2636 {
2637         kvm_x86_ops->vcpu_put(vcpu);
2638         kvm_put_guest_fpu(vcpu);
2639         vcpu->arch.last_host_tsc = rdtsc();
2640 }
2641
2642 static int kvm_vcpu_ioctl_get_lapic(struct kvm_vcpu *vcpu,
2643                                     struct kvm_lapic_state *s)
2644 {
2645         kvm_x86_ops->sync_pir_to_irr(vcpu);
2646         memcpy(s->regs, vcpu->arch.apic->regs, sizeof *s);
2647
2648         return 0;
2649 }
2650
2651 static int kvm_vcpu_ioctl_set_lapic(struct kvm_vcpu *vcpu,
2652                                     struct kvm_lapic_state *s)
2653 {
2654         kvm_apic_post_state_restore(vcpu, s);
2655         update_cr8_intercept(vcpu);
2656
2657         return 0;
2658 }
2659
2660 static int kvm_vcpu_ioctl_interrupt(struct kvm_vcpu *vcpu,
2661                                     struct kvm_interrupt *irq)
2662 {
2663         if (irq->irq >= KVM_NR_INTERRUPTS)
2664                 return -EINVAL;
2665         if (irqchip_in_kernel(vcpu->kvm))
2666                 return -ENXIO;
2667
2668         kvm_queue_interrupt(vcpu, irq->irq, false);
2669         kvm_make_request(KVM_REQ_EVENT, vcpu);
2670
2671         return 0;
2672 }
2673
2674 static int kvm_vcpu_ioctl_nmi(struct kvm_vcpu *vcpu)
2675 {
2676         kvm_inject_nmi(vcpu);
2677
2678         return 0;
2679 }
2680
2681 static int kvm_vcpu_ioctl_smi(struct kvm_vcpu *vcpu)
2682 {
2683         kvm_make_request(KVM_REQ_SMI, vcpu);
2684
2685         return 0;
2686 }
2687
2688 static int vcpu_ioctl_tpr_access_reporting(struct kvm_vcpu *vcpu,
2689                                            struct kvm_tpr_access_ctl *tac)
2690 {
2691         if (tac->flags)
2692                 return -EINVAL;
2693         vcpu->arch.tpr_access_reporting = !!tac->enabled;
2694         return 0;
2695 }
2696
2697 static int kvm_vcpu_ioctl_x86_setup_mce(struct kvm_vcpu *vcpu,
2698                                         u64 mcg_cap)
2699 {
2700         int r;
2701         unsigned bank_num = mcg_cap & 0xff, bank;
2702
2703         r = -EINVAL;
2704         if (!bank_num || bank_num >= KVM_MAX_MCE_BANKS)
2705                 goto out;
2706         if (mcg_cap & ~(KVM_MCE_CAP_SUPPORTED | 0xff | 0xff0000))
2707                 goto out;
2708         r = 0;
2709         vcpu->arch.mcg_cap = mcg_cap;
2710         /* Init IA32_MCG_CTL to all 1s */
2711         if (mcg_cap & MCG_CTL_P)
2712                 vcpu->arch.mcg_ctl = ~(u64)0;
2713         /* Init IA32_MCi_CTL to all 1s */
2714         for (bank = 0; bank < bank_num; bank++)
2715                 vcpu->arch.mce_banks[bank*4] = ~(u64)0;
2716 out:
2717         return r;
2718 }
2719
2720 static int kvm_vcpu_ioctl_x86_set_mce(struct kvm_vcpu *vcpu,
2721                                       struct kvm_x86_mce *mce)
2722 {
2723         u64 mcg_cap = vcpu->arch.mcg_cap;
2724         unsigned bank_num = mcg_cap & 0xff;
2725         u64 *banks = vcpu->arch.mce_banks;
2726
2727         if (mce->bank >= bank_num || !(mce->status & MCI_STATUS_VAL))
2728                 return -EINVAL;
2729         /*
2730          * if IA32_MCG_CTL is not all 1s, the uncorrected error
2731          * reporting is disabled
2732          */
2733         if ((mce->status & MCI_STATUS_UC) && (mcg_cap & MCG_CTL_P) &&
2734             vcpu->arch.mcg_ctl != ~(u64)0)
2735                 return 0;
2736         banks += 4 * mce->bank;
2737         /*
2738          * if IA32_MCi_CTL is not all 1s, the uncorrected error
2739          * reporting is disabled for the bank
2740          */
2741         if ((mce->status & MCI_STATUS_UC) && banks[0] != ~(u64)0)
2742                 return 0;
2743         if (mce->status & MCI_STATUS_UC) {
2744                 if ((vcpu->arch.mcg_status & MCG_STATUS_MCIP) ||
2745                     !kvm_read_cr4_bits(vcpu, X86_CR4_MCE)) {
2746                         kvm_make_request(KVM_REQ_TRIPLE_FAULT, vcpu);
2747                         return 0;
2748                 }
2749                 if (banks[1] & MCI_STATUS_VAL)
2750                         mce->status |= MCI_STATUS_OVER;
2751                 banks[2] = mce->addr;
2752                 banks[3] = mce->misc;
2753                 vcpu->arch.mcg_status = mce->mcg_status;
2754                 banks[1] = mce->status;
2755                 kvm_queue_exception(vcpu, MC_VECTOR);
2756         } else if (!(banks[1] & MCI_STATUS_VAL)
2757                    || !(banks[1] & MCI_STATUS_UC)) {
2758                 if (banks[1] & MCI_STATUS_VAL)
2759                         mce->status |= MCI_STATUS_OVER;
2760                 banks[2] = mce->addr;
2761                 banks[3] = mce->misc;
2762                 banks[1] = mce->status;
2763         } else
2764                 banks[1] |= MCI_STATUS_OVER;
2765         return 0;
2766 }
2767
2768 static void kvm_vcpu_ioctl_x86_get_vcpu_events(struct kvm_vcpu *vcpu,
2769                                                struct kvm_vcpu_events *events)
2770 {
2771         process_nmi(vcpu);
2772         events->exception.injected =
2773                 vcpu->arch.exception.pending &&
2774                 !kvm_exception_is_soft(vcpu->arch.exception.nr);
2775         events->exception.nr = vcpu->arch.exception.nr;
2776         events->exception.has_error_code = vcpu->arch.exception.has_error_code;
2777         events->exception.pad = 0;
2778         events->exception.error_code = vcpu->arch.exception.error_code;
2779
2780         events->interrupt.injected =
2781                 vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft;
2782         events->interrupt.nr = vcpu->arch.interrupt.nr;
2783         events->interrupt.soft = 0;
2784         events->interrupt.shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
2785
2786         events->nmi.injected = vcpu->arch.nmi_injected;
2787         events->nmi.pending = vcpu->arch.nmi_pending != 0;
2788         events->nmi.masked = kvm_x86_ops->get_nmi_mask(vcpu);
2789         events->nmi.pad = 0;
2790
2791         events->sipi_vector = 0; /* never valid when reporting to user space */
2792
2793         events->smi.smm = is_smm(vcpu);
2794         events->smi.pending = vcpu->arch.smi_pending;
2795         events->smi.smm_inside_nmi =
2796                 !!(vcpu->arch.hflags & HF_SMM_INSIDE_NMI_MASK);
2797         events->smi.latched_init = kvm_lapic_latched_init(vcpu);
2798
2799         events->flags = (KVM_VCPUEVENT_VALID_NMI_PENDING
2800                          | KVM_VCPUEVENT_VALID_SHADOW
2801                          | KVM_VCPUEVENT_VALID_SMM);
2802         memset(&events->reserved, 0, sizeof(events->reserved));
2803 }
2804
2805 static int kvm_vcpu_ioctl_x86_set_vcpu_events(struct kvm_vcpu *vcpu,
2806                                               struct kvm_vcpu_events *events)
2807 {
2808         if (events->flags & ~(KVM_VCPUEVENT_VALID_NMI_PENDING
2809                               | KVM_VCPUEVENT_VALID_SIPI_VECTOR
2810                               | KVM_VCPUEVENT_VALID_SHADOW
2811                               | KVM_VCPUEVENT_VALID_SMM))
2812                 return -EINVAL;
2813
2814         process_nmi(vcpu);
2815         vcpu->arch.exception.pending = events->exception.injected;
2816         vcpu->arch.exception.nr = events->exception.nr;
2817         vcpu->arch.exception.has_error_code = events->exception.has_error_code;
2818         vcpu->arch.exception.error_code = events->exception.error_code;
2819
2820         vcpu->arch.interrupt.pending = events->interrupt.injected;
2821         vcpu->arch.interrupt.nr = events->interrupt.nr;
2822         vcpu->arch.interrupt.soft = events->interrupt.soft;
2823         if (events->flags & KVM_VCPUEVENT_VALID_SHADOW)
2824                 kvm_x86_ops->set_interrupt_shadow(vcpu,
2825                                                   events->interrupt.shadow);
2826
2827         vcpu->arch.nmi_injected = events->nmi.injected;
2828         if (events->flags & KVM_VCPUEVENT_VALID_NMI_PENDING)
2829                 vcpu->arch.nmi_pending = events->nmi.pending;
2830         kvm_x86_ops->set_nmi_mask(vcpu, events->nmi.masked);
2831
2832         if (events->flags & KVM_VCPUEVENT_VALID_SIPI_VECTOR &&
2833             kvm_vcpu_has_lapic(vcpu))
2834                 vcpu->arch.apic->sipi_vector = events->sipi_vector;
2835
2836         if (events->flags & KVM_VCPUEVENT_VALID_SMM) {
2837                 if (events->smi.smm)
2838                         vcpu->arch.hflags |= HF_SMM_MASK;
2839                 else
2840                         vcpu->arch.hflags &= ~HF_SMM_MASK;
2841                 vcpu->arch.smi_pending = events->smi.pending;
2842                 if (events->smi.smm_inside_nmi)
2843                         vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
2844                 else
2845                         vcpu->arch.hflags &= ~HF_SMM_INSIDE_NMI_MASK;
2846                 if (kvm_vcpu_has_lapic(vcpu)) {
2847                         if (events->smi.latched_init)
2848                                 set_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2849                         else
2850                                 clear_bit(KVM_APIC_INIT, &vcpu->arch.apic->pending_events);
2851                 }
2852         }
2853
2854         kvm_make_request(KVM_REQ_EVENT, vcpu);
2855
2856         return 0;
2857 }
2858
2859 static void kvm_vcpu_ioctl_x86_get_debugregs(struct kvm_vcpu *vcpu,
2860                                              struct kvm_debugregs *dbgregs)
2861 {
2862         unsigned long val;
2863
2864         memcpy(dbgregs->db, vcpu->arch.db, sizeof(vcpu->arch.db));
2865         kvm_get_dr(vcpu, 6, &val);
2866         dbgregs->dr6 = val;
2867         dbgregs->dr7 = vcpu->arch.dr7;
2868         dbgregs->flags = 0;
2869         memset(&dbgregs->reserved, 0, sizeof(dbgregs->reserved));
2870 }
2871
2872 static int kvm_vcpu_ioctl_x86_set_debugregs(struct kvm_vcpu *vcpu,
2873                                             struct kvm_debugregs *dbgregs)
2874 {
2875         if (dbgregs->flags)
2876                 return -EINVAL;
2877
2878         memcpy(vcpu->arch.db, dbgregs->db, sizeof(vcpu->arch.db));
2879         kvm_update_dr0123(vcpu);
2880         vcpu->arch.dr6 = dbgregs->dr6;
2881         kvm_update_dr6(vcpu);
2882         vcpu->arch.dr7 = dbgregs->dr7;
2883         kvm_update_dr7(vcpu);
2884
2885         return 0;
2886 }
2887
2888 #define XSTATE_COMPACTION_ENABLED (1ULL << 63)
2889
2890 static void fill_xsave(u8 *dest, struct kvm_vcpu *vcpu)
2891 {
2892         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2893         u64 xstate_bv = xsave->header.xfeatures;
2894         u64 valid;
2895
2896         /*
2897          * Copy legacy XSAVE area, to avoid complications with CPUID
2898          * leaves 0 and 1 in the loop below.
2899          */
2900         memcpy(dest, xsave, XSAVE_HDR_OFFSET);
2901
2902         /* Set XSTATE_BV */
2903         *(u64 *)(dest + XSAVE_HDR_OFFSET) = xstate_bv;
2904
2905         /*
2906          * Copy each region from the possibly compacted offset to the
2907          * non-compacted offset.
2908          */
2909         valid = xstate_bv & ~XSTATE_FPSSE;
2910         while (valid) {
2911                 u64 feature = valid & -valid;
2912                 int index = fls64(feature) - 1;
2913                 void *src = get_xsave_addr(xsave, feature);
2914
2915                 if (src) {
2916                         u32 size, offset, ecx, edx;
2917                         cpuid_count(XSTATE_CPUID, index,
2918                                     &size, &offset, &ecx, &edx);
2919                         memcpy(dest + offset, src, size);
2920                 }
2921
2922                 valid -= feature;
2923         }
2924 }
2925
2926 static void load_xsave(struct kvm_vcpu *vcpu, u8 *src)
2927 {
2928         struct xregs_state *xsave = &vcpu->arch.guest_fpu.state.xsave;
2929         u64 xstate_bv = *(u64 *)(src + XSAVE_HDR_OFFSET);
2930         u64 valid;
2931
2932         /*
2933          * Copy legacy XSAVE area, to avoid complications with CPUID
2934          * leaves 0 and 1 in the loop below.
2935          */
2936         memcpy(xsave, src, XSAVE_HDR_OFFSET);
2937
2938         /* Set XSTATE_BV and possibly XCOMP_BV.  */
2939         xsave->header.xfeatures = xstate_bv;
2940         if (cpu_has_xsaves)
2941                 xsave->header.xcomp_bv = host_xcr0 | XSTATE_COMPACTION_ENABLED;
2942
2943         /*
2944          * Copy each region from the non-compacted offset to the
2945          * possibly compacted offset.
2946          */
2947         valid = xstate_bv & ~XSTATE_FPSSE;
2948         while (valid) {
2949                 u64 feature = valid & -valid;
2950                 int index = fls64(feature) - 1;
2951                 void *dest = get_xsave_addr(xsave, feature);
2952
2953                 if (dest) {
2954                         u32 size, offset, ecx, edx;
2955                         cpuid_count(XSTATE_CPUID, index,
2956                                     &size, &offset, &ecx, &edx);
2957                         memcpy(dest, src + offset, size);
2958                 }
2959
2960                 valid -= feature;
2961         }
2962 }
2963
2964 static void kvm_vcpu_ioctl_x86_get_xsave(struct kvm_vcpu *vcpu,
2965                                          struct kvm_xsave *guest_xsave)
2966 {
2967         if (cpu_has_xsave) {
2968                 memset(guest_xsave, 0, sizeof(struct kvm_xsave));
2969                 fill_xsave((u8 *) guest_xsave->region, vcpu);
2970         } else {
2971                 memcpy(guest_xsave->region,
2972                         &vcpu->arch.guest_fpu.state.fxsave,
2973                         sizeof(struct fxregs_state));
2974                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)] =
2975                         XSTATE_FPSSE;
2976         }
2977 }
2978
2979 static int kvm_vcpu_ioctl_x86_set_xsave(struct kvm_vcpu *vcpu,
2980                                         struct kvm_xsave *guest_xsave)
2981 {
2982         u64 xstate_bv =
2983                 *(u64 *)&guest_xsave->region[XSAVE_HDR_OFFSET / sizeof(u32)];
2984
2985         if (cpu_has_xsave) {
2986                 /*
2987                  * Here we allow setting states that are not present in
2988                  * CPUID leaf 0xD, index 0, EDX:EAX.  This is for compatibility
2989                  * with old userspace.
2990                  */
2991                 if (xstate_bv & ~kvm_supported_xcr0())
2992                         return -EINVAL;
2993                 load_xsave(vcpu, (u8 *)guest_xsave->region);
2994         } else {
2995                 if (xstate_bv & ~XSTATE_FPSSE)
2996                         return -EINVAL;
2997                 memcpy(&vcpu->arch.guest_fpu.state.fxsave,
2998                         guest_xsave->region, sizeof(struct fxregs_state));
2999         }
3000         return 0;
3001 }
3002
3003 static void kvm_vcpu_ioctl_x86_get_xcrs(struct kvm_vcpu *vcpu,
3004                                         struct kvm_xcrs *guest_xcrs)
3005 {
3006         if (!cpu_has_xsave) {
3007                 guest_xcrs->nr_xcrs = 0;
3008                 return;
3009         }
3010
3011         guest_xcrs->nr_xcrs = 1;
3012         guest_xcrs->flags = 0;
3013         guest_xcrs->xcrs[0].xcr = XCR_XFEATURE_ENABLED_MASK;
3014         guest_xcrs->xcrs[0].value = vcpu->arch.xcr0;
3015 }
3016
3017 static int kvm_vcpu_ioctl_x86_set_xcrs(struct kvm_vcpu *vcpu,
3018                                        struct kvm_xcrs *guest_xcrs)
3019 {
3020         int i, r = 0;
3021
3022         if (!cpu_has_xsave)
3023                 return -EINVAL;
3024
3025         if (guest_xcrs->nr_xcrs > KVM_MAX_XCRS || guest_xcrs->flags)
3026                 return -EINVAL;
3027
3028         for (i = 0; i < guest_xcrs->nr_xcrs; i++)
3029                 /* Only support XCR0 currently */
3030                 if (guest_xcrs->xcrs[i].xcr == XCR_XFEATURE_ENABLED_MASK) {
3031                         r = __kvm_set_xcr(vcpu, XCR_XFEATURE_ENABLED_MASK,
3032                                 guest_xcrs->xcrs[i].value);
3033                         break;
3034                 }
3035         if (r)
3036                 r = -EINVAL;
3037         return r;
3038 }
3039
3040 /*
3041  * kvm_set_guest_paused() indicates to the guest kernel that it has been
3042  * stopped by the hypervisor.  This function will be called from the host only.
3043  * EINVAL is returned when the host attempts to set the flag for a guest that
3044  * does not support pv clocks.
3045  */
3046 static int kvm_set_guest_paused(struct kvm_vcpu *vcpu)
3047 {
3048         if (!vcpu->arch.pv_time_enabled)
3049                 return -EINVAL;
3050         vcpu->arch.pvclock_set_guest_stopped_request = true;
3051         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
3052         return 0;
3053 }
3054
3055 long kvm_arch_vcpu_ioctl(struct file *filp,
3056                          unsigned int ioctl, unsigned long arg)
3057 {
3058         struct kvm_vcpu *vcpu = filp->private_data;
3059         void __user *argp = (void __user *)arg;
3060         int r;
3061         union {
3062                 struct kvm_lapic_state *lapic;
3063                 struct kvm_xsave *xsave;
3064                 struct kvm_xcrs *xcrs;
3065                 void *buffer;
3066         } u;
3067
3068         u.buffer = NULL;
3069         switch (ioctl) {
3070         case KVM_GET_LAPIC: {
3071                 r = -EINVAL;
3072                 if (!vcpu->arch.apic)
3073                         goto out;
3074                 u.lapic = kzalloc(sizeof(struct kvm_lapic_state), GFP_KERNEL);
3075
3076                 r = -ENOMEM;
3077                 if (!u.lapic)
3078                         goto out;
3079                 r = kvm_vcpu_ioctl_get_lapic(vcpu, u.lapic);
3080                 if (r)
3081                         goto out;
3082                 r = -EFAULT;
3083                 if (copy_to_user(argp, u.lapic, sizeof(struct kvm_lapic_state)))
3084                         goto out;
3085                 r = 0;
3086                 break;
3087         }
3088         case KVM_SET_LAPIC: {
3089                 r = -EINVAL;
3090                 if (!vcpu->arch.apic)
3091                         goto out;
3092                 u.lapic = memdup_user(argp, sizeof(*u.lapic));
3093                 if (IS_ERR(u.lapic))
3094                         return PTR_ERR(u.lapic);
3095
3096                 r = kvm_vcpu_ioctl_set_lapic(vcpu, u.lapic);
3097                 break;
3098         }
3099         case KVM_INTERRUPT: {
3100                 struct kvm_interrupt irq;
3101
3102                 r = -EFAULT;
3103                 if (copy_from_user(&irq, argp, sizeof irq))
3104                         goto out;
3105                 r = kvm_vcpu_ioctl_interrupt(vcpu, &irq);
3106                 break;
3107         }
3108         case KVM_NMI: {
3109                 r = kvm_vcpu_ioctl_nmi(vcpu);
3110                 break;
3111         }
3112         case KVM_SMI: {
3113                 r = kvm_vcpu_ioctl_smi(vcpu);
3114                 break;
3115         }
3116         case KVM_SET_CPUID: {
3117                 struct kvm_cpuid __user *cpuid_arg = argp;
3118                 struct kvm_cpuid cpuid;
3119
3120                 r = -EFAULT;
3121                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3122                         goto out;
3123                 r = kvm_vcpu_ioctl_set_cpuid(vcpu, &cpuid, cpuid_arg->entries);
3124                 break;
3125         }
3126         case KVM_SET_CPUID2: {
3127                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3128                 struct kvm_cpuid2 cpuid;
3129
3130                 r = -EFAULT;
3131                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3132                         goto out;
3133                 r = kvm_vcpu_ioctl_set_cpuid2(vcpu, &cpuid,
3134                                               cpuid_arg->entries);
3135                 break;
3136         }
3137         case KVM_GET_CPUID2: {
3138                 struct kvm_cpuid2 __user *cpuid_arg = argp;
3139                 struct kvm_cpuid2 cpuid;
3140
3141                 r = -EFAULT;
3142                 if (copy_from_user(&cpuid, cpuid_arg, sizeof cpuid))
3143                         goto out;
3144                 r = kvm_vcpu_ioctl_get_cpuid2(vcpu, &cpuid,
3145                                               cpuid_arg->entries);
3146                 if (r)
3147                         goto out;
3148                 r = -EFAULT;
3149                 if (copy_to_user(cpuid_arg, &cpuid, sizeof cpuid))
3150                         goto out;
3151                 r = 0;
3152                 break;
3153         }
3154         case KVM_GET_MSRS:
3155                 r = msr_io(vcpu, argp, do_get_msr, 1);
3156                 break;
3157         case KVM_SET_MSRS:
3158                 r = msr_io(vcpu, argp, do_set_msr, 0);
3159                 break;
3160         case KVM_TPR_ACCESS_REPORTING: {
3161                 struct kvm_tpr_access_ctl tac;
3162
3163                 r = -EFAULT;
3164                 if (copy_from_user(&tac, argp, sizeof tac))
3165                         goto out;
3166                 r = vcpu_ioctl_tpr_access_reporting(vcpu, &tac);
3167                 if (r)
3168                         goto out;
3169                 r = -EFAULT;
3170                 if (copy_to_user(argp, &tac, sizeof tac))
3171                         goto out;
3172                 r = 0;
3173                 break;
3174         };
3175         case KVM_SET_VAPIC_ADDR: {
3176                 struct kvm_vapic_addr va;
3177
3178                 r = -EINVAL;
3179                 if (!lapic_in_kernel(vcpu))
3180                         goto out;
3181                 r = -EFAULT;
3182                 if (copy_from_user(&va, argp, sizeof va))
3183                         goto out;
3184                 r = kvm_lapic_set_vapic_addr(vcpu, va.vapic_addr);
3185                 break;
3186         }
3187         case KVM_X86_SETUP_MCE: {
3188                 u64 mcg_cap;
3189
3190                 r = -EFAULT;
3191                 if (copy_from_user(&mcg_cap, argp, sizeof mcg_cap))
3192                         goto out;
3193                 r = kvm_vcpu_ioctl_x86_setup_mce(vcpu, mcg_cap);
3194                 break;
3195         }
3196         case KVM_X86_SET_MCE: {
3197                 struct kvm_x86_mce mce;
3198
3199                 r = -EFAULT;
3200                 if (copy_from_user(&mce, argp, sizeof mce))
3201                         goto out;
3202                 r = kvm_vcpu_ioctl_x86_set_mce(vcpu, &mce);
3203                 break;
3204         }
3205         case KVM_GET_VCPU_EVENTS: {
3206                 struct kvm_vcpu_events events;
3207
3208                 kvm_vcpu_ioctl_x86_get_vcpu_events(vcpu, &events);
3209
3210                 r = -EFAULT;
3211                 if (copy_to_user(argp, &events, sizeof(struct kvm_vcpu_events)))
3212                         break;
3213                 r = 0;
3214                 break;
3215         }
3216         case KVM_SET_VCPU_EVENTS: {
3217                 struct kvm_vcpu_events events;
3218
3219                 r = -EFAULT;
3220                 if (copy_from_user(&events, argp, sizeof(struct kvm_vcpu_events)))
3221                         break;
3222
3223                 r = kvm_vcpu_ioctl_x86_set_vcpu_events(vcpu, &events);
3224                 break;
3225         }
3226         case KVM_GET_DEBUGREGS: {
3227                 struct kvm_debugregs dbgregs;
3228
3229                 kvm_vcpu_ioctl_x86_get_debugregs(vcpu, &dbgregs);
3230
3231                 r = -EFAULT;
3232                 if (copy_to_user(argp, &dbgregs,
3233                                  sizeof(struct kvm_debugregs)))
3234                         break;
3235                 r = 0;
3236                 break;
3237         }
3238         case KVM_SET_DEBUGREGS: {
3239                 struct kvm_debugregs dbgregs;
3240
3241                 r = -EFAULT;
3242                 if (copy_from_user(&dbgregs, argp,
3243                                    sizeof(struct kvm_debugregs)))
3244                         break;
3245
3246                 r = kvm_vcpu_ioctl_x86_set_debugregs(vcpu, &dbgregs);
3247                 break;
3248         }
3249         case KVM_GET_XSAVE: {
3250                 u.xsave = kzalloc(sizeof(struct kvm_xsave), GFP_KERNEL);
3251                 r = -ENOMEM;
3252                 if (!u.xsave)
3253                         break;
3254
3255                 kvm_vcpu_ioctl_x86_get_xsave(vcpu, u.xsave);
3256
3257                 r = -EFAULT;
3258                 if (copy_to_user(argp, u.xsave, sizeof(struct kvm_xsave)))
3259                         break;
3260                 r = 0;
3261                 break;
3262         }
3263         case KVM_SET_XSAVE: {
3264                 u.xsave = memdup_user(argp, sizeof(*u.xsave));
3265                 if (IS_ERR(u.xsave))
3266                         return PTR_ERR(u.xsave);
3267
3268                 r = kvm_vcpu_ioctl_x86_set_xsave(vcpu, u.xsave);
3269                 break;
3270         }
3271         case KVM_GET_XCRS: {
3272                 u.xcrs = kzalloc(sizeof(struct kvm_xcrs), GFP_KERNEL);
3273                 r = -ENOMEM;
3274                 if (!u.xcrs)
3275                         break;
3276
3277                 kvm_vcpu_ioctl_x86_get_xcrs(vcpu, u.xcrs);
3278
3279                 r = -EFAULT;
3280                 if (copy_to_user(argp, u.xcrs,
3281                                  sizeof(struct kvm_xcrs)))
3282                         break;
3283                 r = 0;
3284                 break;
3285         }
3286         case KVM_SET_XCRS: {
3287                 u.xcrs = memdup_user(argp, sizeof(*u.xcrs));
3288                 if (IS_ERR(u.xcrs))
3289                         return PTR_ERR(u.xcrs);
3290
3291                 r = kvm_vcpu_ioctl_x86_set_xcrs(vcpu, u.xcrs);
3292                 break;
3293         }
3294         case KVM_SET_TSC_KHZ: {
3295                 u32 user_tsc_khz;
3296
3297                 r = -EINVAL;
3298                 user_tsc_khz = (u32)arg;
3299
3300                 if (user_tsc_khz >= kvm_max_guest_tsc_khz)
3301                         goto out;
3302
3303                 if (user_tsc_khz == 0)
3304                         user_tsc_khz = tsc_khz;
3305
3306                 kvm_set_tsc_khz(vcpu, user_tsc_khz);
3307
3308                 r = 0;
3309                 goto out;
3310         }
3311         case KVM_GET_TSC_KHZ: {
3312                 r = vcpu->arch.virtual_tsc_khz;
3313                 goto out;
3314         }
3315         case KVM_KVMCLOCK_CTRL: {
3316                 r = kvm_set_guest_paused(vcpu);
3317                 goto out;
3318         }
3319         default:
3320                 r = -EINVAL;
3321         }
3322 out:
3323         kfree(u.buffer);
3324         return r;
3325 }
3326
3327 int kvm_arch_vcpu_fault(struct kvm_vcpu *vcpu, struct vm_fault *vmf)
3328 {
3329         return VM_FAULT_SIGBUS;
3330 }
3331
3332 static int kvm_vm_ioctl_set_tss_addr(struct kvm *kvm, unsigned long addr)
3333 {
3334         int ret;
3335
3336         if (addr > (unsigned int)(-3 * PAGE_SIZE))
3337                 return -EINVAL;
3338         ret = kvm_x86_ops->set_tss_addr(kvm, addr);
3339         return ret;
3340 }
3341
3342 static int kvm_vm_ioctl_set_identity_map_addr(struct kvm *kvm,
3343                                               u64 ident_addr)
3344 {
3345         kvm->arch.ept_identity_map_addr = ident_addr;
3346         return 0;
3347 }
3348
3349 static int kvm_vm_ioctl_set_nr_mmu_pages(struct kvm *kvm,
3350                                           u32 kvm_nr_mmu_pages)
3351 {
3352         if (kvm_nr_mmu_pages < KVM_MIN_ALLOC_MMU_PAGES)
3353                 return -EINVAL;
3354
3355         mutex_lock(&kvm->slots_lock);
3356
3357         kvm_mmu_change_mmu_pages(kvm, kvm_nr_mmu_pages);
3358         kvm->arch.n_requested_mmu_pages = kvm_nr_mmu_pages;
3359
3360         mutex_unlock(&kvm->slots_lock);
3361         return 0;
3362 }
3363
3364 static int kvm_vm_ioctl_get_nr_mmu_pages(struct kvm *kvm)
3365 {
3366         return kvm->arch.n_max_mmu_pages;
3367 }
3368
3369 static int kvm_vm_ioctl_get_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3370 {
3371         int r;
3372
3373         r = 0;
3374         switch (chip->chip_id) {
3375         case KVM_IRQCHIP_PIC_MASTER:
3376                 memcpy(&chip->chip.pic,
3377                         &pic_irqchip(kvm)->pics[0],
3378                         sizeof(struct kvm_pic_state));
3379                 break;
3380         case KVM_IRQCHIP_PIC_SLAVE:
3381                 memcpy(&chip->chip.pic,
3382                         &pic_irqchip(kvm)->pics[1],
3383                         sizeof(struct kvm_pic_state));
3384                 break;
3385         case KVM_IRQCHIP_IOAPIC:
3386                 r = kvm_get_ioapic(kvm, &chip->chip.ioapic);
3387                 break;
3388         default:
3389                 r = -EINVAL;
3390                 break;
3391         }
3392         return r;
3393 }
3394
3395 static int kvm_vm_ioctl_set_irqchip(struct kvm *kvm, struct kvm_irqchip *chip)
3396 {
3397         int r;
3398
3399         r = 0;
3400         switch (chip->chip_id) {
3401         case KVM_IRQCHIP_PIC_MASTER:
3402                 spin_lock(&pic_irqchip(kvm)->lock);
3403                 memcpy(&pic_irqchip(kvm)->pics[0],
3404                         &chip->chip.pic,
3405                         sizeof(struct kvm_pic_state));
3406                 spin_unlock(&pic_irqchip(kvm)->lock);
3407                 break;
3408         case KVM_IRQCHIP_PIC_SLAVE:
3409                 spin_lock(&pic_irqchip(kvm)->lock);
3410                 memcpy(&pic_irqchip(kvm)->pics[1],
3411                         &chip->chip.pic,
3412                         sizeof(struct kvm_pic_state));
3413                 spin_unlock(&pic_irqchip(kvm)->lock);
3414                 break;
3415         case KVM_IRQCHIP_IOAPIC:
3416                 r = kvm_set_ioapic(kvm, &chip->chip.ioapic);
3417                 break;
3418         default:
3419                 r = -EINVAL;
3420                 break;
3421         }
3422         kvm_pic_update_irq(pic_irqchip(kvm));
3423         return r;
3424 }
3425
3426 static int kvm_vm_ioctl_get_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3427 {
3428         int r = 0;
3429
3430         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3431         memcpy(ps, &kvm->arch.vpit->pit_state, sizeof(struct kvm_pit_state));
3432         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3433         return r;
3434 }
3435
3436 static int kvm_vm_ioctl_set_pit(struct kvm *kvm, struct kvm_pit_state *ps)
3437 {
3438         int r = 0;
3439
3440         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3441         memcpy(&kvm->arch.vpit->pit_state, ps, sizeof(struct kvm_pit_state));
3442         kvm_pit_load_count(kvm, 0, ps->channels[0].count, 0);
3443         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3444         return r;
3445 }
3446
3447 static int kvm_vm_ioctl_get_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3448 {
3449         int r = 0;
3450
3451         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3452         memcpy(ps->channels, &kvm->arch.vpit->pit_state.channels,
3453                 sizeof(ps->channels));
3454         ps->flags = kvm->arch.vpit->pit_state.flags;
3455         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3456         memset(&ps->reserved, 0, sizeof(ps->reserved));
3457         return r;
3458 }
3459
3460 static int kvm_vm_ioctl_set_pit2(struct kvm *kvm, struct kvm_pit_state2 *ps)
3461 {
3462         int r = 0, start = 0;
3463         u32 prev_legacy, cur_legacy;
3464         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3465         prev_legacy = kvm->arch.vpit->pit_state.flags & KVM_PIT_FLAGS_HPET_LEGACY;
3466         cur_legacy = ps->flags & KVM_PIT_FLAGS_HPET_LEGACY;
3467         if (!prev_legacy && cur_legacy)
3468                 start = 1;
3469         memcpy(&kvm->arch.vpit->pit_state.channels, &ps->channels,
3470                sizeof(kvm->arch.vpit->pit_state.channels));
3471         kvm->arch.vpit->pit_state.flags = ps->flags;
3472         kvm_pit_load_count(kvm, 0, kvm->arch.vpit->pit_state.channels[0].count, start);
3473         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3474         return r;
3475 }
3476
3477 static int kvm_vm_ioctl_reinject(struct kvm *kvm,
3478                                  struct kvm_reinject_control *control)
3479 {
3480         if (!kvm->arch.vpit)
3481                 return -ENXIO;
3482         mutex_lock(&kvm->arch.vpit->pit_state.lock);
3483         kvm->arch.vpit->pit_state.reinject = control->pit_reinject;
3484         mutex_unlock(&kvm->arch.vpit->pit_state.lock);
3485         return 0;
3486 }
3487
3488 /**
3489  * kvm_vm_ioctl_get_dirty_log - get and clear the log of dirty pages in a slot
3490  * @kvm: kvm instance
3491  * @log: slot id and address to which we copy the log
3492  *
3493  * Steps 1-4 below provide general overview of dirty page logging. See
3494  * kvm_get_dirty_log_protect() function description for additional details.
3495  *
3496  * We call kvm_get_dirty_log_protect() to handle steps 1-3, upon return we
3497  * always flush the TLB (step 4) even if previous step failed  and the dirty
3498  * bitmap may be corrupt. Regardless of previous outcome the KVM logging API
3499  * does not preclude user space subsequent dirty log read. Flushing TLB ensures
3500  * writes will be marked dirty for next log read.
3501  *
3502  *   1. Take a snapshot of the bit and clear it if needed.
3503  *   2. Write protect the corresponding page.
3504  *   3. Copy the snapshot to the userspace.
3505  *   4. Flush TLB's if needed.
3506  */
3507 int kvm_vm_ioctl_get_dirty_log(struct kvm *kvm, struct kvm_dirty_log *log)
3508 {
3509         bool is_dirty = false;
3510         int r;
3511
3512         mutex_lock(&kvm->slots_lock);
3513
3514         /*
3515          * Flush potentially hardware-cached dirty pages to dirty_bitmap.
3516          */
3517         if (kvm_x86_ops->flush_log_dirty)
3518                 kvm_x86_ops->flush_log_dirty(kvm);
3519
3520         r = kvm_get_dirty_log_protect(kvm, log, &is_dirty);
3521
3522         /*
3523          * All the TLBs can be flushed out of mmu lock, see the comments in
3524          * kvm_mmu_slot_remove_write_access().
3525          */
3526         lockdep_assert_held(&kvm->slots_lock);
3527         if (is_dirty)
3528                 kvm_flush_remote_tlbs(kvm);
3529
3530         mutex_unlock(&kvm->slots_lock);
3531         return r;
3532 }
3533
3534 int kvm_vm_ioctl_irq_line(struct kvm *kvm, struct kvm_irq_level *irq_event,
3535                         bool line_status)
3536 {
3537         if (!irqchip_in_kernel(kvm))
3538                 return -ENXIO;
3539
3540         irq_event->status = kvm_set_irq(kvm, KVM_USERSPACE_IRQ_SOURCE_ID,
3541                                         irq_event->irq, irq_event->level,
3542                                         line_status);
3543         return 0;
3544 }
3545
3546 static int kvm_vm_ioctl_enable_cap(struct kvm *kvm,
3547                                    struct kvm_enable_cap *cap)
3548 {
3549         int r;
3550
3551         if (cap->flags)
3552                 return -EINVAL;
3553
3554         switch (cap->cap) {
3555         case KVM_CAP_DISABLE_QUIRKS:
3556                 kvm->arch.disabled_quirks = cap->args[0];
3557                 r = 0;
3558                 break;
3559         case KVM_CAP_SPLIT_IRQCHIP: {
3560                 mutex_lock(&kvm->lock);
3561                 r = -EEXIST;
3562                 if (irqchip_in_kernel(kvm))
3563                         goto split_irqchip_unlock;
3564                 if (atomic_read(&kvm->online_vcpus))
3565                         goto split_irqchip_unlock;
3566                 r = kvm_setup_empty_irq_routing(kvm);
3567                 if (r)
3568                         goto split_irqchip_unlock;
3569                 /* Pairs with irqchip_in_kernel. */
3570                 smp_wmb();
3571                 kvm->arch.irqchip_split = true;
3572                 r = 0;
3573 split_irqchip_unlock:
3574                 mutex_unlock(&kvm->lock);
3575                 break;
3576         }
3577         default:
3578                 r = -EINVAL;
3579                 break;
3580         }
3581         return r;
3582 }
3583
3584 long kvm_arch_vm_ioctl(struct file *filp,
3585                        unsigned int ioctl, unsigned long arg)
3586 {
3587         struct kvm *kvm = filp->private_data;
3588         void __user *argp = (void __user *)arg;
3589         int r = -ENOTTY;
3590         /*
3591          * This union makes it completely explicit to gcc-3.x
3592          * that these two variables' stack usage should be
3593          * combined, not added together.
3594          */
3595         union {
3596                 struct kvm_pit_state ps;
3597                 struct kvm_pit_state2 ps2;
3598                 struct kvm_pit_config pit_config;
3599         } u;
3600
3601         switch (ioctl) {
3602         case KVM_SET_TSS_ADDR:
3603                 r = kvm_vm_ioctl_set_tss_addr(kvm, arg);
3604                 break;
3605         case KVM_SET_IDENTITY_MAP_ADDR: {
3606                 u64 ident_addr;
3607
3608                 r = -EFAULT;
3609                 if (copy_from_user(&ident_addr, argp, sizeof ident_addr))
3610                         goto out;
3611                 r = kvm_vm_ioctl_set_identity_map_addr(kvm, ident_addr);
3612                 break;
3613         }
3614         case KVM_SET_NR_MMU_PAGES:
3615                 r = kvm_vm_ioctl_set_nr_mmu_pages(kvm, arg);
3616                 break;
3617         case KVM_GET_NR_MMU_PAGES:
3618                 r = kvm_vm_ioctl_get_nr_mmu_pages(kvm);
3619                 break;
3620         case KVM_CREATE_IRQCHIP: {
3621                 struct kvm_pic *vpic;
3622
3623                 mutex_lock(&kvm->lock);
3624                 r = -EEXIST;
3625                 if (kvm->arch.vpic)
3626                         goto create_irqchip_unlock;
3627                 r = -EINVAL;
3628                 if (atomic_read(&kvm->online_vcpus))
3629                         goto create_irqchip_unlock;
3630                 r = -ENOMEM;
3631                 vpic = kvm_create_pic(kvm);
3632                 if (vpic) {
3633                         r = kvm_ioapic_init(kvm);
3634                         if (r) {
3635                                 mutex_lock(&kvm->slots_lock);
3636                                 kvm_destroy_pic(vpic);
3637                                 mutex_unlock(&kvm->slots_lock);
3638                                 goto create_irqchip_unlock;
3639                         }
3640                 } else
3641                         goto create_irqchip_unlock;
3642                 r = kvm_setup_default_irq_routing(kvm);
3643                 if (r) {
3644                         mutex_lock(&kvm->slots_lock);
3645                         mutex_lock(&kvm->irq_lock);
3646                         kvm_ioapic_destroy(kvm);
3647                         kvm_destroy_pic(vpic);
3648                         mutex_unlock(&kvm->irq_lock);
3649                         mutex_unlock(&kvm->slots_lock);
3650                         goto create_irqchip_unlock;
3651                 }
3652                 /* Write kvm->irq_routing before kvm->arch.vpic.  */
3653                 smp_wmb();
3654                 kvm->arch.vpic = vpic;
3655         create_irqchip_unlock:
3656                 mutex_unlock(&kvm->lock);
3657                 break;
3658         }
3659         case KVM_CREATE_PIT:
3660                 u.pit_config.flags = KVM_PIT_SPEAKER_DUMMY;
3661                 goto create_pit;
3662         case KVM_CREATE_PIT2:
3663                 r = -EFAULT;
3664                 if (copy_from_user(&u.pit_config, argp,
3665                                    sizeof(struct kvm_pit_config)))
3666                         goto out;
3667         create_pit:
3668                 mutex_lock(&kvm->slots_lock);
3669                 r = -EEXIST;
3670                 if (kvm->arch.vpit)
3671                         goto create_pit_unlock;
3672                 r = -ENOMEM;
3673                 kvm->arch.vpit = kvm_create_pit(kvm, u.pit_config.flags);
3674                 if (kvm->arch.vpit)
3675                         r = 0;
3676         create_pit_unlock:
3677                 mutex_unlock(&kvm->slots_lock);
3678                 break;
3679         case KVM_GET_IRQCHIP: {
3680                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3681                 struct kvm_irqchip *chip;
3682
3683                 chip = memdup_user(argp, sizeof(*chip));
3684                 if (IS_ERR(chip)) {
3685                         r = PTR_ERR(chip);
3686                         goto out;
3687                 }
3688
3689                 r = -ENXIO;
3690                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3691                         goto get_irqchip_out;
3692                 r = kvm_vm_ioctl_get_irqchip(kvm, chip);
3693                 if (r)
3694                         goto get_irqchip_out;
3695                 r = -EFAULT;
3696                 if (copy_to_user(argp, chip, sizeof *chip))
3697                         goto get_irqchip_out;
3698                 r = 0;
3699         get_irqchip_out:
3700                 kfree(chip);
3701                 break;
3702         }
3703         case KVM_SET_IRQCHIP: {
3704                 /* 0: PIC master, 1: PIC slave, 2: IOAPIC */
3705                 struct kvm_irqchip *chip;
3706
3707                 chip = memdup_user(argp, sizeof(*chip));
3708                 if (IS_ERR(chip)) {
3709                         r = PTR_ERR(chip);
3710                         goto out;
3711                 }
3712
3713                 r = -ENXIO;
3714                 if (!irqchip_in_kernel(kvm) || irqchip_split(kvm))
3715                         goto set_irqchip_out;
3716                 r = kvm_vm_ioctl_set_irqchip(kvm, chip);
3717                 if (r)
3718                         goto set_irqchip_out;
3719                 r = 0;
3720         set_irqchip_out:
3721                 kfree(chip);
3722                 break;
3723         }
3724         case KVM_GET_PIT: {
3725                 r = -EFAULT;
3726                 if (copy_from_user(&u.ps, argp, sizeof(struct kvm_pit_state)))
3727                         goto out;
3728                 r = -ENXIO;
3729                 if (!kvm->arch.vpit)
3730                         goto out;
3731                 r = kvm_vm_ioctl_get_pit(kvm, &u.ps);
3732                 if (r)
3733                         goto out;
3734                 r = -EFAULT;
3735                 if (copy_to_user(argp, &u.ps, sizeof(struct kvm_pit_state)))
3736                         goto out;
3737                 r = 0;
3738                 break;
3739         }
3740         case KVM_SET_PIT: {
3741                 r = -EFAULT;
3742                 if (copy_from_user(&u.ps, argp, sizeof u.ps))
3743                         goto out;
3744                 r = -ENXIO;
3745                 if (!kvm->arch.vpit)
3746                         goto out;
3747                 r = kvm_vm_ioctl_set_pit(kvm, &u.ps);
3748                 break;
3749         }
3750         case KVM_GET_PIT2: {
3751                 r = -ENXIO;
3752                 if (!kvm->arch.vpit)
3753                         goto out;
3754                 r = kvm_vm_ioctl_get_pit2(kvm, &u.ps2);
3755                 if (r)
3756                         goto out;
3757                 r = -EFAULT;
3758                 if (copy_to_user(argp, &u.ps2, sizeof(u.ps2)))
3759                         goto out;
3760                 r = 0;
3761                 break;
3762         }
3763         case KVM_SET_PIT2: {
3764                 r = -EFAULT;
3765                 if (copy_from_user(&u.ps2, argp, sizeof(u.ps2)))
3766                         goto out;
3767                 r = -ENXIO;
3768                 if (!kvm->arch.vpit)
3769                         goto out;
3770                 r = kvm_vm_ioctl_set_pit2(kvm, &u.ps2);
3771                 break;
3772         }
3773         case KVM_REINJECT_CONTROL: {
3774                 struct kvm_reinject_control control;
3775                 r =  -EFAULT;
3776                 if (copy_from_user(&control, argp, sizeof(control)))
3777                         goto out;
3778                 r = kvm_vm_ioctl_reinject(kvm, &control);
3779                 break;
3780         }
3781         case KVM_SET_BOOT_CPU_ID:
3782                 r = 0;
3783                 mutex_lock(&kvm->lock);
3784                 if (atomic_read(&kvm->online_vcpus) != 0)
3785                         r = -EBUSY;
3786                 else
3787                         kvm->arch.bsp_vcpu_id = arg;
3788                 mutex_unlock(&kvm->lock);
3789                 break;
3790         case KVM_XEN_HVM_CONFIG: {
3791                 r = -EFAULT;
3792                 if (copy_from_user(&kvm->arch.xen_hvm_config, argp,
3793                                    sizeof(struct kvm_xen_hvm_config)))
3794                         goto out;
3795                 r = -EINVAL;
3796                 if (kvm->arch.xen_hvm_config.flags)
3797                         goto out;
3798                 r = 0;
3799                 break;
3800         }
3801         case KVM_SET_CLOCK: {
3802                 struct kvm_clock_data user_ns;
3803                 u64 now_ns;
3804                 s64 delta;
3805
3806                 r = -EFAULT;
3807                 if (copy_from_user(&user_ns, argp, sizeof(user_ns)))
3808                         goto out;
3809
3810                 r = -EINVAL;
3811                 if (user_ns.flags)
3812                         goto out;
3813
3814                 r = 0;
3815                 local_irq_disable();
3816                 now_ns = get_kernel_ns();
3817                 delta = user_ns.clock - now_ns;
3818                 local_irq_enable();
3819                 kvm->arch.kvmclock_offset = delta;
3820                 kvm_gen_update_masterclock(kvm);
3821                 break;
3822         }
3823         case KVM_GET_CLOCK: {
3824                 struct kvm_clock_data user_ns;
3825                 u64 now_ns;
3826
3827                 local_irq_disable();
3828                 now_ns = get_kernel_ns();
3829                 user_ns.clock = kvm->arch.kvmclock_offset + now_ns;
3830                 local_irq_enable();
3831                 user_ns.flags = 0;
3832                 memset(&user_ns.pad, 0, sizeof(user_ns.pad));
3833
3834                 r = -EFAULT;
3835                 if (copy_to_user(argp, &user_ns, sizeof(user_ns)))
3836                         goto out;
3837                 r = 0;
3838                 break;
3839         }
3840         case KVM_ENABLE_CAP: {
3841                 struct kvm_enable_cap cap;
3842
3843                 r = -EFAULT;
3844                 if (copy_from_user(&cap, argp, sizeof(cap)))
3845                         goto out;
3846                 r = kvm_vm_ioctl_enable_cap(kvm, &cap);
3847                 break;
3848         }
3849         default:
3850                 r = kvm_vm_ioctl_assigned_device(kvm, ioctl, arg);
3851         }
3852 out:
3853         return r;
3854 }
3855
3856 static void kvm_init_msr_list(void)
3857 {
3858         u32 dummy[2];
3859         unsigned i, j;
3860
3861         for (i = j = 0; i < ARRAY_SIZE(msrs_to_save); i++) {
3862                 if (rdmsr_safe(msrs_to_save[i], &dummy[0], &dummy[1]) < 0)
3863                         continue;
3864
3865                 /*
3866                  * Even MSRs that are valid in the host may not be exposed
3867                  * to the guests in some cases.  We could work around this
3868                  * in VMX with the generic MSR save/load machinery, but it
3869                  * is not really worthwhile since it will really only
3870                  * happen with nested virtualization.
3871                  */
3872                 switch (msrs_to_save[i]) {
3873                 case MSR_IA32_BNDCFGS:
3874                         if (!kvm_x86_ops->mpx_supported())
3875                                 continue;
3876                         break;
3877                 default:
3878                         break;
3879                 }
3880
3881                 if (j < i)
3882                         msrs_to_save[j] = msrs_to_save[i];
3883                 j++;
3884         }
3885         num_msrs_to_save = j;
3886
3887         for (i = j = 0; i < ARRAY_SIZE(emulated_msrs); i++) {
3888                 switch (emulated_msrs[i]) {
3889                 case MSR_IA32_SMBASE:
3890                         if (!kvm_x86_ops->cpu_has_high_real_mode_segbase())
3891                                 continue;
3892                         break;
3893                 default:
3894                         break;
3895                 }
3896
3897                 if (j < i)
3898                         emulated_msrs[j] = emulated_msrs[i];
3899                 j++;
3900         }
3901         num_emulated_msrs = j;
3902 }
3903
3904 static int vcpu_mmio_write(struct kvm_vcpu *vcpu, gpa_t addr, int len,
3905                            const void *v)
3906 {
3907         int handled = 0;
3908         int n;
3909
3910         do {
3911                 n = min(len, 8);
3912                 if (!(vcpu->arch.apic &&
3913                       !kvm_iodevice_write(vcpu, &vcpu->arch.apic->dev, addr, n, v))
3914                     && kvm_io_bus_write(vcpu, KVM_MMIO_BUS, addr, n, v))
3915                         break;
3916                 handled += n;
3917                 addr += n;
3918                 len -= n;
3919                 v += n;
3920         } while (len);
3921
3922         return handled;
3923 }
3924
3925 static int vcpu_mmio_read(struct kvm_vcpu *vcpu, gpa_t addr, int len, void *v)
3926 {
3927         int handled = 0;
3928         int n;
3929
3930         do {
3931                 n = min(len, 8);
3932                 if (!(vcpu->arch.apic &&
3933                       !kvm_iodevice_read(vcpu, &vcpu->arch.apic->dev,
3934                                          addr, n, v))
3935                     && kvm_io_bus_read(vcpu, KVM_MMIO_BUS, addr, n, v))
3936                         break;
3937                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, n, addr, *(u64 *)v);
3938                 handled += n;
3939                 addr += n;
3940                 len -= n;
3941                 v += n;
3942         } while (len);
3943
3944         return handled;
3945 }
3946
3947 static void kvm_set_segment(struct kvm_vcpu *vcpu,
3948                         struct kvm_segment *var, int seg)
3949 {
3950         kvm_x86_ops->set_segment(vcpu, var, seg);
3951 }
3952
3953 void kvm_get_segment(struct kvm_vcpu *vcpu,
3954                      struct kvm_segment *var, int seg)
3955 {
3956         kvm_x86_ops->get_segment(vcpu, var, seg);
3957 }
3958
3959 gpa_t translate_nested_gpa(struct kvm_vcpu *vcpu, gpa_t gpa, u32 access,
3960                            struct x86_exception *exception)
3961 {
3962         gpa_t t_gpa;
3963
3964         BUG_ON(!mmu_is_nested(vcpu));
3965
3966         /* NPT walks are always user-walks */
3967         access |= PFERR_USER_MASK;
3968         t_gpa  = vcpu->arch.mmu.gva_to_gpa(vcpu, gpa, access, exception);
3969
3970         return t_gpa;
3971 }
3972
3973 gpa_t kvm_mmu_gva_to_gpa_read(struct kvm_vcpu *vcpu, gva_t gva,
3974                               struct x86_exception *exception)
3975 {
3976         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3977         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3978 }
3979
3980  gpa_t kvm_mmu_gva_to_gpa_fetch(struct kvm_vcpu *vcpu, gva_t gva,
3981                                 struct x86_exception *exception)
3982 {
3983         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3984         access |= PFERR_FETCH_MASK;
3985         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3986 }
3987
3988 gpa_t kvm_mmu_gva_to_gpa_write(struct kvm_vcpu *vcpu, gva_t gva,
3989                                struct x86_exception *exception)
3990 {
3991         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
3992         access |= PFERR_WRITE_MASK;
3993         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
3994 }
3995
3996 /* uses this to access any guest's mapped memory without checking CPL */
3997 gpa_t kvm_mmu_gva_to_gpa_system(struct kvm_vcpu *vcpu, gva_t gva,
3998                                 struct x86_exception *exception)
3999 {
4000         return vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, 0, exception);
4001 }
4002
4003 static int kvm_read_guest_virt_helper(gva_t addr, void *val, unsigned int bytes,
4004                                       struct kvm_vcpu *vcpu, u32 access,
4005                                       struct x86_exception *exception)
4006 {
4007         void *data = val;
4008         int r = X86EMUL_CONTINUE;
4009
4010         while (bytes) {
4011                 gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access,
4012                                                             exception);
4013                 unsigned offset = addr & (PAGE_SIZE-1);
4014                 unsigned toread = min(bytes, (unsigned)PAGE_SIZE - offset);
4015                 int ret;
4016
4017                 if (gpa == UNMAPPED_GVA)
4018                         return X86EMUL_PROPAGATE_FAULT;
4019                 ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, data,
4020                                                offset, toread);
4021                 if (ret < 0) {
4022                         r = X86EMUL_IO_NEEDED;
4023                         goto out;
4024                 }
4025
4026                 bytes -= toread;
4027                 data += toread;
4028                 addr += toread;
4029         }
4030 out:
4031         return r;
4032 }
4033
4034 /* used for instruction fetching */
4035 static int kvm_fetch_guest_virt(struct x86_emulate_ctxt *ctxt,
4036                                 gva_t addr, void *val, unsigned int bytes,
4037                                 struct x86_exception *exception)
4038 {
4039         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4040         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4041         unsigned offset;
4042         int ret;
4043
4044         /* Inline kvm_read_guest_virt_helper for speed.  */
4045         gpa_t gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr, access|PFERR_FETCH_MASK,
4046                                                     exception);
4047         if (unlikely(gpa == UNMAPPED_GVA))
4048                 return X86EMUL_PROPAGATE_FAULT;
4049
4050         offset = addr & (PAGE_SIZE-1);
4051         if (WARN_ON(offset + bytes > PAGE_SIZE))
4052                 bytes = (unsigned)PAGE_SIZE - offset;
4053         ret = kvm_vcpu_read_guest_page(vcpu, gpa >> PAGE_SHIFT, val,
4054                                        offset, bytes);
4055         if (unlikely(ret < 0))
4056                 return X86EMUL_IO_NEEDED;
4057
4058         return X86EMUL_CONTINUE;
4059 }
4060
4061 int kvm_read_guest_virt(struct x86_emulate_ctxt *ctxt,
4062                                gva_t addr, void *val, unsigned int bytes,
4063                                struct x86_exception *exception)
4064 {
4065         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4066         u32 access = (kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0;
4067
4068         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, access,
4069                                           exception);
4070 }
4071 EXPORT_SYMBOL_GPL(kvm_read_guest_virt);
4072
4073 static int kvm_read_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4074                                       gva_t addr, void *val, unsigned int bytes,
4075                                       struct x86_exception *exception)
4076 {
4077         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4078         return kvm_read_guest_virt_helper(addr, val, bytes, vcpu, 0, exception);
4079 }
4080
4081 int kvm_write_guest_virt_system(struct x86_emulate_ctxt *ctxt,
4082                                        gva_t addr, void *val,
4083                                        unsigned int bytes,
4084                                        struct x86_exception *exception)
4085 {
4086         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4087         void *data = val;
4088         int r = X86EMUL_CONTINUE;
4089
4090         while (bytes) {
4091                 gpa_t gpa =  vcpu->arch.walk_mmu->gva_to_gpa(vcpu, addr,
4092                                                              PFERR_WRITE_MASK,
4093                                                              exception);
4094                 unsigned offset = addr & (PAGE_SIZE-1);
4095                 unsigned towrite = min(bytes, (unsigned)PAGE_SIZE - offset);
4096                 int ret;
4097
4098                 if (gpa == UNMAPPED_GVA)
4099                         return X86EMUL_PROPAGATE_FAULT;
4100                 ret = kvm_vcpu_write_guest(vcpu, gpa, data, towrite);
4101                 if (ret < 0) {
4102                         r = X86EMUL_IO_NEEDED;
4103                         goto out;
4104                 }
4105
4106                 bytes -= towrite;
4107                 data += towrite;
4108                 addr += towrite;
4109         }
4110 out:
4111         return r;
4112 }
4113 EXPORT_SYMBOL_GPL(kvm_write_guest_virt_system);
4114
4115 static int vcpu_mmio_gva_to_gpa(struct kvm_vcpu *vcpu, unsigned long gva,
4116                                 gpa_t *gpa, struct x86_exception *exception,
4117                                 bool write)
4118 {
4119         u32 access = ((kvm_x86_ops->get_cpl(vcpu) == 3) ? PFERR_USER_MASK : 0)
4120                 | (write ? PFERR_WRITE_MASK : 0);
4121
4122         if (vcpu_match_mmio_gva(vcpu, gva)
4123             && !permission_fault(vcpu, vcpu->arch.walk_mmu,
4124                                  vcpu->arch.access, access)) {
4125                 *gpa = vcpu->arch.mmio_gfn << PAGE_SHIFT |
4126                                         (gva & (PAGE_SIZE - 1));
4127                 trace_vcpu_match_mmio(gva, *gpa, write, false);
4128                 return 1;
4129         }
4130
4131         *gpa = vcpu->arch.walk_mmu->gva_to_gpa(vcpu, gva, access, exception);
4132
4133         if (*gpa == UNMAPPED_GVA)
4134                 return -1;
4135
4136         /* For APIC access vmexit */
4137         if ((*gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4138                 return 1;
4139
4140         if (vcpu_match_mmio_gpa(vcpu, *gpa)) {
4141                 trace_vcpu_match_mmio(gva, *gpa, write, true);
4142                 return 1;
4143         }
4144
4145         return 0;
4146 }
4147
4148 int emulator_write_phys(struct kvm_vcpu *vcpu, gpa_t gpa,
4149                         const void *val, int bytes)
4150 {
4151         int ret;
4152
4153         ret = kvm_vcpu_write_guest(vcpu, gpa, val, bytes);
4154         if (ret < 0)
4155                 return 0;
4156         kvm_mmu_pte_write(vcpu, gpa, val, bytes);
4157         return 1;
4158 }
4159
4160 struct read_write_emulator_ops {
4161         int (*read_write_prepare)(struct kvm_vcpu *vcpu, void *val,
4162                                   int bytes);
4163         int (*read_write_emulate)(struct kvm_vcpu *vcpu, gpa_t gpa,
4164                                   void *val, int bytes);
4165         int (*read_write_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4166                                int bytes, void *val);
4167         int (*read_write_exit_mmio)(struct kvm_vcpu *vcpu, gpa_t gpa,
4168                                     void *val, int bytes);
4169         bool write;
4170 };
4171
4172 static int read_prepare(struct kvm_vcpu *vcpu, void *val, int bytes)
4173 {
4174         if (vcpu->mmio_read_completed) {
4175                 trace_kvm_mmio(KVM_TRACE_MMIO_READ, bytes,
4176                                vcpu->mmio_fragments[0].gpa, *(u64 *)val);
4177                 vcpu->mmio_read_completed = 0;
4178                 return 1;
4179         }
4180
4181         return 0;
4182 }
4183
4184 static int read_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4185                         void *val, int bytes)
4186 {
4187         return !kvm_vcpu_read_guest(vcpu, gpa, val, bytes);
4188 }
4189
4190 static int write_emulate(struct kvm_vcpu *vcpu, gpa_t gpa,
4191                          void *val, int bytes)
4192 {
4193         return emulator_write_phys(vcpu, gpa, val, bytes);
4194 }
4195
4196 static int write_mmio(struct kvm_vcpu *vcpu, gpa_t gpa, int bytes, void *val)
4197 {
4198         trace_kvm_mmio(KVM_TRACE_MMIO_WRITE, bytes, gpa, *(u64 *)val);
4199         return vcpu_mmio_write(vcpu, gpa, bytes, val);
4200 }
4201
4202 static int read_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4203                           void *val, int bytes)
4204 {
4205         trace_kvm_mmio(KVM_TRACE_MMIO_READ_UNSATISFIED, bytes, gpa, 0);
4206         return X86EMUL_IO_NEEDED;
4207 }
4208
4209 static int write_exit_mmio(struct kvm_vcpu *vcpu, gpa_t gpa,
4210                            void *val, int bytes)
4211 {
4212         struct kvm_mmio_fragment *frag = &vcpu->mmio_fragments[0];
4213
4214         memcpy(vcpu->run->mmio.data, frag->data, min(8u, frag->len));
4215         return X86EMUL_CONTINUE;
4216 }
4217
4218 static const struct read_write_emulator_ops read_emultor = {
4219         .read_write_prepare = read_prepare,
4220         .read_write_emulate = read_emulate,
4221         .read_write_mmio = vcpu_mmio_read,
4222         .read_write_exit_mmio = read_exit_mmio,
4223 };
4224
4225 static const struct read_write_emulator_ops write_emultor = {
4226         .read_write_emulate = write_emulate,
4227         .read_write_mmio = write_mmio,
4228         .read_write_exit_mmio = write_exit_mmio,
4229         .write = true,
4230 };
4231
4232 static int emulator_read_write_onepage(unsigned long addr, void *val,
4233                                        unsigned int bytes,
4234                                        struct x86_exception *exception,
4235                                        struct kvm_vcpu *vcpu,
4236                                        const struct read_write_emulator_ops *ops)
4237 {
4238         gpa_t gpa;
4239         int handled, ret;
4240         bool write = ops->write;
4241         struct kvm_mmio_fragment *frag;
4242
4243         ret = vcpu_mmio_gva_to_gpa(vcpu, addr, &gpa, exception, write);
4244
4245         if (ret < 0)
4246                 return X86EMUL_PROPAGATE_FAULT;
4247
4248         /* For APIC access vmexit */
4249         if (ret)
4250                 goto mmio;
4251
4252         if (ops->read_write_emulate(vcpu, gpa, val, bytes))
4253                 return X86EMUL_CONTINUE;
4254
4255 mmio:
4256         /*
4257          * Is this MMIO handled locally?
4258          */
4259         handled = ops->read_write_mmio(vcpu, gpa, bytes, val);
4260         if (handled == bytes)
4261                 return X86EMUL_CONTINUE;
4262
4263         gpa += handled;
4264         bytes -= handled;
4265         val += handled;
4266
4267         WARN_ON(vcpu->mmio_nr_fragments >= KVM_MAX_MMIO_FRAGMENTS);
4268         frag = &vcpu->mmio_fragments[vcpu->mmio_nr_fragments++];
4269         frag->gpa = gpa;
4270         frag->data = val;
4271         frag->len = bytes;
4272         return X86EMUL_CONTINUE;
4273 }
4274
4275 static int emulator_read_write(struct x86_emulate_ctxt *ctxt,
4276                         unsigned long addr,
4277                         void *val, unsigned int bytes,
4278                         struct x86_exception *exception,
4279                         const struct read_write_emulator_ops *ops)
4280 {
4281         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4282         gpa_t gpa;
4283         int rc;
4284
4285         if (ops->read_write_prepare &&
4286                   ops->read_write_prepare(vcpu, val, bytes))
4287                 return X86EMUL_CONTINUE;
4288
4289         vcpu->mmio_nr_fragments = 0;
4290
4291         /* Crossing a page boundary? */
4292         if (((addr + bytes - 1) ^ addr) & PAGE_MASK) {
4293                 int now;
4294
4295                 now = -addr & ~PAGE_MASK;
4296                 rc = emulator_read_write_onepage(addr, val, now, exception,
4297                                                  vcpu, ops);
4298
4299                 if (rc != X86EMUL_CONTINUE)
4300                         return rc;
4301                 addr += now;
4302                 if (ctxt->mode != X86EMUL_MODE_PROT64)
4303                         addr = (u32)addr;
4304                 val += now;
4305                 bytes -= now;
4306         }
4307
4308         rc = emulator_read_write_onepage(addr, val, bytes, exception,
4309                                          vcpu, ops);
4310         if (rc != X86EMUL_CONTINUE)
4311                 return rc;
4312
4313         if (!vcpu->mmio_nr_fragments)
4314                 return rc;
4315
4316         gpa = vcpu->mmio_fragments[0].gpa;
4317
4318         vcpu->mmio_needed = 1;
4319         vcpu->mmio_cur_fragment = 0;
4320
4321         vcpu->run->mmio.len = min(8u, vcpu->mmio_fragments[0].len);
4322         vcpu->run->mmio.is_write = vcpu->mmio_is_write = ops->write;
4323         vcpu->run->exit_reason = KVM_EXIT_MMIO;
4324         vcpu->run->mmio.phys_addr = gpa;
4325
4326         return ops->read_write_exit_mmio(vcpu, gpa, val, bytes);
4327 }
4328
4329 static int emulator_read_emulated(struct x86_emulate_ctxt *ctxt,
4330                                   unsigned long addr,
4331                                   void *val,
4332                                   unsigned int bytes,
4333                                   struct x86_exception *exception)
4334 {
4335         return emulator_read_write(ctxt, addr, val, bytes,
4336                                    exception, &read_emultor);
4337 }
4338
4339 static int emulator_write_emulated(struct x86_emulate_ctxt *ctxt,
4340                             unsigned long addr,
4341                             const void *val,
4342                             unsigned int bytes,
4343                             struct x86_exception *exception)
4344 {
4345         return emulator_read_write(ctxt, addr, (void *)val, bytes,
4346                                    exception, &write_emultor);
4347 }
4348
4349 #define CMPXCHG_TYPE(t, ptr, old, new) \
4350         (cmpxchg((t *)(ptr), *(t *)(old), *(t *)(new)) == *(t *)(old))
4351
4352 #ifdef CONFIG_X86_64
4353 #  define CMPXCHG64(ptr, old, new) CMPXCHG_TYPE(u64, ptr, old, new)
4354 #else
4355 #  define CMPXCHG64(ptr, old, new) \
4356         (cmpxchg64((u64 *)(ptr), *(u64 *)(old), *(u64 *)(new)) == *(u64 *)(old))
4357 #endif
4358
4359 static int emulator_cmpxchg_emulated(struct x86_emulate_ctxt *ctxt,
4360                                      unsigned long addr,
4361                                      const void *old,
4362                                      const void *new,
4363                                      unsigned int bytes,
4364                                      struct x86_exception *exception)
4365 {
4366         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4367         gpa_t gpa;
4368         struct page *page;
4369         char *kaddr;
4370         bool exchanged;
4371
4372         /* guests cmpxchg8b have to be emulated atomically */
4373         if (bytes > 8 || (bytes & (bytes - 1)))
4374                 goto emul_write;
4375
4376         gpa = kvm_mmu_gva_to_gpa_write(vcpu, addr, NULL);
4377
4378         if (gpa == UNMAPPED_GVA ||
4379             (gpa & PAGE_MASK) == APIC_DEFAULT_PHYS_BASE)
4380                 goto emul_write;
4381
4382         if (((gpa + bytes - 1) & PAGE_MASK) != (gpa & PAGE_MASK))
4383                 goto emul_write;
4384
4385         page = kvm_vcpu_gfn_to_page(vcpu, gpa >> PAGE_SHIFT);
4386         if (is_error_page(page))
4387                 goto emul_write;
4388
4389         kaddr = kmap_atomic(page);
4390         kaddr += offset_in_page(gpa);
4391         switch (bytes) {
4392         case 1:
4393                 exchanged = CMPXCHG_TYPE(u8, kaddr, old, new);
4394                 break;
4395         case 2:
4396                 exchanged = CMPXCHG_TYPE(u16, kaddr, old, new);
4397                 break;
4398         case 4:
4399                 exchanged = CMPXCHG_TYPE(u32, kaddr, old, new);
4400                 break;
4401         case 8:
4402                 exchanged = CMPXCHG64(kaddr, old, new);
4403                 break;
4404         default:
4405                 BUG();
4406         }
4407         kunmap_atomic(kaddr);
4408         kvm_release_page_dirty(page);
4409
4410         if (!exchanged)
4411                 return X86EMUL_CMPXCHG_FAILED;
4412
4413         kvm_vcpu_mark_page_dirty(vcpu, gpa >> PAGE_SHIFT);
4414         kvm_mmu_pte_write(vcpu, gpa, new, bytes);
4415
4416         return X86EMUL_CONTINUE;
4417
4418 emul_write:
4419         printk_once(KERN_WARNING "kvm: emulating exchange as write\n");
4420
4421         return emulator_write_emulated(ctxt, addr, new, bytes, exception);
4422 }
4423
4424 static int kernel_pio(struct kvm_vcpu *vcpu, void *pd)
4425 {
4426         /* TODO: String I/O for in kernel device */
4427         int r;
4428
4429         if (vcpu->arch.pio.in)
4430                 r = kvm_io_bus_read(vcpu, KVM_PIO_BUS, vcpu->arch.pio.port,
4431                                     vcpu->arch.pio.size, pd);
4432         else
4433                 r = kvm_io_bus_write(vcpu, KVM_PIO_BUS,
4434                                      vcpu->arch.pio.port, vcpu->arch.pio.size,
4435                                      pd);
4436         return r;
4437 }
4438
4439 static int emulator_pio_in_out(struct kvm_vcpu *vcpu, int size,
4440                                unsigned short port, void *val,
4441                                unsigned int count, bool in)
4442 {
4443         vcpu->arch.pio.port = port;
4444         vcpu->arch.pio.in = in;
4445         vcpu->arch.pio.count  = count;
4446         vcpu->arch.pio.size = size;
4447
4448         if (!kernel_pio(vcpu, vcpu->arch.pio_data)) {
4449                 vcpu->arch.pio.count = 0;
4450                 return 1;
4451         }
4452
4453         vcpu->run->exit_reason = KVM_EXIT_IO;
4454         vcpu->run->io.direction = in ? KVM_EXIT_IO_IN : KVM_EXIT_IO_OUT;
4455         vcpu->run->io.size = size;
4456         vcpu->run->io.data_offset = KVM_PIO_PAGE_OFFSET * PAGE_SIZE;
4457         vcpu->run->io.count = count;
4458         vcpu->run->io.port = port;
4459
4460         return 0;
4461 }
4462
4463 static int emulator_pio_in_emulated(struct x86_emulate_ctxt *ctxt,
4464                                     int size, unsigned short port, void *val,
4465                                     unsigned int count)
4466 {
4467         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4468         int ret;
4469
4470         if (vcpu->arch.pio.count)
4471                 goto data_avail;
4472
4473         ret = emulator_pio_in_out(vcpu, size, port, val, count, true);
4474         if (ret) {
4475 data_avail:
4476                 memcpy(val, vcpu->arch.pio_data, size * count);
4477                 trace_kvm_pio(KVM_PIO_IN, port, size, count, vcpu->arch.pio_data);
4478                 vcpu->arch.pio.count = 0;
4479                 return 1;
4480         }
4481
4482         return 0;
4483 }
4484
4485 static int emulator_pio_out_emulated(struct x86_emulate_ctxt *ctxt,
4486                                      int size, unsigned short port,
4487                                      const void *val, unsigned int count)
4488 {
4489         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4490
4491         memcpy(vcpu->arch.pio_data, val, size * count);
4492         trace_kvm_pio(KVM_PIO_OUT, port, size, count, vcpu->arch.pio_data);
4493         return emulator_pio_in_out(vcpu, size, port, (void *)val, count, false);
4494 }
4495
4496 static unsigned long get_segment_base(struct kvm_vcpu *vcpu, int seg)
4497 {
4498         return kvm_x86_ops->get_segment_base(vcpu, seg);
4499 }
4500
4501 static void emulator_invlpg(struct x86_emulate_ctxt *ctxt, ulong address)
4502 {
4503         kvm_mmu_invlpg(emul_to_vcpu(ctxt), address);
4504 }
4505
4506 int kvm_emulate_wbinvd_noskip(struct kvm_vcpu *vcpu)
4507 {
4508         if (!need_emulate_wbinvd(vcpu))
4509                 return X86EMUL_CONTINUE;
4510
4511         if (kvm_x86_ops->has_wbinvd_exit()) {
4512                 int cpu = get_cpu();
4513
4514                 cpumask_set_cpu(cpu, vcpu->arch.wbinvd_dirty_mask);
4515                 smp_call_function_many(vcpu->arch.wbinvd_dirty_mask,
4516                                 wbinvd_ipi, NULL, 1);
4517                 put_cpu();
4518                 cpumask_clear(vcpu->arch.wbinvd_dirty_mask);
4519         } else
4520                 wbinvd();
4521         return X86EMUL_CONTINUE;
4522 }
4523
4524 int kvm_emulate_wbinvd(struct kvm_vcpu *vcpu)
4525 {
4526         kvm_x86_ops->skip_emulated_instruction(vcpu);
4527         return kvm_emulate_wbinvd_noskip(vcpu);
4528 }
4529 EXPORT_SYMBOL_GPL(kvm_emulate_wbinvd);
4530
4531
4532
4533 static void emulator_wbinvd(struct x86_emulate_ctxt *ctxt)
4534 {
4535         kvm_emulate_wbinvd_noskip(emul_to_vcpu(ctxt));
4536 }
4537
4538 static int emulator_get_dr(struct x86_emulate_ctxt *ctxt, int dr,
4539                            unsigned long *dest)
4540 {
4541         return kvm_get_dr(emul_to_vcpu(ctxt), dr, dest);
4542 }
4543
4544 static int emulator_set_dr(struct x86_emulate_ctxt *ctxt, int dr,
4545                            unsigned long value)
4546 {
4547
4548         return __kvm_set_dr(emul_to_vcpu(ctxt), dr, value);
4549 }
4550
4551 static u64 mk_cr_64(u64 curr_cr, u32 new_val)
4552 {
4553         return (curr_cr & ~((1ULL << 32) - 1)) | new_val;
4554 }
4555
4556 static unsigned long emulator_get_cr(struct x86_emulate_ctxt *ctxt, int cr)
4557 {
4558         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4559         unsigned long value;
4560
4561         switch (cr) {
4562         case 0:
4563                 value = kvm_read_cr0(vcpu);
4564                 break;
4565         case 2:
4566                 value = vcpu->arch.cr2;
4567                 break;
4568         case 3:
4569                 value = kvm_read_cr3(vcpu);
4570                 break;
4571         case 4:
4572                 value = kvm_read_cr4(vcpu);
4573                 break;
4574         case 8:
4575                 value = kvm_get_cr8(vcpu);
4576                 break;
4577         default:
4578                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4579                 return 0;
4580         }
4581
4582         return value;
4583 }
4584
4585 static int emulator_set_cr(struct x86_emulate_ctxt *ctxt, int cr, ulong val)
4586 {
4587         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4588         int res = 0;
4589
4590         switch (cr) {
4591         case 0:
4592                 res = kvm_set_cr0(vcpu, mk_cr_64(kvm_read_cr0(vcpu), val));
4593                 break;
4594         case 2:
4595                 vcpu->arch.cr2 = val;
4596                 break;
4597         case 3:
4598                 res = kvm_set_cr3(vcpu, val);
4599                 break;
4600         case 4:
4601                 res = kvm_set_cr4(vcpu, mk_cr_64(kvm_read_cr4(vcpu), val));
4602                 break;
4603         case 8:
4604                 res = kvm_set_cr8(vcpu, val);
4605                 break;
4606         default:
4607                 kvm_err("%s: unexpected cr %u\n", __func__, cr);
4608                 res = -1;
4609         }
4610
4611         return res;
4612 }
4613
4614 static int emulator_get_cpl(struct x86_emulate_ctxt *ctxt)
4615 {
4616         return kvm_x86_ops->get_cpl(emul_to_vcpu(ctxt));
4617 }
4618
4619 static void emulator_get_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4620 {
4621         kvm_x86_ops->get_gdt(emul_to_vcpu(ctxt), dt);
4622 }
4623
4624 static void emulator_get_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4625 {
4626         kvm_x86_ops->get_idt(emul_to_vcpu(ctxt), dt);
4627 }
4628
4629 static void emulator_set_gdt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4630 {
4631         kvm_x86_ops->set_gdt(emul_to_vcpu(ctxt), dt);
4632 }
4633
4634 static void emulator_set_idt(struct x86_emulate_ctxt *ctxt, struct desc_ptr *dt)
4635 {
4636         kvm_x86_ops->set_idt(emul_to_vcpu(ctxt), dt);
4637 }
4638
4639 static unsigned long emulator_get_cached_segment_base(
4640         struct x86_emulate_ctxt *ctxt, int seg)
4641 {
4642         return get_segment_base(emul_to_vcpu(ctxt), seg);
4643 }
4644
4645 static bool emulator_get_segment(struct x86_emulate_ctxt *ctxt, u16 *selector,
4646                                  struct desc_struct *desc, u32 *base3,
4647                                  int seg)
4648 {
4649         struct kvm_segment var;
4650
4651         kvm_get_segment(emul_to_vcpu(ctxt), &var, seg);
4652         *selector = var.selector;
4653
4654         if (var.unusable) {
4655                 memset(desc, 0, sizeof(*desc));
4656                 return false;
4657         }
4658
4659         if (var.g)
4660                 var.limit >>= 12;
4661         set_desc_limit(desc, var.limit);
4662         set_desc_base(desc, (unsigned long)var.base);
4663 #ifdef CONFIG_X86_64
4664         if (base3)
4665                 *base3 = var.base >> 32;
4666 #endif
4667         desc->type = var.type;
4668         desc->s = var.s;
4669         desc->dpl = var.dpl;
4670         desc->p = var.present;
4671         desc->avl = var.avl;
4672         desc->l = var.l;
4673         desc->d = var.db;
4674         desc->g = var.g;
4675
4676         return true;
4677 }
4678
4679 static void emulator_set_segment(struct x86_emulate_ctxt *ctxt, u16 selector,
4680                                  struct desc_struct *desc, u32 base3,
4681                                  int seg)
4682 {
4683         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4684         struct kvm_segment var;
4685
4686         var.selector = selector;
4687         var.base = get_desc_base(desc);
4688 #ifdef CONFIG_X86_64
4689         var.base |= ((u64)base3) << 32;
4690 #endif
4691         var.limit = get_desc_limit(desc);
4692         if (desc->g)
4693                 var.limit = (var.limit << 12) | 0xfff;
4694         var.type = desc->type;
4695         var.dpl = desc->dpl;
4696         var.db = desc->d;
4697         var.s = desc->s;
4698         var.l = desc->l;
4699         var.g = desc->g;
4700         var.avl = desc->avl;
4701         var.present = desc->p;
4702         var.unusable = !var.present;
4703         var.padding = 0;
4704
4705         kvm_set_segment(vcpu, &var, seg);
4706         return;
4707 }
4708
4709 static int emulator_get_msr(struct x86_emulate_ctxt *ctxt,
4710                             u32 msr_index, u64 *pdata)
4711 {
4712         struct msr_data msr;
4713         int r;
4714
4715         msr.index = msr_index;
4716         msr.host_initiated = false;
4717         r = kvm_get_msr(emul_to_vcpu(ctxt), &msr);
4718         if (r)
4719                 return r;
4720
4721         *pdata = msr.data;
4722         return 0;
4723 }
4724
4725 static int emulator_set_msr(struct x86_emulate_ctxt *ctxt,
4726                             u32 msr_index, u64 data)
4727 {
4728         struct msr_data msr;
4729
4730         msr.data = data;
4731         msr.index = msr_index;
4732         msr.host_initiated = false;
4733         return kvm_set_msr(emul_to_vcpu(ctxt), &msr);
4734 }
4735
4736 static u64 emulator_get_smbase(struct x86_emulate_ctxt *ctxt)
4737 {
4738         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4739
4740         return vcpu->arch.smbase;
4741 }
4742
4743 static void emulator_set_smbase(struct x86_emulate_ctxt *ctxt, u64 smbase)
4744 {
4745         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
4746
4747         vcpu->arch.smbase = smbase;
4748 }
4749
4750 static int emulator_check_pmc(struct x86_emulate_ctxt *ctxt,
4751                               u32 pmc)
4752 {
4753         return kvm_pmu_is_valid_msr_idx(emul_to_vcpu(ctxt), pmc);
4754 }
4755
4756 static int emulator_read_pmc(struct x86_emulate_ctxt *ctxt,
4757                              u32 pmc, u64 *pdata)
4758 {
4759         return kvm_pmu_rdpmc(emul_to_vcpu(ctxt), pmc, pdata);
4760 }
4761
4762 static void emulator_halt(struct x86_emulate_ctxt *ctxt)
4763 {
4764         emul_to_vcpu(ctxt)->arch.halt_request = 1;
4765 }
4766
4767 static void emulator_get_fpu(struct x86_emulate_ctxt *ctxt)
4768 {
4769         preempt_disable();
4770         kvm_load_guest_fpu(emul_to_vcpu(ctxt));
4771         /*
4772          * CR0.TS may reference the host fpu state, not the guest fpu state,
4773          * so it may be clear at this point.
4774          */
4775         clts();
4776 }
4777
4778 static void emulator_put_fpu(struct x86_emulate_ctxt *ctxt)
4779 {
4780         preempt_enable();
4781 }
4782
4783 static int emulator_intercept(struct x86_emulate_ctxt *ctxt,
4784                               struct x86_instruction_info *info,
4785                               enum x86_intercept_stage stage)
4786 {
4787         return kvm_x86_ops->check_intercept(emul_to_vcpu(ctxt), info, stage);
4788 }
4789
4790 static void emulator_get_cpuid(struct x86_emulate_ctxt *ctxt,
4791                                u32 *eax, u32 *ebx, u32 *ecx, u32 *edx)
4792 {
4793         kvm_cpuid(emul_to_vcpu(ctxt), eax, ebx, ecx, edx);
4794 }
4795
4796 static ulong emulator_read_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg)
4797 {
4798         return kvm_register_read(emul_to_vcpu(ctxt), reg);
4799 }
4800
4801 static void emulator_write_gpr(struct x86_emulate_ctxt *ctxt, unsigned reg, ulong val)
4802 {
4803         kvm_register_write(emul_to_vcpu(ctxt), reg, val);
4804 }
4805
4806 static void emulator_set_nmi_mask(struct x86_emulate_ctxt *ctxt, bool masked)
4807 {
4808         kvm_x86_ops->set_nmi_mask(emul_to_vcpu(ctxt), masked);
4809 }
4810
4811 static const struct x86_emulate_ops emulate_ops = {
4812         .read_gpr            = emulator_read_gpr,
4813         .write_gpr           = emulator_write_gpr,
4814         .read_std            = kvm_read_guest_virt_system,
4815         .write_std           = kvm_write_guest_virt_system,
4816         .fetch               = kvm_fetch_guest_virt,
4817         .read_emulated       = emulator_read_emulated,
4818         .write_emulated      = emulator_write_emulated,
4819         .cmpxchg_emulated    = emulator_cmpxchg_emulated,
4820         .invlpg              = emulator_invlpg,
4821         .pio_in_emulated     = emulator_pio_in_emulated,
4822         .pio_out_emulated    = emulator_pio_out_emulated,
4823         .get_segment         = emulator_get_segment,
4824         .set_segment         = emulator_set_segment,
4825         .get_cached_segment_base = emulator_get_cached_segment_base,
4826         .get_gdt             = emulator_get_gdt,
4827         .get_idt             = emulator_get_idt,
4828         .set_gdt             = emulator_set_gdt,
4829         .set_idt             = emulator_set_idt,
4830         .get_cr              = emulator_get_cr,
4831         .set_cr              = emulator_set_cr,
4832         .cpl                 = emulator_get_cpl,
4833         .get_dr              = emulator_get_dr,
4834         .set_dr              = emulator_set_dr,
4835         .get_smbase          = emulator_get_smbase,
4836         .set_smbase          = emulator_set_smbase,
4837         .set_msr             = emulator_set_msr,
4838         .get_msr             = emulator_get_msr,
4839         .check_pmc           = emulator_check_pmc,
4840         .read_pmc            = emulator_read_pmc,
4841         .halt                = emulator_halt,
4842         .wbinvd              = emulator_wbinvd,
4843         .fix_hypercall       = emulator_fix_hypercall,
4844         .get_fpu             = emulator_get_fpu,
4845         .put_fpu             = emulator_put_fpu,
4846         .intercept           = emulator_intercept,
4847         .get_cpuid           = emulator_get_cpuid,
4848         .set_nmi_mask        = emulator_set_nmi_mask,
4849 };
4850
4851 static void toggle_interruptibility(struct kvm_vcpu *vcpu, u32 mask)
4852 {
4853         u32 int_shadow = kvm_x86_ops->get_interrupt_shadow(vcpu);
4854         /*
4855          * an sti; sti; sequence only disable interrupts for the first
4856          * instruction. So, if the last instruction, be it emulated or
4857          * not, left the system with the INT_STI flag enabled, it
4858          * means that the last instruction is an sti. We should not
4859          * leave the flag on in this case. The same goes for mov ss
4860          */
4861         if (int_shadow & mask)
4862                 mask = 0;
4863         if (unlikely(int_shadow || mask)) {
4864                 kvm_x86_ops->set_interrupt_shadow(vcpu, mask);
4865                 if (!mask)
4866                         kvm_make_request(KVM_REQ_EVENT, vcpu);
4867         }
4868 }
4869
4870 static bool inject_emulated_exception(struct kvm_vcpu *vcpu)
4871 {
4872         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4873         if (ctxt->exception.vector == PF_VECTOR)
4874                 return kvm_propagate_fault(vcpu, &ctxt->exception);
4875
4876         if (ctxt->exception.error_code_valid)
4877                 kvm_queue_exception_e(vcpu, ctxt->exception.vector,
4878                                       ctxt->exception.error_code);
4879         else
4880                 kvm_queue_exception(vcpu, ctxt->exception.vector);
4881         return false;
4882 }
4883
4884 static void init_emulate_ctxt(struct kvm_vcpu *vcpu)
4885 {
4886         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4887         int cs_db, cs_l;
4888
4889         kvm_x86_ops->get_cs_db_l_bits(vcpu, &cs_db, &cs_l);
4890
4891         ctxt->eflags = kvm_get_rflags(vcpu);
4892         ctxt->eip = kvm_rip_read(vcpu);
4893         ctxt->mode = (!is_protmode(vcpu))               ? X86EMUL_MODE_REAL :
4894                      (ctxt->eflags & X86_EFLAGS_VM)     ? X86EMUL_MODE_VM86 :
4895                      (cs_l && is_long_mode(vcpu))       ? X86EMUL_MODE_PROT64 :
4896                      cs_db                              ? X86EMUL_MODE_PROT32 :
4897                                                           X86EMUL_MODE_PROT16;
4898         BUILD_BUG_ON(HF_GUEST_MASK != X86EMUL_GUEST_MASK);
4899         BUILD_BUG_ON(HF_SMM_MASK != X86EMUL_SMM_MASK);
4900         BUILD_BUG_ON(HF_SMM_INSIDE_NMI_MASK != X86EMUL_SMM_INSIDE_NMI_MASK);
4901         ctxt->emul_flags = vcpu->arch.hflags;
4902
4903         init_decode_cache(ctxt);
4904         vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
4905 }
4906
4907 int kvm_inject_realmode_interrupt(struct kvm_vcpu *vcpu, int irq, int inc_eip)
4908 {
4909         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
4910         int ret;
4911
4912         init_emulate_ctxt(vcpu);
4913
4914         ctxt->op_bytes = 2;
4915         ctxt->ad_bytes = 2;
4916         ctxt->_eip = ctxt->eip + inc_eip;
4917         ret = emulate_int_real(ctxt, irq);
4918
4919         if (ret != X86EMUL_CONTINUE)
4920                 return EMULATE_FAIL;
4921
4922         ctxt->eip = ctxt->_eip;
4923         kvm_rip_write(vcpu, ctxt->eip);
4924         kvm_set_rflags(vcpu, ctxt->eflags);
4925
4926         if (irq == NMI_VECTOR)
4927                 vcpu->arch.nmi_pending = 0;
4928         else
4929                 vcpu->arch.interrupt.pending = false;
4930
4931         return EMULATE_DONE;
4932 }
4933 EXPORT_SYMBOL_GPL(kvm_inject_realmode_interrupt);
4934
4935 static int handle_emulation_failure(struct kvm_vcpu *vcpu)
4936 {
4937         int r = EMULATE_DONE;
4938
4939         ++vcpu->stat.insn_emulation_fail;
4940         trace_kvm_emulate_insn_failed(vcpu);
4941         if (!is_guest_mode(vcpu) && kvm_x86_ops->get_cpl(vcpu) == 0) {
4942                 vcpu->run->exit_reason = KVM_EXIT_INTERNAL_ERROR;
4943                 vcpu->run->internal.suberror = KVM_INTERNAL_ERROR_EMULATION;
4944                 vcpu->run->internal.ndata = 0;
4945                 r = EMULATE_FAIL;
4946         }
4947         kvm_queue_exception(vcpu, UD_VECTOR);
4948
4949         return r;
4950 }
4951
4952 static bool reexecute_instruction(struct kvm_vcpu *vcpu, gva_t cr2,
4953                                   bool write_fault_to_shadow_pgtable,
4954                                   int emulation_type)
4955 {
4956         gpa_t gpa = cr2;
4957         pfn_t pfn;
4958
4959         if (emulation_type & EMULTYPE_NO_REEXECUTE)
4960                 return false;
4961
4962         if (!vcpu->arch.mmu.direct_map) {
4963                 /*
4964                  * Write permission should be allowed since only
4965                  * write access need to be emulated.
4966                  */
4967                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
4968
4969                 /*
4970                  * If the mapping is invalid in guest, let cpu retry
4971                  * it to generate fault.
4972                  */
4973                 if (gpa == UNMAPPED_GVA)
4974                         return true;
4975         }
4976
4977         /*
4978          * Do not retry the unhandleable instruction if it faults on the
4979          * readonly host memory, otherwise it will goto a infinite loop:
4980          * retry instruction -> write #PF -> emulation fail -> retry
4981          * instruction -> ...
4982          */
4983         pfn = gfn_to_pfn(vcpu->kvm, gpa_to_gfn(gpa));
4984
4985         /*
4986          * If the instruction failed on the error pfn, it can not be fixed,
4987          * report the error to userspace.
4988          */
4989         if (is_error_noslot_pfn(pfn))
4990                 return false;
4991
4992         kvm_release_pfn_clean(pfn);
4993
4994         /* The instructions are well-emulated on direct mmu. */
4995         if (vcpu->arch.mmu.direct_map) {
4996                 unsigned int indirect_shadow_pages;
4997
4998                 spin_lock(&vcpu->kvm->mmu_lock);
4999                 indirect_shadow_pages = vcpu->kvm->arch.indirect_shadow_pages;
5000                 spin_unlock(&vcpu->kvm->mmu_lock);
5001
5002                 if (indirect_shadow_pages)
5003                         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5004
5005                 return true;
5006         }
5007
5008         /*
5009          * if emulation was due to access to shadowed page table
5010          * and it failed try to unshadow page and re-enter the
5011          * guest to let CPU execute the instruction.
5012          */
5013         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5014
5015         /*
5016          * If the access faults on its page table, it can not
5017          * be fixed by unprotecting shadow page and it should
5018          * be reported to userspace.
5019          */
5020         return !write_fault_to_shadow_pgtable;
5021 }
5022
5023 static bool retry_instruction(struct x86_emulate_ctxt *ctxt,
5024                               unsigned long cr2,  int emulation_type)
5025 {
5026         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5027         unsigned long last_retry_eip, last_retry_addr, gpa = cr2;
5028
5029         last_retry_eip = vcpu->arch.last_retry_eip;
5030         last_retry_addr = vcpu->arch.last_retry_addr;
5031
5032         /*
5033          * If the emulation is caused by #PF and it is non-page_table
5034          * writing instruction, it means the VM-EXIT is caused by shadow
5035          * page protected, we can zap the shadow page and retry this
5036          * instruction directly.
5037          *
5038          * Note: if the guest uses a non-page-table modifying instruction
5039          * on the PDE that points to the instruction, then we will unmap
5040          * the instruction and go to an infinite loop. So, we cache the
5041          * last retried eip and the last fault address, if we meet the eip
5042          * and the address again, we can break out of the potential infinite
5043          * loop.
5044          */
5045         vcpu->arch.last_retry_eip = vcpu->arch.last_retry_addr = 0;
5046
5047         if (!(emulation_type & EMULTYPE_RETRY))
5048                 return false;
5049
5050         if (x86_page_table_writing_insn(ctxt))
5051                 return false;
5052
5053         if (ctxt->eip == last_retry_eip && last_retry_addr == cr2)
5054                 return false;
5055
5056         vcpu->arch.last_retry_eip = ctxt->eip;
5057         vcpu->arch.last_retry_addr = cr2;
5058
5059         if (!vcpu->arch.mmu.direct_map)
5060                 gpa = kvm_mmu_gva_to_gpa_write(vcpu, cr2, NULL);
5061
5062         kvm_mmu_unprotect_page(vcpu->kvm, gpa_to_gfn(gpa));
5063
5064         return true;
5065 }
5066
5067 static int complete_emulated_mmio(struct kvm_vcpu *vcpu);
5068 static int complete_emulated_pio(struct kvm_vcpu *vcpu);
5069
5070 static void kvm_smm_changed(struct kvm_vcpu *vcpu)
5071 {
5072         if (!(vcpu->arch.hflags & HF_SMM_MASK)) {
5073                 /* This is a good place to trace that we are exiting SMM.  */
5074                 trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, false);
5075
5076                 if (unlikely(vcpu->arch.smi_pending)) {
5077                         kvm_make_request(KVM_REQ_SMI, vcpu);
5078                         vcpu->arch.smi_pending = 0;
5079                 } else {
5080                         /* Process a latched INIT, if any.  */
5081                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5082                 }
5083         }
5084
5085         kvm_mmu_reset_context(vcpu);
5086 }
5087
5088 static void kvm_set_hflags(struct kvm_vcpu *vcpu, unsigned emul_flags)
5089 {
5090         unsigned changed = vcpu->arch.hflags ^ emul_flags;
5091
5092         vcpu->arch.hflags = emul_flags;
5093
5094         if (changed & HF_SMM_MASK)
5095                 kvm_smm_changed(vcpu);
5096 }
5097
5098 static int kvm_vcpu_check_hw_bp(unsigned long addr, u32 type, u32 dr7,
5099                                 unsigned long *db)
5100 {
5101         u32 dr6 = 0;
5102         int i;
5103         u32 enable, rwlen;
5104
5105         enable = dr7;
5106         rwlen = dr7 >> 16;
5107         for (i = 0; i < 4; i++, enable >>= 2, rwlen >>= 4)
5108                 if ((enable & 3) && (rwlen & 15) == type && db[i] == addr)
5109                         dr6 |= (1 << i);
5110         return dr6;
5111 }
5112
5113 static void kvm_vcpu_check_singlestep(struct kvm_vcpu *vcpu, unsigned long rflags, int *r)
5114 {
5115         struct kvm_run *kvm_run = vcpu->run;
5116
5117         /*
5118          * rflags is the old, "raw" value of the flags.  The new value has
5119          * not been saved yet.
5120          *
5121          * This is correct even for TF set by the guest, because "the
5122          * processor will not generate this exception after the instruction
5123          * that sets the TF flag".
5124          */
5125         if (unlikely(rflags & X86_EFLAGS_TF)) {
5126                 if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP) {
5127                         kvm_run->debug.arch.dr6 = DR6_BS | DR6_FIXED_1 |
5128                                                   DR6_RTM;
5129                         kvm_run->debug.arch.pc = vcpu->arch.singlestep_rip;
5130                         kvm_run->debug.arch.exception = DB_VECTOR;
5131                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5132                         *r = EMULATE_USER_EXIT;
5133                 } else {
5134                         vcpu->arch.emulate_ctxt.eflags &= ~X86_EFLAGS_TF;
5135                         /*
5136                          * "Certain debug exceptions may clear bit 0-3.  The
5137                          * remaining contents of the DR6 register are never
5138                          * cleared by the processor".
5139                          */
5140                         vcpu->arch.dr6 &= ~15;
5141                         vcpu->arch.dr6 |= DR6_BS | DR6_RTM;
5142                         kvm_queue_exception(vcpu, DB_VECTOR);
5143                 }
5144         }
5145 }
5146
5147 static bool kvm_vcpu_check_breakpoint(struct kvm_vcpu *vcpu, int *r)
5148 {
5149         if (unlikely(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) &&
5150             (vcpu->arch.guest_debug_dr7 & DR7_BP_EN_MASK)) {
5151                 struct kvm_run *kvm_run = vcpu->run;
5152                 unsigned long eip = kvm_get_linear_rip(vcpu);
5153                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5154                                            vcpu->arch.guest_debug_dr7,
5155                                            vcpu->arch.eff_db);
5156
5157                 if (dr6 != 0) {
5158                         kvm_run->debug.arch.dr6 = dr6 | DR6_FIXED_1 | DR6_RTM;
5159                         kvm_run->debug.arch.pc = eip;
5160                         kvm_run->debug.arch.exception = DB_VECTOR;
5161                         kvm_run->exit_reason = KVM_EXIT_DEBUG;
5162                         *r = EMULATE_USER_EXIT;
5163                         return true;
5164                 }
5165         }
5166
5167         if (unlikely(vcpu->arch.dr7 & DR7_BP_EN_MASK) &&
5168             !(kvm_get_rflags(vcpu) & X86_EFLAGS_RF)) {
5169                 unsigned long eip = kvm_get_linear_rip(vcpu);
5170                 u32 dr6 = kvm_vcpu_check_hw_bp(eip, 0,
5171                                            vcpu->arch.dr7,
5172                                            vcpu->arch.db);
5173
5174                 if (dr6 != 0) {
5175                         vcpu->arch.dr6 &= ~15;
5176                         vcpu->arch.dr6 |= dr6 | DR6_RTM;
5177                         kvm_queue_exception(vcpu, DB_VECTOR);
5178                         *r = EMULATE_DONE;
5179                         return true;
5180                 }
5181         }
5182
5183         return false;
5184 }
5185
5186 int x86_emulate_instruction(struct kvm_vcpu *vcpu,
5187                             unsigned long cr2,
5188                             int emulation_type,
5189                             void *insn,
5190                             int insn_len)
5191 {
5192         int r;
5193         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
5194         bool writeback = true;
5195         bool write_fault_to_spt = vcpu->arch.write_fault_to_shadow_pgtable;
5196
5197         /*
5198          * Clear write_fault_to_shadow_pgtable here to ensure it is
5199          * never reused.
5200          */
5201         vcpu->arch.write_fault_to_shadow_pgtable = false;
5202         kvm_clear_exception_queue(vcpu);
5203
5204         if (!(emulation_type & EMULTYPE_NO_DECODE)) {
5205                 init_emulate_ctxt(vcpu);
5206
5207                 /*
5208                  * We will reenter on the same instruction since
5209                  * we do not set complete_userspace_io.  This does not
5210                  * handle watchpoints yet, those would be handled in
5211                  * the emulate_ops.
5212                  */
5213                 if (kvm_vcpu_check_breakpoint(vcpu, &r))
5214                         return r;
5215
5216                 ctxt->interruptibility = 0;
5217                 ctxt->have_exception = false;
5218                 ctxt->exception.vector = -1;
5219                 ctxt->perm_ok = false;
5220
5221                 ctxt->ud = emulation_type & EMULTYPE_TRAP_UD;
5222
5223                 r = x86_decode_insn(ctxt, insn, insn_len);
5224
5225                 trace_kvm_emulate_insn_start(vcpu);
5226                 ++vcpu->stat.insn_emulation;
5227                 if (r != EMULATION_OK)  {
5228                         if (emulation_type & EMULTYPE_TRAP_UD)
5229                                 return EMULATE_FAIL;
5230                         if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5231                                                 emulation_type))
5232                                 return EMULATE_DONE;
5233                         if (emulation_type & EMULTYPE_SKIP)
5234                                 return EMULATE_FAIL;
5235                         return handle_emulation_failure(vcpu);
5236                 }
5237         }
5238
5239         if (emulation_type & EMULTYPE_SKIP) {
5240                 kvm_rip_write(vcpu, ctxt->_eip);
5241                 if (ctxt->eflags & X86_EFLAGS_RF)
5242                         kvm_set_rflags(vcpu, ctxt->eflags & ~X86_EFLAGS_RF);
5243                 return EMULATE_DONE;
5244         }
5245
5246         if (retry_instruction(ctxt, cr2, emulation_type))
5247                 return EMULATE_DONE;
5248
5249         /* this is needed for vmware backdoor interface to work since it
5250            changes registers values  during IO operation */
5251         if (vcpu->arch.emulate_regs_need_sync_from_vcpu) {
5252                 vcpu->arch.emulate_regs_need_sync_from_vcpu = false;
5253                 emulator_invalidate_register_cache(ctxt);
5254         }
5255
5256 restart:
5257         r = x86_emulate_insn(ctxt);
5258
5259         if (r == EMULATION_INTERCEPTED)
5260                 return EMULATE_DONE;
5261
5262         if (r == EMULATION_FAILED) {
5263                 if (reexecute_instruction(vcpu, cr2, write_fault_to_spt,
5264                                         emulation_type))
5265                         return EMULATE_DONE;
5266
5267                 return handle_emulation_failure(vcpu);
5268         }
5269
5270         if (ctxt->have_exception) {
5271                 r = EMULATE_DONE;
5272                 if (inject_emulated_exception(vcpu))
5273                         return r;
5274         } else if (vcpu->arch.pio.count) {
5275                 if (!vcpu->arch.pio.in) {
5276                         /* FIXME: return into emulator if single-stepping.  */
5277                         vcpu->arch.pio.count = 0;
5278                 } else {
5279                         writeback = false;
5280                         vcpu->arch.complete_userspace_io = complete_emulated_pio;
5281                 }
5282                 r = EMULATE_USER_EXIT;
5283         } else if (vcpu->mmio_needed) {
5284                 if (!vcpu->mmio_is_write)
5285                         writeback = false;
5286                 r = EMULATE_USER_EXIT;
5287                 vcpu->arch.complete_userspace_io = complete_emulated_mmio;
5288         } else if (r == EMULATION_RESTART)
5289                 goto restart;
5290         else
5291                 r = EMULATE_DONE;
5292
5293         if (writeback) {
5294                 unsigned long rflags = kvm_x86_ops->get_rflags(vcpu);
5295                 toggle_interruptibility(vcpu, ctxt->interruptibility);
5296                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
5297                 if (vcpu->arch.hflags != ctxt->emul_flags)
5298                         kvm_set_hflags(vcpu, ctxt->emul_flags);
5299                 kvm_rip_write(vcpu, ctxt->eip);
5300                 if (r == EMULATE_DONE)
5301                         kvm_vcpu_check_singlestep(vcpu, rflags, &r);
5302                 if (!ctxt->have_exception ||
5303                     exception_type(ctxt->exception.vector) == EXCPT_TRAP)
5304                         __kvm_set_rflags(vcpu, ctxt->eflags);
5305
5306                 /*
5307                  * For STI, interrupts are shadowed; so KVM_REQ_EVENT will
5308                  * do nothing, and it will be requested again as soon as
5309                  * the shadow expires.  But we still need to check here,
5310                  * because POPF has no interrupt shadow.
5311                  */
5312                 if (unlikely((ctxt->eflags & ~rflags) & X86_EFLAGS_IF))
5313                         kvm_make_request(KVM_REQ_EVENT, vcpu);
5314         } else
5315                 vcpu->arch.emulate_regs_need_sync_to_vcpu = true;
5316
5317         return r;
5318 }
5319 EXPORT_SYMBOL_GPL(x86_emulate_instruction);
5320
5321 int kvm_fast_pio_out(struct kvm_vcpu *vcpu, int size, unsigned short port)
5322 {
5323         unsigned long val = kvm_register_read(vcpu, VCPU_REGS_RAX);
5324         int ret = emulator_pio_out_emulated(&vcpu->arch.emulate_ctxt,
5325                                             size, port, &val, 1);
5326         /* do not return to emulator after return from userspace */
5327         vcpu->arch.pio.count = 0;
5328         return ret;
5329 }
5330 EXPORT_SYMBOL_GPL(kvm_fast_pio_out);
5331
5332 static void tsc_bad(void *info)
5333 {
5334         __this_cpu_write(cpu_tsc_khz, 0);
5335 }
5336
5337 static void tsc_khz_changed(void *data)
5338 {
5339         struct cpufreq_freqs *freq = data;
5340         unsigned long khz = 0;
5341
5342         if (data)
5343                 khz = freq->new;
5344         else if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5345                 khz = cpufreq_quick_get(raw_smp_processor_id());
5346         if (!khz)
5347                 khz = tsc_khz;
5348         __this_cpu_write(cpu_tsc_khz, khz);
5349 }
5350
5351 static int kvmclock_cpufreq_notifier(struct notifier_block *nb, unsigned long val,
5352                                      void *data)
5353 {
5354         struct cpufreq_freqs *freq = data;
5355         struct kvm *kvm;
5356         struct kvm_vcpu *vcpu;
5357         int i, send_ipi = 0;
5358
5359         /*
5360          * We allow guests to temporarily run on slowing clocks,
5361          * provided we notify them after, or to run on accelerating
5362          * clocks, provided we notify them before.  Thus time never
5363          * goes backwards.
5364          *
5365          * However, we have a problem.  We can't atomically update
5366          * the frequency of a given CPU from this function; it is
5367          * merely a notifier, which can be called from any CPU.
5368          * Changing the TSC frequency at arbitrary points in time
5369          * requires a recomputation of local variables related to
5370          * the TSC for each VCPU.  We must flag these local variables
5371          * to be updated and be sure the update takes place with the
5372          * new frequency before any guests proceed.
5373          *
5374          * Unfortunately, the combination of hotplug CPU and frequency
5375          * change creates an intractable locking scenario; the order
5376          * of when these callouts happen is undefined with respect to
5377          * CPU hotplug, and they can race with each other.  As such,
5378          * merely setting per_cpu(cpu_tsc_khz) = X during a hotadd is
5379          * undefined; you can actually have a CPU frequency change take
5380          * place in between the computation of X and the setting of the
5381          * variable.  To protect against this problem, all updates of
5382          * the per_cpu tsc_khz variable are done in an interrupt
5383          * protected IPI, and all callers wishing to update the value
5384          * must wait for a synchronous IPI to complete (which is trivial
5385          * if the caller is on the CPU already).  This establishes the
5386          * necessary total order on variable updates.
5387          *
5388          * Note that because a guest time update may take place
5389          * anytime after the setting of the VCPU's request bit, the
5390          * correct TSC value must be set before the request.  However,
5391          * to ensure the update actually makes it to any guest which
5392          * starts running in hardware virtualization between the set
5393          * and the acquisition of the spinlock, we must also ping the
5394          * CPU after setting the request bit.
5395          *
5396          */
5397
5398         if (val == CPUFREQ_PRECHANGE && freq->old > freq->new)
5399                 return 0;
5400         if (val == CPUFREQ_POSTCHANGE && freq->old < freq->new)
5401                 return 0;
5402
5403         smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5404
5405         spin_lock(&kvm_lock);
5406         list_for_each_entry(kvm, &vm_list, vm_list) {
5407                 kvm_for_each_vcpu(i, vcpu, kvm) {
5408                         if (vcpu->cpu != freq->cpu)
5409                                 continue;
5410                         kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
5411                         if (vcpu->cpu != smp_processor_id())
5412                                 send_ipi = 1;
5413                 }
5414         }
5415         spin_unlock(&kvm_lock);
5416
5417         if (freq->old < freq->new && send_ipi) {
5418                 /*
5419                  * We upscale the frequency.  Must make the guest
5420                  * doesn't see old kvmclock values while running with
5421                  * the new frequency, otherwise we risk the guest sees
5422                  * time go backwards.
5423                  *
5424                  * In case we update the frequency for another cpu
5425                  * (which might be in guest context) send an interrupt
5426                  * to kick the cpu out of guest context.  Next time
5427                  * guest context is entered kvmclock will be updated,
5428                  * so the guest will not see stale values.
5429                  */
5430                 smp_call_function_single(freq->cpu, tsc_khz_changed, freq, 1);
5431         }
5432         return 0;
5433 }
5434
5435 static struct notifier_block kvmclock_cpufreq_notifier_block = {
5436         .notifier_call  = kvmclock_cpufreq_notifier
5437 };
5438
5439 static int kvmclock_cpu_notifier(struct notifier_block *nfb,
5440                                         unsigned long action, void *hcpu)
5441 {
5442         unsigned int cpu = (unsigned long)hcpu;
5443
5444         switch (action) {
5445                 case CPU_ONLINE:
5446                 case CPU_DOWN_FAILED:
5447                         smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5448                         break;
5449                 case CPU_DOWN_PREPARE:
5450                         smp_call_function_single(cpu, tsc_bad, NULL, 1);
5451                         break;
5452         }
5453         return NOTIFY_OK;
5454 }
5455
5456 static struct notifier_block kvmclock_cpu_notifier_block = {
5457         .notifier_call  = kvmclock_cpu_notifier,
5458         .priority = -INT_MAX
5459 };
5460
5461 static void kvm_timer_init(void)
5462 {
5463         int cpu;
5464
5465         max_tsc_khz = tsc_khz;
5466
5467         cpu_notifier_register_begin();
5468         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC)) {
5469 #ifdef CONFIG_CPU_FREQ
5470                 struct cpufreq_policy policy;
5471                 memset(&policy, 0, sizeof(policy));
5472                 cpu = get_cpu();
5473                 cpufreq_get_policy(&policy, cpu);
5474                 if (policy.cpuinfo.max_freq)
5475                         max_tsc_khz = policy.cpuinfo.max_freq;
5476                 put_cpu();
5477 #endif
5478                 cpufreq_register_notifier(&kvmclock_cpufreq_notifier_block,
5479                                           CPUFREQ_TRANSITION_NOTIFIER);
5480         }
5481         pr_debug("kvm: max_tsc_khz = %ld\n", max_tsc_khz);
5482         for_each_online_cpu(cpu)
5483                 smp_call_function_single(cpu, tsc_khz_changed, NULL, 1);
5484
5485         __register_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5486         cpu_notifier_register_done();
5487
5488 }
5489
5490 static DEFINE_PER_CPU(struct kvm_vcpu *, current_vcpu);
5491
5492 int kvm_is_in_guest(void)
5493 {
5494         return __this_cpu_read(current_vcpu) != NULL;
5495 }
5496
5497 static int kvm_is_user_mode(void)
5498 {
5499         int user_mode = 3;
5500
5501         if (__this_cpu_read(current_vcpu))
5502                 user_mode = kvm_x86_ops->get_cpl(__this_cpu_read(current_vcpu));
5503
5504         return user_mode != 0;
5505 }
5506
5507 static unsigned long kvm_get_guest_ip(void)
5508 {
5509         unsigned long ip = 0;
5510
5511         if (__this_cpu_read(current_vcpu))
5512                 ip = kvm_rip_read(__this_cpu_read(current_vcpu));
5513
5514         return ip;
5515 }
5516
5517 static struct perf_guest_info_callbacks kvm_guest_cbs = {
5518         .is_in_guest            = kvm_is_in_guest,
5519         .is_user_mode           = kvm_is_user_mode,
5520         .get_guest_ip           = kvm_get_guest_ip,
5521 };
5522
5523 void kvm_before_handle_nmi(struct kvm_vcpu *vcpu)
5524 {
5525         __this_cpu_write(current_vcpu, vcpu);
5526 }
5527 EXPORT_SYMBOL_GPL(kvm_before_handle_nmi);
5528
5529 void kvm_after_handle_nmi(struct kvm_vcpu *vcpu)
5530 {
5531         __this_cpu_write(current_vcpu, NULL);
5532 }
5533 EXPORT_SYMBOL_GPL(kvm_after_handle_nmi);
5534
5535 static void kvm_set_mmio_spte_mask(void)
5536 {
5537         u64 mask;
5538         int maxphyaddr = boot_cpu_data.x86_phys_bits;
5539
5540         /*
5541          * Set the reserved bits and the present bit of an paging-structure
5542          * entry to generate page fault with PFER.RSV = 1.
5543          */
5544          /* Mask the reserved physical address bits. */
5545         mask = rsvd_bits(maxphyaddr, 51);
5546
5547         /* Bit 62 is always reserved for 32bit host. */
5548         mask |= 0x3ull << 62;
5549
5550         /* Set the present bit. */
5551         mask |= 1ull;
5552
5553 #ifdef CONFIG_X86_64
5554         /*
5555          * If reserved bit is not supported, clear the present bit to disable
5556          * mmio page fault.
5557          */
5558         if (maxphyaddr == 52)
5559                 mask &= ~1ull;
5560 #endif
5561
5562         kvm_mmu_set_mmio_spte_mask(mask);
5563 }
5564
5565 #ifdef CONFIG_X86_64
5566 static void pvclock_gtod_update_fn(struct work_struct *work)
5567 {
5568         struct kvm *kvm;
5569
5570         struct kvm_vcpu *vcpu;
5571         int i;
5572
5573         spin_lock(&kvm_lock);
5574         list_for_each_entry(kvm, &vm_list, vm_list)
5575                 kvm_for_each_vcpu(i, vcpu, kvm)
5576                         kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
5577         atomic_set(&kvm_guest_has_master_clock, 0);
5578         spin_unlock(&kvm_lock);
5579 }
5580
5581 static DECLARE_WORK(pvclock_gtod_work, pvclock_gtod_update_fn);
5582
5583 /*
5584  * Notification about pvclock gtod data update.
5585  */
5586 static int pvclock_gtod_notify(struct notifier_block *nb, unsigned long unused,
5587                                void *priv)
5588 {
5589         struct pvclock_gtod_data *gtod = &pvclock_gtod_data;
5590         struct timekeeper *tk = priv;
5591
5592         update_pvclock_gtod(tk);
5593
5594         /* disable master clock if host does not trust, or does not
5595          * use, TSC clocksource
5596          */
5597         if (gtod->clock.vclock_mode != VCLOCK_TSC &&
5598             atomic_read(&kvm_guest_has_master_clock) != 0)
5599                 queue_work(system_long_wq, &pvclock_gtod_work);
5600
5601         return 0;
5602 }
5603
5604 static struct notifier_block pvclock_gtod_notifier = {
5605         .notifier_call = pvclock_gtod_notify,
5606 };
5607 #endif
5608
5609 int kvm_arch_init(void *opaque)
5610 {
5611         int r;
5612         struct kvm_x86_ops *ops = opaque;
5613
5614         if (kvm_x86_ops) {
5615                 printk(KERN_ERR "kvm: already loaded the other module\n");
5616                 r = -EEXIST;
5617                 goto out;
5618         }
5619
5620         if (!ops->cpu_has_kvm_support()) {
5621                 printk(KERN_ERR "kvm: no hardware support\n");
5622                 r = -EOPNOTSUPP;
5623                 goto out;
5624         }
5625         if (ops->disabled_by_bios()) {
5626                 printk(KERN_ERR "kvm: disabled by bios\n");
5627                 r = -EOPNOTSUPP;
5628                 goto out;
5629         }
5630
5631         r = -ENOMEM;
5632         shared_msrs = alloc_percpu(struct kvm_shared_msrs);
5633         if (!shared_msrs) {
5634                 printk(KERN_ERR "kvm: failed to allocate percpu kvm_shared_msrs\n");
5635                 goto out;
5636         }
5637
5638         r = kvm_mmu_module_init();
5639         if (r)
5640                 goto out_free_percpu;
5641
5642         kvm_set_mmio_spte_mask();
5643
5644         kvm_x86_ops = ops;
5645
5646         kvm_mmu_set_mask_ptes(PT_USER_MASK, PT_ACCESSED_MASK,
5647                         PT_DIRTY_MASK, PT64_NX_MASK, 0);
5648
5649         kvm_timer_init();
5650
5651         perf_register_guest_info_callbacks(&kvm_guest_cbs);
5652
5653         if (cpu_has_xsave)
5654                 host_xcr0 = xgetbv(XCR_XFEATURE_ENABLED_MASK);
5655
5656         kvm_lapic_init();
5657 #ifdef CONFIG_X86_64
5658         pvclock_gtod_register_notifier(&pvclock_gtod_notifier);
5659 #endif
5660
5661         return 0;
5662
5663 out_free_percpu:
5664         free_percpu(shared_msrs);
5665 out:
5666         return r;
5667 }
5668
5669 void kvm_arch_exit(void)
5670 {
5671         perf_unregister_guest_info_callbacks(&kvm_guest_cbs);
5672
5673         if (!boot_cpu_has(X86_FEATURE_CONSTANT_TSC))
5674                 cpufreq_unregister_notifier(&kvmclock_cpufreq_notifier_block,
5675                                             CPUFREQ_TRANSITION_NOTIFIER);
5676         unregister_hotcpu_notifier(&kvmclock_cpu_notifier_block);
5677 #ifdef CONFIG_X86_64
5678         pvclock_gtod_unregister_notifier(&pvclock_gtod_notifier);
5679 #endif
5680         kvm_x86_ops = NULL;
5681         kvm_mmu_module_exit();
5682         free_percpu(shared_msrs);
5683 }
5684
5685 int kvm_vcpu_halt(struct kvm_vcpu *vcpu)
5686 {
5687         ++vcpu->stat.halt_exits;
5688         if (lapic_in_kernel(vcpu)) {
5689                 vcpu->arch.mp_state = KVM_MP_STATE_HALTED;
5690                 return 1;
5691         } else {
5692                 vcpu->run->exit_reason = KVM_EXIT_HLT;
5693                 return 0;
5694         }
5695 }
5696 EXPORT_SYMBOL_GPL(kvm_vcpu_halt);
5697
5698 int kvm_emulate_halt(struct kvm_vcpu *vcpu)
5699 {
5700         kvm_x86_ops->skip_emulated_instruction(vcpu);
5701         return kvm_vcpu_halt(vcpu);
5702 }
5703 EXPORT_SYMBOL_GPL(kvm_emulate_halt);
5704
5705 /*
5706  * kvm_pv_kick_cpu_op:  Kick a vcpu.
5707  *
5708  * @apicid - apicid of vcpu to be kicked.
5709  */
5710 static void kvm_pv_kick_cpu_op(struct kvm *kvm, unsigned long flags, int apicid)
5711 {
5712         struct kvm_lapic_irq lapic_irq;
5713
5714         lapic_irq.shorthand = 0;
5715         lapic_irq.dest_mode = 0;
5716         lapic_irq.dest_id = apicid;
5717         lapic_irq.msi_redir_hint = false;
5718
5719         lapic_irq.delivery_mode = APIC_DM_REMRD;
5720         kvm_irq_delivery_to_apic(kvm, NULL, &lapic_irq, NULL);
5721 }
5722
5723 int kvm_emulate_hypercall(struct kvm_vcpu *vcpu)
5724 {
5725         unsigned long nr, a0, a1, a2, a3, ret;
5726         int op_64_bit, r = 1;
5727
5728         kvm_x86_ops->skip_emulated_instruction(vcpu);
5729
5730         if (kvm_hv_hypercall_enabled(vcpu->kvm))
5731                 return kvm_hv_hypercall(vcpu);
5732
5733         nr = kvm_register_read(vcpu, VCPU_REGS_RAX);
5734         a0 = kvm_register_read(vcpu, VCPU_REGS_RBX);
5735         a1 = kvm_register_read(vcpu, VCPU_REGS_RCX);
5736         a2 = kvm_register_read(vcpu, VCPU_REGS_RDX);
5737         a3 = kvm_register_read(vcpu, VCPU_REGS_RSI);
5738
5739         trace_kvm_hypercall(nr, a0, a1, a2, a3);
5740
5741         op_64_bit = is_64_bit_mode(vcpu);
5742         if (!op_64_bit) {
5743                 nr &= 0xFFFFFFFF;
5744                 a0 &= 0xFFFFFFFF;
5745                 a1 &= 0xFFFFFFFF;
5746                 a2 &= 0xFFFFFFFF;
5747                 a3 &= 0xFFFFFFFF;
5748         }
5749
5750         if (kvm_x86_ops->get_cpl(vcpu) != 0) {
5751                 ret = -KVM_EPERM;
5752                 goto out;
5753         }
5754
5755         switch (nr) {
5756         case KVM_HC_VAPIC_POLL_IRQ:
5757                 ret = 0;
5758                 break;
5759         case KVM_HC_KICK_CPU:
5760                 kvm_pv_kick_cpu_op(vcpu->kvm, a0, a1);
5761                 ret = 0;
5762                 break;
5763         default:
5764                 ret = -KVM_ENOSYS;
5765                 break;
5766         }
5767 out:
5768         if (!op_64_bit)
5769                 ret = (u32)ret;
5770         kvm_register_write(vcpu, VCPU_REGS_RAX, ret);
5771         ++vcpu->stat.hypercalls;
5772         return r;
5773 }
5774 EXPORT_SYMBOL_GPL(kvm_emulate_hypercall);
5775
5776 static int emulator_fix_hypercall(struct x86_emulate_ctxt *ctxt)
5777 {
5778         struct kvm_vcpu *vcpu = emul_to_vcpu(ctxt);
5779         char instruction[3];
5780         unsigned long rip = kvm_rip_read(vcpu);
5781
5782         kvm_x86_ops->patch_hypercall(vcpu, instruction);
5783
5784         return emulator_write_emulated(ctxt, rip, instruction, 3, NULL);
5785 }
5786
5787 /*
5788  * Check if userspace requested an interrupt window, and that the
5789  * interrupt window is open.
5790  *
5791  * No need to exit to userspace if we already have an interrupt queued.
5792  */
5793 static int dm_request_for_irq_injection(struct kvm_vcpu *vcpu)
5794 {
5795         return (!irqchip_in_kernel(vcpu->kvm) && !kvm_cpu_has_interrupt(vcpu) &&
5796                 vcpu->run->request_interrupt_window &&
5797                 kvm_arch_interrupt_allowed(vcpu));
5798 }
5799
5800 static void post_kvm_run_save(struct kvm_vcpu *vcpu)
5801 {
5802         struct kvm_run *kvm_run = vcpu->run;
5803
5804         kvm_run->if_flag = (kvm_get_rflags(vcpu) & X86_EFLAGS_IF) != 0;
5805         kvm_run->flags = is_smm(vcpu) ? KVM_RUN_X86_SMM : 0;
5806         kvm_run->cr8 = kvm_get_cr8(vcpu);
5807         kvm_run->apic_base = kvm_get_apic_base(vcpu);
5808         if (irqchip_in_kernel(vcpu->kvm))
5809                 kvm_run->ready_for_interrupt_injection = 1;
5810         else
5811                 kvm_run->ready_for_interrupt_injection =
5812                         kvm_arch_interrupt_allowed(vcpu) &&
5813                         !kvm_cpu_has_interrupt(vcpu) &&
5814                         !kvm_event_needs_reinjection(vcpu);
5815 }
5816
5817 static void update_cr8_intercept(struct kvm_vcpu *vcpu)
5818 {
5819         int max_irr, tpr;
5820
5821         if (!kvm_x86_ops->update_cr8_intercept)
5822                 return;
5823
5824         if (!vcpu->arch.apic)
5825                 return;
5826
5827         if (!vcpu->arch.apic->vapic_addr)
5828                 max_irr = kvm_lapic_find_highest_irr(vcpu);
5829         else
5830                 max_irr = -1;
5831
5832         if (max_irr != -1)
5833                 max_irr >>= 4;
5834
5835         tpr = kvm_lapic_get_cr8(vcpu);
5836
5837         kvm_x86_ops->update_cr8_intercept(vcpu, tpr, max_irr);
5838 }
5839
5840 static int inject_pending_event(struct kvm_vcpu *vcpu, bool req_int_win)
5841 {
5842         int r;
5843
5844         /* try to reinject previous events if any */
5845         if (vcpu->arch.exception.pending) {
5846                 trace_kvm_inj_exception(vcpu->arch.exception.nr,
5847                                         vcpu->arch.exception.has_error_code,
5848                                         vcpu->arch.exception.error_code);
5849
5850                 if (exception_type(vcpu->arch.exception.nr) == EXCPT_FAULT)
5851                         __kvm_set_rflags(vcpu, kvm_get_rflags(vcpu) |
5852                                              X86_EFLAGS_RF);
5853
5854                 if (vcpu->arch.exception.nr == DB_VECTOR &&
5855                     (vcpu->arch.dr7 & DR7_GD)) {
5856                         vcpu->arch.dr7 &= ~DR7_GD;
5857                         kvm_update_dr7(vcpu);
5858                 }
5859
5860                 kvm_x86_ops->queue_exception(vcpu, vcpu->arch.exception.nr,
5861                                           vcpu->arch.exception.has_error_code,
5862                                           vcpu->arch.exception.error_code,
5863                                           vcpu->arch.exception.reinject);
5864                 return 0;
5865         }
5866
5867         if (vcpu->arch.nmi_injected) {
5868                 kvm_x86_ops->set_nmi(vcpu);
5869                 return 0;
5870         }
5871
5872         if (vcpu->arch.interrupt.pending) {
5873                 kvm_x86_ops->set_irq(vcpu);
5874                 return 0;
5875         }
5876
5877         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5878                 r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5879                 if (r != 0)
5880                         return r;
5881         }
5882
5883         /* try to inject new event if pending */
5884         if (vcpu->arch.nmi_pending) {
5885                 if (kvm_x86_ops->nmi_allowed(vcpu)) {
5886                         --vcpu->arch.nmi_pending;
5887                         vcpu->arch.nmi_injected = true;
5888                         kvm_x86_ops->set_nmi(vcpu);
5889                 }
5890         } else if (kvm_cpu_has_injectable_intr(vcpu)) {
5891                 /*
5892                  * Because interrupts can be injected asynchronously, we are
5893                  * calling check_nested_events again here to avoid a race condition.
5894                  * See https://lkml.org/lkml/2014/7/2/60 for discussion about this
5895                  * proposal and current concerns.  Perhaps we should be setting
5896                  * KVM_REQ_EVENT only on certain events and not unconditionally?
5897                  */
5898                 if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events) {
5899                         r = kvm_x86_ops->check_nested_events(vcpu, req_int_win);
5900                         if (r != 0)
5901                                 return r;
5902                 }
5903                 if (kvm_x86_ops->interrupt_allowed(vcpu)) {
5904                         kvm_queue_interrupt(vcpu, kvm_cpu_get_interrupt(vcpu),
5905                                             false);
5906                         kvm_x86_ops->set_irq(vcpu);
5907                 }
5908         }
5909         return 0;
5910 }
5911
5912 static void process_nmi(struct kvm_vcpu *vcpu)
5913 {
5914         unsigned limit = 2;
5915
5916         /*
5917          * x86 is limited to one NMI running, and one NMI pending after it.
5918          * If an NMI is already in progress, limit further NMIs to just one.
5919          * Otherwise, allow two (and we'll inject the first one immediately).
5920          */
5921         if (kvm_x86_ops->get_nmi_mask(vcpu) || vcpu->arch.nmi_injected)
5922                 limit = 1;
5923
5924         vcpu->arch.nmi_pending += atomic_xchg(&vcpu->arch.nmi_queued, 0);
5925         vcpu->arch.nmi_pending = min(vcpu->arch.nmi_pending, limit);
5926         kvm_make_request(KVM_REQ_EVENT, vcpu);
5927 }
5928
5929 #define put_smstate(type, buf, offset, val)                       \
5930         *(type *)((buf) + (offset) - 0x7e00) = val
5931
5932 static u32 process_smi_get_segment_flags(struct kvm_segment *seg)
5933 {
5934         u32 flags = 0;
5935         flags |= seg->g       << 23;
5936         flags |= seg->db      << 22;
5937         flags |= seg->l       << 21;
5938         flags |= seg->avl     << 20;
5939         flags |= seg->present << 15;
5940         flags |= seg->dpl     << 13;
5941         flags |= seg->s       << 12;
5942         flags |= seg->type    << 8;
5943         return flags;
5944 }
5945
5946 static void process_smi_save_seg_32(struct kvm_vcpu *vcpu, char *buf, int n)
5947 {
5948         struct kvm_segment seg;
5949         int offset;
5950
5951         kvm_get_segment(vcpu, &seg, n);
5952         put_smstate(u32, buf, 0x7fa8 + n * 4, seg.selector);
5953
5954         if (n < 3)
5955                 offset = 0x7f84 + n * 12;
5956         else
5957                 offset = 0x7f2c + (n - 3) * 12;
5958
5959         put_smstate(u32, buf, offset + 8, seg.base);
5960         put_smstate(u32, buf, offset + 4, seg.limit);
5961         put_smstate(u32, buf, offset, process_smi_get_segment_flags(&seg));
5962 }
5963
5964 #ifdef CONFIG_X86_64
5965 static void process_smi_save_seg_64(struct kvm_vcpu *vcpu, char *buf, int n)
5966 {
5967         struct kvm_segment seg;
5968         int offset;
5969         u16 flags;
5970
5971         kvm_get_segment(vcpu, &seg, n);
5972         offset = 0x7e00 + n * 16;
5973
5974         flags = process_smi_get_segment_flags(&seg) >> 8;
5975         put_smstate(u16, buf, offset, seg.selector);
5976         put_smstate(u16, buf, offset + 2, flags);
5977         put_smstate(u32, buf, offset + 4, seg.limit);
5978         put_smstate(u64, buf, offset + 8, seg.base);
5979 }
5980 #endif
5981
5982 static void process_smi_save_state_32(struct kvm_vcpu *vcpu, char *buf)
5983 {
5984         struct desc_ptr dt;
5985         struct kvm_segment seg;
5986         unsigned long val;
5987         int i;
5988
5989         put_smstate(u32, buf, 0x7ffc, kvm_read_cr0(vcpu));
5990         put_smstate(u32, buf, 0x7ff8, kvm_read_cr3(vcpu));
5991         put_smstate(u32, buf, 0x7ff4, kvm_get_rflags(vcpu));
5992         put_smstate(u32, buf, 0x7ff0, kvm_rip_read(vcpu));
5993
5994         for (i = 0; i < 8; i++)
5995                 put_smstate(u32, buf, 0x7fd0 + i * 4, kvm_register_read(vcpu, i));
5996
5997         kvm_get_dr(vcpu, 6, &val);
5998         put_smstate(u32, buf, 0x7fcc, (u32)val);
5999         kvm_get_dr(vcpu, 7, &val);
6000         put_smstate(u32, buf, 0x7fc8, (u32)val);
6001
6002         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6003         put_smstate(u32, buf, 0x7fc4, seg.selector);
6004         put_smstate(u32, buf, 0x7f64, seg.base);
6005         put_smstate(u32, buf, 0x7f60, seg.limit);
6006         put_smstate(u32, buf, 0x7f5c, process_smi_get_segment_flags(&seg));
6007
6008         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6009         put_smstate(u32, buf, 0x7fc0, seg.selector);
6010         put_smstate(u32, buf, 0x7f80, seg.base);
6011         put_smstate(u32, buf, 0x7f7c, seg.limit);
6012         put_smstate(u32, buf, 0x7f78, process_smi_get_segment_flags(&seg));
6013
6014         kvm_x86_ops->get_gdt(vcpu, &dt);
6015         put_smstate(u32, buf, 0x7f74, dt.address);
6016         put_smstate(u32, buf, 0x7f70, dt.size);
6017
6018         kvm_x86_ops->get_idt(vcpu, &dt);
6019         put_smstate(u32, buf, 0x7f58, dt.address);
6020         put_smstate(u32, buf, 0x7f54, dt.size);
6021
6022         for (i = 0; i < 6; i++)
6023                 process_smi_save_seg_32(vcpu, buf, i);
6024
6025         put_smstate(u32, buf, 0x7f14, kvm_read_cr4(vcpu));
6026
6027         /* revision id */
6028         put_smstate(u32, buf, 0x7efc, 0x00020000);
6029         put_smstate(u32, buf, 0x7ef8, vcpu->arch.smbase);
6030 }
6031
6032 static void process_smi_save_state_64(struct kvm_vcpu *vcpu, char *buf)
6033 {
6034 #ifdef CONFIG_X86_64
6035         struct desc_ptr dt;
6036         struct kvm_segment seg;
6037         unsigned long val;
6038         int i;
6039
6040         for (i = 0; i < 16; i++)
6041                 put_smstate(u64, buf, 0x7ff8 - i * 8, kvm_register_read(vcpu, i));
6042
6043         put_smstate(u64, buf, 0x7f78, kvm_rip_read(vcpu));
6044         put_smstate(u32, buf, 0x7f70, kvm_get_rflags(vcpu));
6045
6046         kvm_get_dr(vcpu, 6, &val);
6047         put_smstate(u64, buf, 0x7f68, val);
6048         kvm_get_dr(vcpu, 7, &val);
6049         put_smstate(u64, buf, 0x7f60, val);
6050
6051         put_smstate(u64, buf, 0x7f58, kvm_read_cr0(vcpu));
6052         put_smstate(u64, buf, 0x7f50, kvm_read_cr3(vcpu));
6053         put_smstate(u64, buf, 0x7f48, kvm_read_cr4(vcpu));
6054
6055         put_smstate(u32, buf, 0x7f00, vcpu->arch.smbase);
6056
6057         /* revision id */
6058         put_smstate(u32, buf, 0x7efc, 0x00020064);
6059
6060         put_smstate(u64, buf, 0x7ed0, vcpu->arch.efer);
6061
6062         kvm_get_segment(vcpu, &seg, VCPU_SREG_TR);
6063         put_smstate(u16, buf, 0x7e90, seg.selector);
6064         put_smstate(u16, buf, 0x7e92, process_smi_get_segment_flags(&seg) >> 8);
6065         put_smstate(u32, buf, 0x7e94, seg.limit);
6066         put_smstate(u64, buf, 0x7e98, seg.base);
6067
6068         kvm_x86_ops->get_idt(vcpu, &dt);
6069         put_smstate(u32, buf, 0x7e84, dt.size);
6070         put_smstate(u64, buf, 0x7e88, dt.address);
6071
6072         kvm_get_segment(vcpu, &seg, VCPU_SREG_LDTR);
6073         put_smstate(u16, buf, 0x7e70, seg.selector);
6074         put_smstate(u16, buf, 0x7e72, process_smi_get_segment_flags(&seg) >> 8);
6075         put_smstate(u32, buf, 0x7e74, seg.limit);
6076         put_smstate(u64, buf, 0x7e78, seg.base);
6077
6078         kvm_x86_ops->get_gdt(vcpu, &dt);
6079         put_smstate(u32, buf, 0x7e64, dt.size);
6080         put_smstate(u64, buf, 0x7e68, dt.address);
6081
6082         for (i = 0; i < 6; i++)
6083                 process_smi_save_seg_64(vcpu, buf, i);
6084 #else
6085         WARN_ON_ONCE(1);
6086 #endif
6087 }
6088
6089 static void process_smi(struct kvm_vcpu *vcpu)
6090 {
6091         struct kvm_segment cs, ds;
6092         struct desc_ptr dt;
6093         char buf[512];
6094         u32 cr0;
6095
6096         if (is_smm(vcpu)) {
6097                 vcpu->arch.smi_pending = true;
6098                 return;
6099         }
6100
6101         trace_kvm_enter_smm(vcpu->vcpu_id, vcpu->arch.smbase, true);
6102         vcpu->arch.hflags |= HF_SMM_MASK;
6103         memset(buf, 0, 512);
6104         if (guest_cpuid_has_longmode(vcpu))
6105                 process_smi_save_state_64(vcpu, buf);
6106         else
6107                 process_smi_save_state_32(vcpu, buf);
6108
6109         kvm_vcpu_write_guest(vcpu, vcpu->arch.smbase + 0xfe00, buf, sizeof(buf));
6110
6111         if (kvm_x86_ops->get_nmi_mask(vcpu))
6112                 vcpu->arch.hflags |= HF_SMM_INSIDE_NMI_MASK;
6113         else
6114                 kvm_x86_ops->set_nmi_mask(vcpu, true);
6115
6116         kvm_set_rflags(vcpu, X86_EFLAGS_FIXED);
6117         kvm_rip_write(vcpu, 0x8000);
6118
6119         cr0 = vcpu->arch.cr0 & ~(X86_CR0_PE | X86_CR0_EM | X86_CR0_TS | X86_CR0_PG);
6120         kvm_x86_ops->set_cr0(vcpu, cr0);
6121         vcpu->arch.cr0 = cr0;
6122
6123         kvm_x86_ops->set_cr4(vcpu, 0);
6124
6125         /* Undocumented: IDT limit is set to zero on entry to SMM.  */
6126         dt.address = dt.size = 0;
6127         kvm_x86_ops->set_idt(vcpu, &dt);
6128
6129         __kvm_set_dr(vcpu, 7, DR7_FIXED_1);
6130
6131         cs.selector = (vcpu->arch.smbase >> 4) & 0xffff;
6132         cs.base = vcpu->arch.smbase;
6133
6134         ds.selector = 0;
6135         ds.base = 0;
6136
6137         cs.limit    = ds.limit = 0xffffffff;
6138         cs.type     = ds.type = 0x3;
6139         cs.dpl      = ds.dpl = 0;
6140         cs.db       = ds.db = 0;
6141         cs.s        = ds.s = 1;
6142         cs.l        = ds.l = 0;
6143         cs.g        = ds.g = 1;
6144         cs.avl      = ds.avl = 0;
6145         cs.present  = ds.present = 1;
6146         cs.unusable = ds.unusable = 0;
6147         cs.padding  = ds.padding = 0;
6148
6149         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
6150         kvm_set_segment(vcpu, &ds, VCPU_SREG_DS);
6151         kvm_set_segment(vcpu, &ds, VCPU_SREG_ES);
6152         kvm_set_segment(vcpu, &ds, VCPU_SREG_FS);
6153         kvm_set_segment(vcpu, &ds, VCPU_SREG_GS);
6154         kvm_set_segment(vcpu, &ds, VCPU_SREG_SS);
6155
6156         if (guest_cpuid_has_longmode(vcpu))
6157                 kvm_x86_ops->set_efer(vcpu, 0);
6158
6159         kvm_update_cpuid(vcpu);
6160         kvm_mmu_reset_context(vcpu);
6161 }
6162
6163 static void vcpu_scan_ioapic(struct kvm_vcpu *vcpu)
6164 {
6165         if (!kvm_apic_hw_enabled(vcpu->arch.apic))
6166                 return;
6167
6168         memset(vcpu->arch.eoi_exit_bitmap, 0, 256 / 8);
6169
6170         kvm_ioapic_scan_entry(vcpu, vcpu->arch.eoi_exit_bitmap);
6171         kvm_x86_ops->load_eoi_exitmap(vcpu);
6172 }
6173
6174 static void kvm_vcpu_flush_tlb(struct kvm_vcpu *vcpu)
6175 {
6176         ++vcpu->stat.tlb_flush;
6177         kvm_x86_ops->tlb_flush(vcpu);
6178 }
6179
6180 void kvm_vcpu_reload_apic_access_page(struct kvm_vcpu *vcpu)
6181 {
6182         struct page *page = NULL;
6183
6184         if (!lapic_in_kernel(vcpu))
6185                 return;
6186
6187         if (!kvm_x86_ops->set_apic_access_page_addr)
6188                 return;
6189
6190         page = gfn_to_page(vcpu->kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT);
6191         if (is_error_page(page))
6192                 return;
6193         kvm_x86_ops->set_apic_access_page_addr(vcpu, page_to_phys(page));
6194
6195         /*
6196          * Do not pin apic access page in memory, the MMU notifier
6197          * will call us again if it is migrated or swapped out.
6198          */
6199         put_page(page);
6200 }
6201 EXPORT_SYMBOL_GPL(kvm_vcpu_reload_apic_access_page);
6202
6203 void kvm_arch_mmu_notifier_invalidate_page(struct kvm *kvm,
6204                                            unsigned long address)
6205 {
6206         /*
6207          * The physical address of apic access page is stored in the VMCS.
6208          * Update it when it becomes invalid.
6209          */
6210         if (address == gfn_to_hva(kvm, APIC_DEFAULT_PHYS_BASE >> PAGE_SHIFT))
6211                 kvm_make_all_cpus_request(kvm, KVM_REQ_APIC_PAGE_RELOAD);
6212 }
6213
6214 /*
6215  * Returns 1 to let vcpu_run() continue the guest execution loop without
6216  * exiting to the userspace.  Otherwise, the value will be returned to the
6217  * userspace.
6218  */
6219 static int vcpu_enter_guest(struct kvm_vcpu *vcpu)
6220 {
6221         int r;
6222         bool req_int_win = !lapic_in_kernel(vcpu) &&
6223                 vcpu->run->request_interrupt_window;
6224         bool req_immediate_exit = false;
6225
6226         if (vcpu->requests) {
6227                 if (kvm_check_request(KVM_REQ_MMU_RELOAD, vcpu))
6228                         kvm_mmu_unload(vcpu);
6229                 if (kvm_check_request(KVM_REQ_MIGRATE_TIMER, vcpu))
6230                         __kvm_migrate_timers(vcpu);
6231                 if (kvm_check_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu))
6232                         kvm_gen_update_masterclock(vcpu->kvm);
6233                 if (kvm_check_request(KVM_REQ_GLOBAL_CLOCK_UPDATE, vcpu))
6234                         kvm_gen_kvmclock_update(vcpu);
6235                 if (kvm_check_request(KVM_REQ_CLOCK_UPDATE, vcpu)) {
6236                         r = kvm_guest_time_update(vcpu);
6237                         if (unlikely(r))
6238                                 goto out;
6239                 }
6240                 if (kvm_check_request(KVM_REQ_MMU_SYNC, vcpu))
6241                         kvm_mmu_sync_roots(vcpu);
6242                 if (kvm_check_request(KVM_REQ_TLB_FLUSH, vcpu))
6243                         kvm_vcpu_flush_tlb(vcpu);
6244                 if (kvm_check_request(KVM_REQ_REPORT_TPR_ACCESS, vcpu)) {
6245                         vcpu->run->exit_reason = KVM_EXIT_TPR_ACCESS;
6246                         r = 0;
6247                         goto out;
6248                 }
6249                 if (kvm_check_request(KVM_REQ_TRIPLE_FAULT, vcpu)) {
6250                         vcpu->run->exit_reason = KVM_EXIT_SHUTDOWN;
6251                         r = 0;
6252                         goto out;
6253                 }
6254                 if (kvm_check_request(KVM_REQ_DEACTIVATE_FPU, vcpu)) {
6255                         vcpu->fpu_active = 0;
6256                         kvm_x86_ops->fpu_deactivate(vcpu);
6257                 }
6258                 if (kvm_check_request(KVM_REQ_APF_HALT, vcpu)) {
6259                         /* Page is swapped out. Do synthetic halt */
6260                         vcpu->arch.apf.halted = true;
6261                         r = 1;
6262                         goto out;
6263                 }
6264                 if (kvm_check_request(KVM_REQ_STEAL_UPDATE, vcpu))
6265                         record_steal_time(vcpu);
6266                 if (kvm_check_request(KVM_REQ_SMI, vcpu))
6267                         process_smi(vcpu);
6268                 if (kvm_check_request(KVM_REQ_NMI, vcpu))
6269                         process_nmi(vcpu);
6270                 if (kvm_check_request(KVM_REQ_PMU, vcpu))
6271                         kvm_pmu_handle_event(vcpu);
6272                 if (kvm_check_request(KVM_REQ_PMI, vcpu))
6273                         kvm_pmu_deliver_pmi(vcpu);
6274                 if (kvm_check_request(KVM_REQ_SCAN_IOAPIC, vcpu))
6275                         vcpu_scan_ioapic(vcpu);
6276                 if (kvm_check_request(KVM_REQ_APIC_PAGE_RELOAD, vcpu))
6277                         kvm_vcpu_reload_apic_access_page(vcpu);
6278                 if (kvm_check_request(KVM_REQ_HV_CRASH, vcpu)) {
6279                         vcpu->run->exit_reason = KVM_EXIT_SYSTEM_EVENT;
6280                         vcpu->run->system_event.type = KVM_SYSTEM_EVENT_CRASH;
6281                         r = 0;
6282                         goto out;
6283                 }
6284         }
6285
6286         if (kvm_check_request(KVM_REQ_EVENT, vcpu) || req_int_win) {
6287                 kvm_apic_accept_events(vcpu);
6288                 if (vcpu->arch.mp_state == KVM_MP_STATE_INIT_RECEIVED) {
6289                         r = 1;
6290                         goto out;
6291                 }
6292
6293                 if (inject_pending_event(vcpu, req_int_win) != 0)
6294                         req_immediate_exit = true;
6295                 /* enable NMI/IRQ window open exits if needed */
6296                 else if (vcpu->arch.nmi_pending)
6297                         kvm_x86_ops->enable_nmi_window(vcpu);
6298                 else if (kvm_cpu_has_injectable_intr(vcpu) || req_int_win)
6299                         kvm_x86_ops->enable_irq_window(vcpu);
6300
6301                 if (kvm_lapic_enabled(vcpu)) {
6302                         /*
6303                          * Update architecture specific hints for APIC
6304                          * virtual interrupt delivery.
6305                          */
6306                         if (kvm_x86_ops->hwapic_irr_update)
6307                                 kvm_x86_ops->hwapic_irr_update(vcpu,
6308                                         kvm_lapic_find_highest_irr(vcpu));
6309                         update_cr8_intercept(vcpu);
6310                         kvm_lapic_sync_to_vapic(vcpu);
6311                 }
6312         }
6313
6314         r = kvm_mmu_reload(vcpu);
6315         if (unlikely(r)) {
6316                 goto cancel_injection;
6317         }
6318
6319         preempt_disable();
6320
6321         kvm_x86_ops->prepare_guest_switch(vcpu);
6322         if (vcpu->fpu_active)
6323                 kvm_load_guest_fpu(vcpu);
6324         kvm_load_guest_xcr0(vcpu);
6325
6326         vcpu->mode = IN_GUEST_MODE;
6327
6328         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6329
6330         /* We should set ->mode before check ->requests,
6331          * see the comment in make_all_cpus_request.
6332          */
6333         smp_mb__after_srcu_read_unlock();
6334
6335         local_irq_disable();
6336
6337         if (vcpu->mode == EXITING_GUEST_MODE || vcpu->requests
6338             || need_resched() || signal_pending(current)) {
6339                 vcpu->mode = OUTSIDE_GUEST_MODE;
6340                 smp_wmb();
6341                 local_irq_enable();
6342                 preempt_enable();
6343                 vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6344                 r = 1;
6345                 goto cancel_injection;
6346         }
6347
6348         if (req_immediate_exit)
6349                 smp_send_reschedule(vcpu->cpu);
6350
6351         __kvm_guest_enter();
6352
6353         if (unlikely(vcpu->arch.switch_db_regs)) {
6354                 set_debugreg(0, 7);
6355                 set_debugreg(vcpu->arch.eff_db[0], 0);
6356                 set_debugreg(vcpu->arch.eff_db[1], 1);
6357                 set_debugreg(vcpu->arch.eff_db[2], 2);
6358                 set_debugreg(vcpu->arch.eff_db[3], 3);
6359                 set_debugreg(vcpu->arch.dr6, 6);
6360                 vcpu->arch.switch_db_regs &= ~KVM_DEBUGREG_RELOAD;
6361         }
6362
6363         trace_kvm_entry(vcpu->vcpu_id);
6364         wait_lapic_expire(vcpu);
6365         kvm_x86_ops->run(vcpu);
6366
6367         /*
6368          * Do this here before restoring debug registers on the host.  And
6369          * since we do this before handling the vmexit, a DR access vmexit
6370          * can (a) read the correct value of the debug registers, (b) set
6371          * KVM_DEBUGREG_WONT_EXIT again.
6372          */
6373         if (unlikely(vcpu->arch.switch_db_regs & KVM_DEBUGREG_WONT_EXIT)) {
6374                 int i;
6375
6376                 WARN_ON(vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP);
6377                 kvm_x86_ops->sync_dirty_debug_regs(vcpu);
6378                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6379                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6380         }
6381
6382         /*
6383          * If the guest has used debug registers, at least dr7
6384          * will be disabled while returning to the host.
6385          * If we don't have active breakpoints in the host, we don't
6386          * care about the messed up debug address registers. But if
6387          * we have some of them active, restore the old state.
6388          */
6389         if (hw_breakpoint_active())
6390                 hw_breakpoint_restore();
6391
6392         vcpu->arch.last_guest_tsc = kvm_x86_ops->read_l1_tsc(vcpu,
6393                                                            rdtsc());
6394
6395         vcpu->mode = OUTSIDE_GUEST_MODE;
6396         smp_wmb();
6397
6398         /* Interrupt is enabled by handle_external_intr() */
6399         kvm_x86_ops->handle_external_intr(vcpu);
6400
6401         ++vcpu->stat.exits;
6402
6403         /*
6404          * We must have an instruction between local_irq_enable() and
6405          * kvm_guest_exit(), so the timer interrupt isn't delayed by
6406          * the interrupt shadow.  The stat.exits increment will do nicely.
6407          * But we need to prevent reordering, hence this barrier():
6408          */
6409         barrier();
6410
6411         kvm_guest_exit();
6412
6413         preempt_enable();
6414
6415         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6416
6417         /*
6418          * Profile KVM exit RIPs:
6419          */
6420         if (unlikely(prof_on == KVM_PROFILING)) {
6421                 unsigned long rip = kvm_rip_read(vcpu);
6422                 profile_hit(KVM_PROFILING, (void *)rip);
6423         }
6424
6425         if (unlikely(vcpu->arch.tsc_always_catchup))
6426                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
6427
6428         if (vcpu->arch.apic_attention)
6429                 kvm_lapic_sync_from_vapic(vcpu);
6430
6431         r = kvm_x86_ops->handle_exit(vcpu);
6432         return r;
6433
6434 cancel_injection:
6435         kvm_x86_ops->cancel_injection(vcpu);
6436         if (unlikely(vcpu->arch.apic_attention))
6437                 kvm_lapic_sync_from_vapic(vcpu);
6438 out:
6439         return r;
6440 }
6441
6442 static inline int vcpu_block(struct kvm *kvm, struct kvm_vcpu *vcpu)
6443 {
6444         if (!kvm_arch_vcpu_runnable(vcpu)) {
6445                 srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6446                 kvm_vcpu_block(vcpu);
6447                 vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6448                 if (!kvm_check_request(KVM_REQ_UNHALT, vcpu))
6449                         return 1;
6450         }
6451
6452         kvm_apic_accept_events(vcpu);
6453         switch(vcpu->arch.mp_state) {
6454         case KVM_MP_STATE_HALTED:
6455                 vcpu->arch.pv.pv_unhalted = false;
6456                 vcpu->arch.mp_state =
6457                         KVM_MP_STATE_RUNNABLE;
6458         case KVM_MP_STATE_RUNNABLE:
6459                 vcpu->arch.apf.halted = false;
6460                 break;
6461         case KVM_MP_STATE_INIT_RECEIVED:
6462                 break;
6463         default:
6464                 return -EINTR;
6465                 break;
6466         }
6467         return 1;
6468 }
6469
6470 static int vcpu_run(struct kvm_vcpu *vcpu)
6471 {
6472         int r;
6473         struct kvm *kvm = vcpu->kvm;
6474
6475         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6476
6477         for (;;) {
6478                 if (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
6479                     !vcpu->arch.apf.halted)
6480                         r = vcpu_enter_guest(vcpu);
6481                 else
6482                         r = vcpu_block(kvm, vcpu);
6483                 if (r <= 0)
6484                         break;
6485
6486                 clear_bit(KVM_REQ_PENDING_TIMER, &vcpu->requests);
6487                 if (kvm_cpu_has_pending_timer(vcpu))
6488                         kvm_inject_pending_timer_irqs(vcpu);
6489
6490                 if (dm_request_for_irq_injection(vcpu)) {
6491                         r = 0;
6492                         vcpu->run->exit_reason = KVM_EXIT_IRQ_WINDOW_OPEN;
6493                         ++vcpu->stat.request_irq_exits;
6494                         break;
6495                 }
6496
6497                 kvm_check_async_pf_completion(vcpu);
6498
6499                 if (signal_pending(current)) {
6500                         r = -EINTR;
6501                         vcpu->run->exit_reason = KVM_EXIT_INTR;
6502                         ++vcpu->stat.signal_exits;
6503                         break;
6504                 }
6505                 if (need_resched()) {
6506                         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6507                         cond_resched();
6508                         vcpu->srcu_idx = srcu_read_lock(&kvm->srcu);
6509                 }
6510         }
6511
6512         srcu_read_unlock(&kvm->srcu, vcpu->srcu_idx);
6513
6514         return r;
6515 }
6516
6517 static inline int complete_emulated_io(struct kvm_vcpu *vcpu)
6518 {
6519         int r;
6520         vcpu->srcu_idx = srcu_read_lock(&vcpu->kvm->srcu);
6521         r = emulate_instruction(vcpu, EMULTYPE_NO_DECODE);
6522         srcu_read_unlock(&vcpu->kvm->srcu, vcpu->srcu_idx);
6523         if (r != EMULATE_DONE)
6524                 return 0;
6525         return 1;
6526 }
6527
6528 static int complete_emulated_pio(struct kvm_vcpu *vcpu)
6529 {
6530         BUG_ON(!vcpu->arch.pio.count);
6531
6532         return complete_emulated_io(vcpu);
6533 }
6534
6535 /*
6536  * Implements the following, as a state machine:
6537  *
6538  * read:
6539  *   for each fragment
6540  *     for each mmio piece in the fragment
6541  *       write gpa, len
6542  *       exit
6543  *       copy data
6544  *   execute insn
6545  *
6546  * write:
6547  *   for each fragment
6548  *     for each mmio piece in the fragment
6549  *       write gpa, len
6550  *       copy data
6551  *       exit
6552  */
6553 static int complete_emulated_mmio(struct kvm_vcpu *vcpu)
6554 {
6555         struct kvm_run *run = vcpu->run;
6556         struct kvm_mmio_fragment *frag;
6557         unsigned len;
6558
6559         BUG_ON(!vcpu->mmio_needed);
6560
6561         /* Complete previous fragment */
6562         frag = &vcpu->mmio_fragments[vcpu->mmio_cur_fragment];
6563         len = min(8u, frag->len);
6564         if (!vcpu->mmio_is_write)
6565                 memcpy(frag->data, run->mmio.data, len);
6566
6567         if (frag->len <= 8) {
6568                 /* Switch to the next fragment. */
6569                 frag++;
6570                 vcpu->mmio_cur_fragment++;
6571         } else {
6572                 /* Go forward to the next mmio piece. */
6573                 frag->data += len;
6574                 frag->gpa += len;
6575                 frag->len -= len;
6576         }
6577
6578         if (vcpu->mmio_cur_fragment >= vcpu->mmio_nr_fragments) {
6579                 vcpu->mmio_needed = 0;
6580
6581                 /* FIXME: return into emulator if single-stepping.  */
6582                 if (vcpu->mmio_is_write)
6583                         return 1;
6584                 vcpu->mmio_read_completed = 1;
6585                 return complete_emulated_io(vcpu);
6586         }
6587
6588         run->exit_reason = KVM_EXIT_MMIO;
6589         run->mmio.phys_addr = frag->gpa;
6590         if (vcpu->mmio_is_write)
6591                 memcpy(run->mmio.data, frag->data, min(8u, frag->len));
6592         run->mmio.len = min(8u, frag->len);
6593         run->mmio.is_write = vcpu->mmio_is_write;
6594         vcpu->arch.complete_userspace_io = complete_emulated_mmio;
6595         return 0;
6596 }
6597
6598
6599 int kvm_arch_vcpu_ioctl_run(struct kvm_vcpu *vcpu, struct kvm_run *kvm_run)
6600 {
6601         struct fpu *fpu = &current->thread.fpu;
6602         int r;
6603         sigset_t sigsaved;
6604
6605         fpu__activate_curr(fpu);
6606
6607         if (vcpu->sigset_active)
6608                 sigprocmask(SIG_SETMASK, &vcpu->sigset, &sigsaved);
6609
6610         if (unlikely(vcpu->arch.mp_state == KVM_MP_STATE_UNINITIALIZED)) {
6611                 kvm_vcpu_block(vcpu);
6612                 kvm_apic_accept_events(vcpu);
6613                 clear_bit(KVM_REQ_UNHALT, &vcpu->requests);
6614                 r = -EAGAIN;
6615                 goto out;
6616         }
6617
6618         /* re-sync apic's tpr */
6619         if (!lapic_in_kernel(vcpu)) {
6620                 if (kvm_set_cr8(vcpu, kvm_run->cr8) != 0) {
6621                         r = -EINVAL;
6622                         goto out;
6623                 }
6624         }
6625
6626         if (unlikely(vcpu->arch.complete_userspace_io)) {
6627                 int (*cui)(struct kvm_vcpu *) = vcpu->arch.complete_userspace_io;
6628                 vcpu->arch.complete_userspace_io = NULL;
6629                 r = cui(vcpu);
6630                 if (r <= 0)
6631                         goto out;
6632         } else
6633                 WARN_ON(vcpu->arch.pio.count || vcpu->mmio_needed);
6634
6635         r = vcpu_run(vcpu);
6636
6637 out:
6638         post_kvm_run_save(vcpu);
6639         if (vcpu->sigset_active)
6640                 sigprocmask(SIG_SETMASK, &sigsaved, NULL);
6641
6642         return r;
6643 }
6644
6645 int kvm_arch_vcpu_ioctl_get_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6646 {
6647         if (vcpu->arch.emulate_regs_need_sync_to_vcpu) {
6648                 /*
6649                  * We are here if userspace calls get_regs() in the middle of
6650                  * instruction emulation. Registers state needs to be copied
6651                  * back from emulation context to vcpu. Userspace shouldn't do
6652                  * that usually, but some bad designed PV devices (vmware
6653                  * backdoor interface) need this to work
6654                  */
6655                 emulator_writeback_register_cache(&vcpu->arch.emulate_ctxt);
6656                 vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6657         }
6658         regs->rax = kvm_register_read(vcpu, VCPU_REGS_RAX);
6659         regs->rbx = kvm_register_read(vcpu, VCPU_REGS_RBX);
6660         regs->rcx = kvm_register_read(vcpu, VCPU_REGS_RCX);
6661         regs->rdx = kvm_register_read(vcpu, VCPU_REGS_RDX);
6662         regs->rsi = kvm_register_read(vcpu, VCPU_REGS_RSI);
6663         regs->rdi = kvm_register_read(vcpu, VCPU_REGS_RDI);
6664         regs->rsp = kvm_register_read(vcpu, VCPU_REGS_RSP);
6665         regs->rbp = kvm_register_read(vcpu, VCPU_REGS_RBP);
6666 #ifdef CONFIG_X86_64
6667         regs->r8 = kvm_register_read(vcpu, VCPU_REGS_R8);
6668         regs->r9 = kvm_register_read(vcpu, VCPU_REGS_R9);
6669         regs->r10 = kvm_register_read(vcpu, VCPU_REGS_R10);
6670         regs->r11 = kvm_register_read(vcpu, VCPU_REGS_R11);
6671         regs->r12 = kvm_register_read(vcpu, VCPU_REGS_R12);
6672         regs->r13 = kvm_register_read(vcpu, VCPU_REGS_R13);
6673         regs->r14 = kvm_register_read(vcpu, VCPU_REGS_R14);
6674         regs->r15 = kvm_register_read(vcpu, VCPU_REGS_R15);
6675 #endif
6676
6677         regs->rip = kvm_rip_read(vcpu);
6678         regs->rflags = kvm_get_rflags(vcpu);
6679
6680         return 0;
6681 }
6682
6683 int kvm_arch_vcpu_ioctl_set_regs(struct kvm_vcpu *vcpu, struct kvm_regs *regs)
6684 {
6685         vcpu->arch.emulate_regs_need_sync_from_vcpu = true;
6686         vcpu->arch.emulate_regs_need_sync_to_vcpu = false;
6687
6688         kvm_register_write(vcpu, VCPU_REGS_RAX, regs->rax);
6689         kvm_register_write(vcpu, VCPU_REGS_RBX, regs->rbx);
6690         kvm_register_write(vcpu, VCPU_REGS_RCX, regs->rcx);
6691         kvm_register_write(vcpu, VCPU_REGS_RDX, regs->rdx);
6692         kvm_register_write(vcpu, VCPU_REGS_RSI, regs->rsi);
6693         kvm_register_write(vcpu, VCPU_REGS_RDI, regs->rdi);
6694         kvm_register_write(vcpu, VCPU_REGS_RSP, regs->rsp);
6695         kvm_register_write(vcpu, VCPU_REGS_RBP, regs->rbp);
6696 #ifdef CONFIG_X86_64
6697         kvm_register_write(vcpu, VCPU_REGS_R8, regs->r8);
6698         kvm_register_write(vcpu, VCPU_REGS_R9, regs->r9);
6699         kvm_register_write(vcpu, VCPU_REGS_R10, regs->r10);
6700         kvm_register_write(vcpu, VCPU_REGS_R11, regs->r11);
6701         kvm_register_write(vcpu, VCPU_REGS_R12, regs->r12);
6702         kvm_register_write(vcpu, VCPU_REGS_R13, regs->r13);
6703         kvm_register_write(vcpu, VCPU_REGS_R14, regs->r14);
6704         kvm_register_write(vcpu, VCPU_REGS_R15, regs->r15);
6705 #endif
6706
6707         kvm_rip_write(vcpu, regs->rip);
6708         kvm_set_rflags(vcpu, regs->rflags);
6709
6710         vcpu->arch.exception.pending = false;
6711
6712         kvm_make_request(KVM_REQ_EVENT, vcpu);
6713
6714         return 0;
6715 }
6716
6717 void kvm_get_cs_db_l_bits(struct kvm_vcpu *vcpu, int *db, int *l)
6718 {
6719         struct kvm_segment cs;
6720
6721         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
6722         *db = cs.db;
6723         *l = cs.l;
6724 }
6725 EXPORT_SYMBOL_GPL(kvm_get_cs_db_l_bits);
6726
6727 int kvm_arch_vcpu_ioctl_get_sregs(struct kvm_vcpu *vcpu,
6728                                   struct kvm_sregs *sregs)
6729 {
6730         struct desc_ptr dt;
6731
6732         kvm_get_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6733         kvm_get_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6734         kvm_get_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6735         kvm_get_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6736         kvm_get_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6737         kvm_get_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6738
6739         kvm_get_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6740         kvm_get_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6741
6742         kvm_x86_ops->get_idt(vcpu, &dt);
6743         sregs->idt.limit = dt.size;
6744         sregs->idt.base = dt.address;
6745         kvm_x86_ops->get_gdt(vcpu, &dt);
6746         sregs->gdt.limit = dt.size;
6747         sregs->gdt.base = dt.address;
6748
6749         sregs->cr0 = kvm_read_cr0(vcpu);
6750         sregs->cr2 = vcpu->arch.cr2;
6751         sregs->cr3 = kvm_read_cr3(vcpu);
6752         sregs->cr4 = kvm_read_cr4(vcpu);
6753         sregs->cr8 = kvm_get_cr8(vcpu);
6754         sregs->efer = vcpu->arch.efer;
6755         sregs->apic_base = kvm_get_apic_base(vcpu);
6756
6757         memset(sregs->interrupt_bitmap, 0, sizeof sregs->interrupt_bitmap);
6758
6759         if (vcpu->arch.interrupt.pending && !vcpu->arch.interrupt.soft)
6760                 set_bit(vcpu->arch.interrupt.nr,
6761                         (unsigned long *)sregs->interrupt_bitmap);
6762
6763         return 0;
6764 }
6765
6766 int kvm_arch_vcpu_ioctl_get_mpstate(struct kvm_vcpu *vcpu,
6767                                     struct kvm_mp_state *mp_state)
6768 {
6769         kvm_apic_accept_events(vcpu);
6770         if (vcpu->arch.mp_state == KVM_MP_STATE_HALTED &&
6771                                         vcpu->arch.pv.pv_unhalted)
6772                 mp_state->mp_state = KVM_MP_STATE_RUNNABLE;
6773         else
6774                 mp_state->mp_state = vcpu->arch.mp_state;
6775
6776         return 0;
6777 }
6778
6779 int kvm_arch_vcpu_ioctl_set_mpstate(struct kvm_vcpu *vcpu,
6780                                     struct kvm_mp_state *mp_state)
6781 {
6782         if (!kvm_vcpu_has_lapic(vcpu) &&
6783             mp_state->mp_state != KVM_MP_STATE_RUNNABLE)
6784                 return -EINVAL;
6785
6786         if (mp_state->mp_state == KVM_MP_STATE_SIPI_RECEIVED) {
6787                 vcpu->arch.mp_state = KVM_MP_STATE_INIT_RECEIVED;
6788                 set_bit(KVM_APIC_SIPI, &vcpu->arch.apic->pending_events);
6789         } else
6790                 vcpu->arch.mp_state = mp_state->mp_state;
6791         kvm_make_request(KVM_REQ_EVENT, vcpu);
6792         return 0;
6793 }
6794
6795 int kvm_task_switch(struct kvm_vcpu *vcpu, u16 tss_selector, int idt_index,
6796                     int reason, bool has_error_code, u32 error_code)
6797 {
6798         struct x86_emulate_ctxt *ctxt = &vcpu->arch.emulate_ctxt;
6799         int ret;
6800
6801         init_emulate_ctxt(vcpu);
6802
6803         ret = emulator_task_switch(ctxt, tss_selector, idt_index, reason,
6804                                    has_error_code, error_code);
6805
6806         if (ret)
6807                 return EMULATE_FAIL;
6808
6809         kvm_rip_write(vcpu, ctxt->eip);
6810         kvm_set_rflags(vcpu, ctxt->eflags);
6811         kvm_make_request(KVM_REQ_EVENT, vcpu);
6812         return EMULATE_DONE;
6813 }
6814 EXPORT_SYMBOL_GPL(kvm_task_switch);
6815
6816 int kvm_arch_vcpu_ioctl_set_sregs(struct kvm_vcpu *vcpu,
6817                                   struct kvm_sregs *sregs)
6818 {
6819         struct msr_data apic_base_msr;
6820         int mmu_reset_needed = 0;
6821         int pending_vec, max_bits, idx;
6822         struct desc_ptr dt;
6823
6824         if (!guest_cpuid_has_xsave(vcpu) && (sregs->cr4 & X86_CR4_OSXSAVE))
6825                 return -EINVAL;
6826
6827         dt.size = sregs->idt.limit;
6828         dt.address = sregs->idt.base;
6829         kvm_x86_ops->set_idt(vcpu, &dt);
6830         dt.size = sregs->gdt.limit;
6831         dt.address = sregs->gdt.base;
6832         kvm_x86_ops->set_gdt(vcpu, &dt);
6833
6834         vcpu->arch.cr2 = sregs->cr2;
6835         mmu_reset_needed |= kvm_read_cr3(vcpu) != sregs->cr3;
6836         vcpu->arch.cr3 = sregs->cr3;
6837         __set_bit(VCPU_EXREG_CR3, (ulong *)&vcpu->arch.regs_avail);
6838
6839         kvm_set_cr8(vcpu, sregs->cr8);
6840
6841         mmu_reset_needed |= vcpu->arch.efer != sregs->efer;
6842         kvm_x86_ops->set_efer(vcpu, sregs->efer);
6843         apic_base_msr.data = sregs->apic_base;
6844         apic_base_msr.host_initiated = true;
6845         kvm_set_apic_base(vcpu, &apic_base_msr);
6846
6847         mmu_reset_needed |= kvm_read_cr0(vcpu) != sregs->cr0;
6848         kvm_x86_ops->set_cr0(vcpu, sregs->cr0);
6849         vcpu->arch.cr0 = sregs->cr0;
6850
6851         mmu_reset_needed |= kvm_read_cr4(vcpu) != sregs->cr4;
6852         kvm_x86_ops->set_cr4(vcpu, sregs->cr4);
6853         if (sregs->cr4 & X86_CR4_OSXSAVE)
6854                 kvm_update_cpuid(vcpu);
6855
6856         idx = srcu_read_lock(&vcpu->kvm->srcu);
6857         if (!is_long_mode(vcpu) && is_pae(vcpu)) {
6858                 load_pdptrs(vcpu, vcpu->arch.walk_mmu, kvm_read_cr3(vcpu));
6859                 mmu_reset_needed = 1;
6860         }
6861         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6862
6863         if (mmu_reset_needed)
6864                 kvm_mmu_reset_context(vcpu);
6865
6866         max_bits = KVM_NR_INTERRUPTS;
6867         pending_vec = find_first_bit(
6868                 (const unsigned long *)sregs->interrupt_bitmap, max_bits);
6869         if (pending_vec < max_bits) {
6870                 kvm_queue_interrupt(vcpu, pending_vec, false);
6871                 pr_debug("Set back pending irq %d\n", pending_vec);
6872         }
6873
6874         kvm_set_segment(vcpu, &sregs->cs, VCPU_SREG_CS);
6875         kvm_set_segment(vcpu, &sregs->ds, VCPU_SREG_DS);
6876         kvm_set_segment(vcpu, &sregs->es, VCPU_SREG_ES);
6877         kvm_set_segment(vcpu, &sregs->fs, VCPU_SREG_FS);
6878         kvm_set_segment(vcpu, &sregs->gs, VCPU_SREG_GS);
6879         kvm_set_segment(vcpu, &sregs->ss, VCPU_SREG_SS);
6880
6881         kvm_set_segment(vcpu, &sregs->tr, VCPU_SREG_TR);
6882         kvm_set_segment(vcpu, &sregs->ldt, VCPU_SREG_LDTR);
6883
6884         update_cr8_intercept(vcpu);
6885
6886         /* Older userspace won't unhalt the vcpu on reset. */
6887         if (kvm_vcpu_is_bsp(vcpu) && kvm_rip_read(vcpu) == 0xfff0 &&
6888             sregs->cs.selector == 0xf000 && sregs->cs.base == 0xffff0000 &&
6889             !is_protmode(vcpu))
6890                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
6891
6892         kvm_make_request(KVM_REQ_EVENT, vcpu);
6893
6894         return 0;
6895 }
6896
6897 int kvm_arch_vcpu_ioctl_set_guest_debug(struct kvm_vcpu *vcpu,
6898                                         struct kvm_guest_debug *dbg)
6899 {
6900         unsigned long rflags;
6901         int i, r;
6902
6903         if (dbg->control & (KVM_GUESTDBG_INJECT_DB | KVM_GUESTDBG_INJECT_BP)) {
6904                 r = -EBUSY;
6905                 if (vcpu->arch.exception.pending)
6906                         goto out;
6907                 if (dbg->control & KVM_GUESTDBG_INJECT_DB)
6908                         kvm_queue_exception(vcpu, DB_VECTOR);
6909                 else
6910                         kvm_queue_exception(vcpu, BP_VECTOR);
6911         }
6912
6913         /*
6914          * Read rflags as long as potentially injected trace flags are still
6915          * filtered out.
6916          */
6917         rflags = kvm_get_rflags(vcpu);
6918
6919         vcpu->guest_debug = dbg->control;
6920         if (!(vcpu->guest_debug & KVM_GUESTDBG_ENABLE))
6921                 vcpu->guest_debug = 0;
6922
6923         if (vcpu->guest_debug & KVM_GUESTDBG_USE_HW_BP) {
6924                 for (i = 0; i < KVM_NR_DB_REGS; ++i)
6925                         vcpu->arch.eff_db[i] = dbg->arch.debugreg[i];
6926                 vcpu->arch.guest_debug_dr7 = dbg->arch.debugreg[7];
6927         } else {
6928                 for (i = 0; i < KVM_NR_DB_REGS; i++)
6929                         vcpu->arch.eff_db[i] = vcpu->arch.db[i];
6930         }
6931         kvm_update_dr7(vcpu);
6932
6933         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
6934                 vcpu->arch.singlestep_rip = kvm_rip_read(vcpu) +
6935                         get_segment_base(vcpu, VCPU_SREG_CS);
6936
6937         /*
6938          * Trigger an rflags update that will inject or remove the trace
6939          * flags.
6940          */
6941         kvm_set_rflags(vcpu, rflags);
6942
6943         kvm_x86_ops->update_db_bp_intercept(vcpu);
6944
6945         r = 0;
6946
6947 out:
6948
6949         return r;
6950 }
6951
6952 /*
6953  * Translate a guest virtual address to a guest physical address.
6954  */
6955 int kvm_arch_vcpu_ioctl_translate(struct kvm_vcpu *vcpu,
6956                                     struct kvm_translation *tr)
6957 {
6958         unsigned long vaddr = tr->linear_address;
6959         gpa_t gpa;
6960         int idx;
6961
6962         idx = srcu_read_lock(&vcpu->kvm->srcu);
6963         gpa = kvm_mmu_gva_to_gpa_system(vcpu, vaddr, NULL);
6964         srcu_read_unlock(&vcpu->kvm->srcu, idx);
6965         tr->physical_address = gpa;
6966         tr->valid = gpa != UNMAPPED_GVA;
6967         tr->writeable = 1;
6968         tr->usermode = 0;
6969
6970         return 0;
6971 }
6972
6973 int kvm_arch_vcpu_ioctl_get_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6974 {
6975         struct fxregs_state *fxsave =
6976                         &vcpu->arch.guest_fpu.state.fxsave;
6977
6978         memcpy(fpu->fpr, fxsave->st_space, 128);
6979         fpu->fcw = fxsave->cwd;
6980         fpu->fsw = fxsave->swd;
6981         fpu->ftwx = fxsave->twd;
6982         fpu->last_opcode = fxsave->fop;
6983         fpu->last_ip = fxsave->rip;
6984         fpu->last_dp = fxsave->rdp;
6985         memcpy(fpu->xmm, fxsave->xmm_space, sizeof fxsave->xmm_space);
6986
6987         return 0;
6988 }
6989
6990 int kvm_arch_vcpu_ioctl_set_fpu(struct kvm_vcpu *vcpu, struct kvm_fpu *fpu)
6991 {
6992         struct fxregs_state *fxsave =
6993                         &vcpu->arch.guest_fpu.state.fxsave;
6994
6995         memcpy(fxsave->st_space, fpu->fpr, 128);
6996         fxsave->cwd = fpu->fcw;
6997         fxsave->swd = fpu->fsw;
6998         fxsave->twd = fpu->ftwx;
6999         fxsave->fop = fpu->last_opcode;
7000         fxsave->rip = fpu->last_ip;
7001         fxsave->rdp = fpu->last_dp;
7002         memcpy(fxsave->xmm_space, fpu->xmm, sizeof fxsave->xmm_space);
7003
7004         return 0;
7005 }
7006
7007 static void fx_init(struct kvm_vcpu *vcpu)
7008 {
7009         fpstate_init(&vcpu->arch.guest_fpu.state);
7010         if (cpu_has_xsaves)
7011                 vcpu->arch.guest_fpu.state.xsave.header.xcomp_bv =
7012                         host_xcr0 | XSTATE_COMPACTION_ENABLED;
7013
7014         /*
7015          * Ensure guest xcr0 is valid for loading
7016          */
7017         vcpu->arch.xcr0 = XSTATE_FP;
7018
7019         vcpu->arch.cr0 |= X86_CR0_ET;
7020 }
7021
7022 void kvm_load_guest_fpu(struct kvm_vcpu *vcpu)
7023 {
7024         if (vcpu->guest_fpu_loaded)
7025                 return;
7026
7027         /*
7028          * Restore all possible states in the guest,
7029          * and assume host would use all available bits.
7030          * Guest xcr0 would be loaded later.
7031          */
7032         kvm_put_guest_xcr0(vcpu);
7033         vcpu->guest_fpu_loaded = 1;
7034         __kernel_fpu_begin();
7035         __copy_kernel_to_fpregs(&vcpu->arch.guest_fpu.state);
7036         trace_kvm_fpu(1);
7037 }
7038
7039 void kvm_put_guest_fpu(struct kvm_vcpu *vcpu)
7040 {
7041         kvm_put_guest_xcr0(vcpu);
7042
7043         if (!vcpu->guest_fpu_loaded) {
7044                 vcpu->fpu_counter = 0;
7045                 return;
7046         }
7047
7048         vcpu->guest_fpu_loaded = 0;
7049         copy_fpregs_to_fpstate(&vcpu->arch.guest_fpu);
7050         __kernel_fpu_end();
7051         ++vcpu->stat.fpu_reload;
7052         /*
7053          * If using eager FPU mode, or if the guest is a frequent user
7054          * of the FPU, just leave the FPU active for next time.
7055          * Every 255 times fpu_counter rolls over to 0; a guest that uses
7056          * the FPU in bursts will revert to loading it on demand.
7057          */
7058         if (!vcpu->arch.eager_fpu) {
7059                 if (++vcpu->fpu_counter < 5)
7060                         kvm_make_request(KVM_REQ_DEACTIVATE_FPU, vcpu);
7061         }
7062         trace_kvm_fpu(0);
7063 }
7064
7065 void kvm_arch_vcpu_free(struct kvm_vcpu *vcpu)
7066 {
7067         kvmclock_reset(vcpu);
7068
7069         free_cpumask_var(vcpu->arch.wbinvd_dirty_mask);
7070         kvm_x86_ops->vcpu_free(vcpu);
7071 }
7072
7073 struct kvm_vcpu *kvm_arch_vcpu_create(struct kvm *kvm,
7074                                                 unsigned int id)
7075 {
7076         struct kvm_vcpu *vcpu;
7077
7078         if (check_tsc_unstable() && atomic_read(&kvm->online_vcpus) != 0)
7079                 printk_once(KERN_WARNING
7080                 "kvm: SMP vm created on host with unstable TSC; "
7081                 "guest TSC will not be reliable\n");
7082
7083         vcpu = kvm_x86_ops->vcpu_create(kvm, id);
7084
7085         return vcpu;
7086 }
7087
7088 int kvm_arch_vcpu_setup(struct kvm_vcpu *vcpu)
7089 {
7090         int r;
7091
7092         kvm_vcpu_mtrr_init(vcpu);
7093         r = vcpu_load(vcpu);
7094         if (r)
7095                 return r;
7096         kvm_vcpu_reset(vcpu, false);
7097         kvm_mmu_setup(vcpu);
7098         vcpu_put(vcpu);
7099         return r;
7100 }
7101
7102 void kvm_arch_vcpu_postcreate(struct kvm_vcpu *vcpu)
7103 {
7104         struct msr_data msr;
7105         struct kvm *kvm = vcpu->kvm;
7106
7107         if (vcpu_load(vcpu))
7108                 return;
7109         msr.data = 0x0;
7110         msr.index = MSR_IA32_TSC;
7111         msr.host_initiated = true;
7112         kvm_write_tsc(vcpu, &msr);
7113         vcpu_put(vcpu);
7114
7115         if (!kvmclock_periodic_sync)
7116                 return;
7117
7118         schedule_delayed_work(&kvm->arch.kvmclock_sync_work,
7119                                         KVMCLOCK_SYNC_PERIOD);
7120 }
7121
7122 void kvm_arch_vcpu_destroy(struct kvm_vcpu *vcpu)
7123 {
7124         int r;
7125         vcpu->arch.apf.msr_val = 0;
7126
7127         r = vcpu_load(vcpu);
7128         BUG_ON(r);
7129         kvm_mmu_unload(vcpu);
7130         vcpu_put(vcpu);
7131
7132         kvm_x86_ops->vcpu_free(vcpu);
7133 }
7134
7135 void kvm_vcpu_reset(struct kvm_vcpu *vcpu, bool init_event)
7136 {
7137         vcpu->arch.hflags = 0;
7138
7139         atomic_set(&vcpu->arch.nmi_queued, 0);
7140         vcpu->arch.nmi_pending = 0;
7141         vcpu->arch.nmi_injected = false;
7142         kvm_clear_interrupt_queue(vcpu);
7143         kvm_clear_exception_queue(vcpu);
7144
7145         memset(vcpu->arch.db, 0, sizeof(vcpu->arch.db));
7146         kvm_update_dr0123(vcpu);
7147         vcpu->arch.dr6 = DR6_INIT;
7148         kvm_update_dr6(vcpu);
7149         vcpu->arch.dr7 = DR7_FIXED_1;
7150         kvm_update_dr7(vcpu);
7151
7152         vcpu->arch.cr2 = 0;
7153
7154         kvm_make_request(KVM_REQ_EVENT, vcpu);
7155         vcpu->arch.apf.msr_val = 0;
7156         vcpu->arch.st.msr_val = 0;
7157
7158         kvmclock_reset(vcpu);
7159
7160         kvm_clear_async_pf_completion_queue(vcpu);
7161         kvm_async_pf_hash_reset(vcpu);
7162         vcpu->arch.apf.halted = false;
7163
7164         if (!init_event) {
7165                 kvm_pmu_reset(vcpu);
7166                 vcpu->arch.smbase = 0x30000;
7167         }
7168
7169         memset(vcpu->arch.regs, 0, sizeof(vcpu->arch.regs));
7170         vcpu->arch.regs_avail = ~0;
7171         vcpu->arch.regs_dirty = ~0;
7172
7173         kvm_x86_ops->vcpu_reset(vcpu, init_event);
7174 }
7175
7176 void kvm_vcpu_deliver_sipi_vector(struct kvm_vcpu *vcpu, u8 vector)
7177 {
7178         struct kvm_segment cs;
7179
7180         kvm_get_segment(vcpu, &cs, VCPU_SREG_CS);
7181         cs.selector = vector << 8;
7182         cs.base = vector << 12;
7183         kvm_set_segment(vcpu, &cs, VCPU_SREG_CS);
7184         kvm_rip_write(vcpu, 0);
7185 }
7186
7187 int kvm_arch_hardware_enable(void)
7188 {
7189         struct kvm *kvm;
7190         struct kvm_vcpu *vcpu;
7191         int i;
7192         int ret;
7193         u64 local_tsc;
7194         u64 max_tsc = 0;
7195         bool stable, backwards_tsc = false;
7196
7197         kvm_shared_msr_cpu_online();
7198         ret = kvm_x86_ops->hardware_enable();
7199         if (ret != 0)
7200                 return ret;
7201
7202         local_tsc = rdtsc();
7203         stable = !check_tsc_unstable();
7204         list_for_each_entry(kvm, &vm_list, vm_list) {
7205                 kvm_for_each_vcpu(i, vcpu, kvm) {
7206                         if (!stable && vcpu->cpu == smp_processor_id())
7207                                 kvm_make_request(KVM_REQ_CLOCK_UPDATE, vcpu);
7208                         if (stable && vcpu->arch.last_host_tsc > local_tsc) {
7209                                 backwards_tsc = true;
7210                                 if (vcpu->arch.last_host_tsc > max_tsc)
7211                                         max_tsc = vcpu->arch.last_host_tsc;
7212                         }
7213                 }
7214         }
7215
7216         /*
7217          * Sometimes, even reliable TSCs go backwards.  This happens on
7218          * platforms that reset TSC during suspend or hibernate actions, but
7219          * maintain synchronization.  We must compensate.  Fortunately, we can
7220          * detect that condition here, which happens early in CPU bringup,
7221          * before any KVM threads can be running.  Unfortunately, we can't
7222          * bring the TSCs fully up to date with real time, as we aren't yet far
7223          * enough into CPU bringup that we know how much real time has actually
7224          * elapsed; our helper function, get_kernel_ns() will be using boot
7225          * variables that haven't been updated yet.
7226          *
7227          * So we simply find the maximum observed TSC above, then record the
7228          * adjustment to TSC in each VCPU.  When the VCPU later gets loaded,
7229          * the adjustment will be applied.  Note that we accumulate
7230          * adjustments, in case multiple suspend cycles happen before some VCPU
7231          * gets a chance to run again.  In the event that no KVM threads get a
7232          * chance to run, we will miss the entire elapsed period, as we'll have
7233          * reset last_host_tsc, so VCPUs will not have the TSC adjusted and may
7234          * loose cycle time.  This isn't too big a deal, since the loss will be
7235          * uniform across all VCPUs (not to mention the scenario is extremely
7236          * unlikely). It is possible that a second hibernate recovery happens
7237          * much faster than a first, causing the observed TSC here to be
7238          * smaller; this would require additional padding adjustment, which is
7239          * why we set last_host_tsc to the local tsc observed here.
7240          *
7241          * N.B. - this code below runs only on platforms with reliable TSC,
7242          * as that is the only way backwards_tsc is set above.  Also note
7243          * that this runs for ALL vcpus, which is not a bug; all VCPUs should
7244          * have the same delta_cyc adjustment applied if backwards_tsc
7245          * is detected.  Note further, this adjustment is only done once,
7246          * as we reset last_host_tsc on all VCPUs to stop this from being
7247          * called multiple times (one for each physical CPU bringup).
7248          *
7249          * Platforms with unreliable TSCs don't have to deal with this, they
7250          * will be compensated by the logic in vcpu_load, which sets the TSC to
7251          * catchup mode.  This will catchup all VCPUs to real time, but cannot
7252          * guarantee that they stay in perfect synchronization.
7253          */
7254         if (backwards_tsc) {
7255                 u64 delta_cyc = max_tsc - local_tsc;
7256                 backwards_tsc_observed = true;
7257                 list_for_each_entry(kvm, &vm_list, vm_list) {
7258                         kvm_for_each_vcpu(i, vcpu, kvm) {
7259                                 vcpu->arch.tsc_offset_adjustment += delta_cyc;
7260                                 vcpu->arch.last_host_tsc = local_tsc;
7261                                 kvm_make_request(KVM_REQ_MASTERCLOCK_UPDATE, vcpu);
7262                         }
7263
7264                         /*
7265                          * We have to disable TSC offset matching.. if you were
7266                          * booting a VM while issuing an S4 host suspend....
7267                          * you may have some problem.  Solving this issue is
7268                          * left as an exercise to the reader.
7269                          */
7270                         kvm->arch.last_tsc_nsec = 0;
7271                         kvm->arch.last_tsc_write = 0;
7272                 }
7273
7274         }
7275         return 0;
7276 }
7277
7278 void kvm_arch_hardware_disable(void)
7279 {
7280         kvm_x86_ops->hardware_disable();
7281         drop_user_return_notifiers();
7282 }
7283
7284 int kvm_arch_hardware_setup(void)
7285 {
7286         int r;
7287
7288         r = kvm_x86_ops->hardware_setup();
7289         if (r != 0)
7290                 return r;
7291
7292         kvm_init_msr_list();
7293         return 0;
7294 }
7295
7296 void kvm_arch_hardware_unsetup(void)
7297 {
7298         kvm_x86_ops->hardware_unsetup();
7299 }
7300
7301 void kvm_arch_check_processor_compat(void *rtn)
7302 {
7303         kvm_x86_ops->check_processor_compatibility(rtn);
7304 }
7305
7306 bool kvm_vcpu_is_reset_bsp(struct kvm_vcpu *vcpu)
7307 {
7308         return vcpu->kvm->arch.bsp_vcpu_id == vcpu->vcpu_id;
7309 }
7310 EXPORT_SYMBOL_GPL(kvm_vcpu_is_reset_bsp);
7311
7312 bool kvm_vcpu_is_bsp(struct kvm_vcpu *vcpu)
7313 {
7314         return (vcpu->arch.apic_base & MSR_IA32_APICBASE_BSP) != 0;
7315 }
7316
7317 bool kvm_vcpu_compatible(struct kvm_vcpu *vcpu)
7318 {
7319         return irqchip_in_kernel(vcpu->kvm) == lapic_in_kernel(vcpu);
7320 }
7321
7322 struct static_key kvm_no_apic_vcpu __read_mostly;
7323
7324 int kvm_arch_vcpu_init(struct kvm_vcpu *vcpu)
7325 {
7326         struct page *page;
7327         struct kvm *kvm;
7328         int r;
7329
7330         BUG_ON(vcpu->kvm == NULL);
7331         kvm = vcpu->kvm;
7332
7333         vcpu->arch.pv.pv_unhalted = false;
7334         vcpu->arch.emulate_ctxt.ops = &emulate_ops;
7335         if (!irqchip_in_kernel(kvm) || kvm_vcpu_is_reset_bsp(vcpu))
7336                 vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7337         else
7338                 vcpu->arch.mp_state = KVM_MP_STATE_UNINITIALIZED;
7339
7340         page = alloc_page(GFP_KERNEL | __GFP_ZERO);
7341         if (!page) {
7342                 r = -ENOMEM;
7343                 goto fail;
7344         }
7345         vcpu->arch.pio_data = page_address(page);
7346
7347         kvm_set_tsc_khz(vcpu, max_tsc_khz);
7348
7349         r = kvm_mmu_create(vcpu);
7350         if (r < 0)
7351                 goto fail_free_pio_data;
7352
7353         if (irqchip_in_kernel(kvm)) {
7354                 r = kvm_create_lapic(vcpu);
7355                 if (r < 0)
7356                         goto fail_mmu_destroy;
7357         } else
7358                 static_key_slow_inc(&kvm_no_apic_vcpu);
7359
7360         vcpu->arch.mce_banks = kzalloc(KVM_MAX_MCE_BANKS * sizeof(u64) * 4,
7361                                        GFP_KERNEL);
7362         if (!vcpu->arch.mce_banks) {
7363                 r = -ENOMEM;
7364                 goto fail_free_lapic;
7365         }
7366         vcpu->arch.mcg_cap = KVM_MAX_MCE_BANKS;
7367
7368         if (!zalloc_cpumask_var(&vcpu->arch.wbinvd_dirty_mask, GFP_KERNEL)) {
7369                 r = -ENOMEM;
7370                 goto fail_free_mce_banks;
7371         }
7372
7373         fx_init(vcpu);
7374
7375         vcpu->arch.ia32_tsc_adjust_msr = 0x0;
7376         vcpu->arch.pv_time_enabled = false;
7377
7378         vcpu->arch.guest_supported_xcr0 = 0;
7379         vcpu->arch.guest_xstate_size = XSAVE_HDR_SIZE + XSAVE_HDR_OFFSET;
7380
7381         vcpu->arch.maxphyaddr = cpuid_query_maxphyaddr(vcpu);
7382
7383         vcpu->arch.pat = MSR_IA32_CR_PAT_DEFAULT;
7384
7385         kvm_async_pf_hash_reset(vcpu);
7386         kvm_pmu_init(vcpu);
7387
7388         return 0;
7389
7390 fail_free_mce_banks:
7391         kfree(vcpu->arch.mce_banks);
7392 fail_free_lapic:
7393         kvm_free_lapic(vcpu);
7394 fail_mmu_destroy:
7395         kvm_mmu_destroy(vcpu);
7396 fail_free_pio_data:
7397         free_page((unsigned long)vcpu->arch.pio_data);
7398 fail:
7399         return r;
7400 }
7401
7402 void kvm_arch_vcpu_uninit(struct kvm_vcpu *vcpu)
7403 {
7404         int idx;
7405
7406         kvm_pmu_destroy(vcpu);
7407         kfree(vcpu->arch.mce_banks);
7408         kvm_free_lapic(vcpu);
7409         idx = srcu_read_lock(&vcpu->kvm->srcu);
7410         kvm_mmu_destroy(vcpu);
7411         srcu_read_unlock(&vcpu->kvm->srcu, idx);
7412         free_page((unsigned long)vcpu->arch.pio_data);
7413         if (!lapic_in_kernel(vcpu))
7414                 static_key_slow_dec(&kvm_no_apic_vcpu);
7415 }
7416
7417 void kvm_arch_sched_in(struct kvm_vcpu *vcpu, int cpu)
7418 {
7419         kvm_x86_ops->sched_in(vcpu, cpu);
7420 }
7421
7422 int kvm_arch_init_vm(struct kvm *kvm, unsigned long type)
7423 {
7424         if (type)
7425                 return -EINVAL;
7426
7427         INIT_HLIST_HEAD(&kvm->arch.mask_notifier_list);
7428         INIT_LIST_HEAD(&kvm->arch.active_mmu_pages);
7429         INIT_LIST_HEAD(&kvm->arch.zapped_obsolete_pages);
7430         INIT_LIST_HEAD(&kvm->arch.assigned_dev_head);
7431         atomic_set(&kvm->arch.noncoherent_dma_count, 0);
7432
7433         /* Reserve bit 0 of irq_sources_bitmap for userspace irq source */
7434         set_bit(KVM_USERSPACE_IRQ_SOURCE_ID, &kvm->arch.irq_sources_bitmap);
7435         /* Reserve bit 1 of irq_sources_bitmap for irqfd-resampler */
7436         set_bit(KVM_IRQFD_RESAMPLE_IRQ_SOURCE_ID,
7437                 &kvm->arch.irq_sources_bitmap);
7438
7439         raw_spin_lock_init(&kvm->arch.tsc_write_lock);
7440         mutex_init(&kvm->arch.apic_map_lock);
7441         spin_lock_init(&kvm->arch.pvclock_gtod_sync_lock);
7442
7443         pvclock_update_vm_gtod_copy(kvm);
7444
7445         INIT_DELAYED_WORK(&kvm->arch.kvmclock_update_work, kvmclock_update_fn);
7446         INIT_DELAYED_WORK(&kvm->arch.kvmclock_sync_work, kvmclock_sync_fn);
7447
7448         return 0;
7449 }
7450
7451 static void kvm_unload_vcpu_mmu(struct kvm_vcpu *vcpu)
7452 {
7453         int r;
7454         r = vcpu_load(vcpu);
7455         BUG_ON(r);
7456         kvm_mmu_unload(vcpu);
7457         vcpu_put(vcpu);
7458 }
7459
7460 static void kvm_free_vcpus(struct kvm *kvm)
7461 {
7462         unsigned int i;
7463         struct kvm_vcpu *vcpu;
7464
7465         /*
7466          * Unpin any mmu pages first.
7467          */
7468         kvm_for_each_vcpu(i, vcpu, kvm) {
7469                 kvm_clear_async_pf_completion_queue(vcpu);
7470                 kvm_unload_vcpu_mmu(vcpu);
7471         }
7472         kvm_for_each_vcpu(i, vcpu, kvm)
7473                 kvm_arch_vcpu_free(vcpu);
7474
7475         mutex_lock(&kvm->lock);
7476         for (i = 0; i < atomic_read(&kvm->online_vcpus); i++)
7477                 kvm->vcpus[i] = NULL;
7478
7479         atomic_set(&kvm->online_vcpus, 0);
7480         mutex_unlock(&kvm->lock);
7481 }
7482
7483 void kvm_arch_sync_events(struct kvm *kvm)
7484 {
7485         cancel_delayed_work_sync(&kvm->arch.kvmclock_sync_work);
7486         cancel_delayed_work_sync(&kvm->arch.kvmclock_update_work);
7487         kvm_free_all_assigned_devices(kvm);
7488         kvm_free_pit(kvm);
7489 }
7490
7491 int __x86_set_memory_region(struct kvm *kvm,
7492                             const struct kvm_userspace_memory_region *mem)
7493 {
7494         int i, r;
7495
7496         /* Called with kvm->slots_lock held.  */
7497         BUG_ON(mem->slot >= KVM_MEM_SLOTS_NUM);
7498
7499         for (i = 0; i < KVM_ADDRESS_SPACE_NUM; i++) {
7500                 struct kvm_userspace_memory_region m = *mem;
7501
7502                 m.slot |= i << 16;
7503                 r = __kvm_set_memory_region(kvm, &m);
7504                 if (r < 0)
7505                         return r;
7506         }
7507
7508         return 0;
7509 }
7510 EXPORT_SYMBOL_GPL(__x86_set_memory_region);
7511
7512 int x86_set_memory_region(struct kvm *kvm,
7513                           const struct kvm_userspace_memory_region *mem)
7514 {
7515         int r;
7516
7517         mutex_lock(&kvm->slots_lock);
7518         r = __x86_set_memory_region(kvm, mem);
7519         mutex_unlock(&kvm->slots_lock);
7520
7521         return r;
7522 }
7523 EXPORT_SYMBOL_GPL(x86_set_memory_region);
7524
7525 void kvm_arch_destroy_vm(struct kvm *kvm)
7526 {
7527         if (current->mm == kvm->mm) {
7528                 /*
7529                  * Free memory regions allocated on behalf of userspace,
7530                  * unless the the memory map has changed due to process exit
7531                  * or fd copying.
7532                  */
7533                 struct kvm_userspace_memory_region mem;
7534                 memset(&mem, 0, sizeof(mem));
7535                 mem.slot = APIC_ACCESS_PAGE_PRIVATE_MEMSLOT;
7536                 x86_set_memory_region(kvm, &mem);
7537
7538                 mem.slot = IDENTITY_PAGETABLE_PRIVATE_MEMSLOT;
7539                 x86_set_memory_region(kvm, &mem);
7540
7541                 mem.slot = TSS_PRIVATE_MEMSLOT;
7542                 x86_set_memory_region(kvm, &mem);
7543         }
7544         kvm_iommu_unmap_guest(kvm);
7545         kfree(kvm->arch.vpic);
7546         kfree(kvm->arch.vioapic);
7547         kvm_free_vcpus(kvm);
7548         kfree(rcu_dereference_check(kvm->arch.apic_map, 1));
7549 }
7550
7551 void kvm_arch_free_memslot(struct kvm *kvm, struct kvm_memory_slot *free,
7552                            struct kvm_memory_slot *dont)
7553 {
7554         int i;
7555
7556         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7557                 if (!dont || free->arch.rmap[i] != dont->arch.rmap[i]) {
7558                         kvfree(free->arch.rmap[i]);
7559                         free->arch.rmap[i] = NULL;
7560                 }
7561                 if (i == 0)
7562                         continue;
7563
7564                 if (!dont || free->arch.lpage_info[i - 1] !=
7565                              dont->arch.lpage_info[i - 1]) {
7566                         kvfree(free->arch.lpage_info[i - 1]);
7567                         free->arch.lpage_info[i - 1] = NULL;
7568                 }
7569         }
7570 }
7571
7572 int kvm_arch_create_memslot(struct kvm *kvm, struct kvm_memory_slot *slot,
7573                             unsigned long npages)
7574 {
7575         int i;
7576
7577         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7578                 unsigned long ugfn;
7579                 int lpages;
7580                 int level = i + 1;
7581
7582                 lpages = gfn_to_index(slot->base_gfn + npages - 1,
7583                                       slot->base_gfn, level) + 1;
7584
7585                 slot->arch.rmap[i] =
7586                         kvm_kvzalloc(lpages * sizeof(*slot->arch.rmap[i]));
7587                 if (!slot->arch.rmap[i])
7588                         goto out_free;
7589                 if (i == 0)
7590                         continue;
7591
7592                 slot->arch.lpage_info[i - 1] = kvm_kvzalloc(lpages *
7593                                         sizeof(*slot->arch.lpage_info[i - 1]));
7594                 if (!slot->arch.lpage_info[i - 1])
7595                         goto out_free;
7596
7597                 if (slot->base_gfn & (KVM_PAGES_PER_HPAGE(level) - 1))
7598                         slot->arch.lpage_info[i - 1][0].write_count = 1;
7599                 if ((slot->base_gfn + npages) & (KVM_PAGES_PER_HPAGE(level) - 1))
7600                         slot->arch.lpage_info[i - 1][lpages - 1].write_count = 1;
7601                 ugfn = slot->userspace_addr >> PAGE_SHIFT;
7602                 /*
7603                  * If the gfn and userspace address are not aligned wrt each
7604                  * other, or if explicitly asked to, disable large page
7605                  * support for this slot
7606                  */
7607                 if ((slot->base_gfn ^ ugfn) & (KVM_PAGES_PER_HPAGE(level) - 1) ||
7608                     !kvm_largepages_enabled()) {
7609                         unsigned long j;
7610
7611                         for (j = 0; j < lpages; ++j)
7612                                 slot->arch.lpage_info[i - 1][j].write_count = 1;
7613                 }
7614         }
7615
7616         return 0;
7617
7618 out_free:
7619         for (i = 0; i < KVM_NR_PAGE_SIZES; ++i) {
7620                 kvfree(slot->arch.rmap[i]);
7621                 slot->arch.rmap[i] = NULL;
7622                 if (i == 0)
7623                         continue;
7624
7625                 kvfree(slot->arch.lpage_info[i - 1]);
7626                 slot->arch.lpage_info[i - 1] = NULL;
7627         }
7628         return -ENOMEM;
7629 }
7630
7631 void kvm_arch_memslots_updated(struct kvm *kvm, struct kvm_memslots *slots)
7632 {
7633         /*
7634          * memslots->generation has been incremented.
7635          * mmio generation may have reached its maximum value.
7636          */
7637         kvm_mmu_invalidate_mmio_sptes(kvm, slots);
7638 }
7639
7640 int kvm_arch_prepare_memory_region(struct kvm *kvm,
7641                                 struct kvm_memory_slot *memslot,
7642                                 const struct kvm_userspace_memory_region *mem,
7643                                 enum kvm_mr_change change)
7644 {
7645         /*
7646          * Only private memory slots need to be mapped here since
7647          * KVM_SET_MEMORY_REGION ioctl is no longer supported.
7648          */
7649         if ((memslot->id >= KVM_USER_MEM_SLOTS) && (change == KVM_MR_CREATE)) {
7650                 unsigned long userspace_addr;
7651
7652                 /*
7653                  * MAP_SHARED to prevent internal slot pages from being moved
7654                  * by fork()/COW.
7655                  */
7656                 userspace_addr = vm_mmap(NULL, 0, memslot->npages * PAGE_SIZE,
7657                                          PROT_READ | PROT_WRITE,
7658                                          MAP_SHARED | MAP_ANONYMOUS, 0);
7659
7660                 if (IS_ERR((void *)userspace_addr))
7661                         return PTR_ERR((void *)userspace_addr);
7662
7663                 memslot->userspace_addr = userspace_addr;
7664         }
7665
7666         return 0;
7667 }
7668
7669 static void kvm_mmu_slot_apply_flags(struct kvm *kvm,
7670                                      struct kvm_memory_slot *new)
7671 {
7672         /* Still write protect RO slot */
7673         if (new->flags & KVM_MEM_READONLY) {
7674                 kvm_mmu_slot_remove_write_access(kvm, new);
7675                 return;
7676         }
7677
7678         /*
7679          * Call kvm_x86_ops dirty logging hooks when they are valid.
7680          *
7681          * kvm_x86_ops->slot_disable_log_dirty is called when:
7682          *
7683          *  - KVM_MR_CREATE with dirty logging is disabled
7684          *  - KVM_MR_FLAGS_ONLY with dirty logging is disabled in new flag
7685          *
7686          * The reason is, in case of PML, we need to set D-bit for any slots
7687          * with dirty logging disabled in order to eliminate unnecessary GPA
7688          * logging in PML buffer (and potential PML buffer full VMEXT). This
7689          * guarantees leaving PML enabled during guest's lifetime won't have
7690          * any additonal overhead from PML when guest is running with dirty
7691          * logging disabled for memory slots.
7692          *
7693          * kvm_x86_ops->slot_enable_log_dirty is called when switching new slot
7694          * to dirty logging mode.
7695          *
7696          * If kvm_x86_ops dirty logging hooks are invalid, use write protect.
7697          *
7698          * In case of write protect:
7699          *
7700          * Write protect all pages for dirty logging.
7701          *
7702          * All the sptes including the large sptes which point to this
7703          * slot are set to readonly. We can not create any new large
7704          * spte on this slot until the end of the logging.
7705          *
7706          * See the comments in fast_page_fault().
7707          */
7708         if (new->flags & KVM_MEM_LOG_DIRTY_PAGES) {
7709                 if (kvm_x86_ops->slot_enable_log_dirty)
7710                         kvm_x86_ops->slot_enable_log_dirty(kvm, new);
7711                 else
7712                         kvm_mmu_slot_remove_write_access(kvm, new);
7713         } else {
7714                 if (kvm_x86_ops->slot_disable_log_dirty)
7715                         kvm_x86_ops->slot_disable_log_dirty(kvm, new);
7716         }
7717 }
7718
7719 void kvm_arch_commit_memory_region(struct kvm *kvm,
7720                                 const struct kvm_userspace_memory_region *mem,
7721                                 const struct kvm_memory_slot *old,
7722                                 const struct kvm_memory_slot *new,
7723                                 enum kvm_mr_change change)
7724 {
7725         int nr_mmu_pages = 0;
7726
7727         if (change == KVM_MR_DELETE && old->id >= KVM_USER_MEM_SLOTS) {
7728                 int ret;
7729
7730                 ret = vm_munmap(old->userspace_addr,
7731                                 old->npages * PAGE_SIZE);
7732                 if (ret < 0)
7733                         printk(KERN_WARNING
7734                                "kvm_vm_ioctl_set_memory_region: "
7735                                "failed to munmap memory\n");
7736         }
7737
7738         if (!kvm->arch.n_requested_mmu_pages)
7739                 nr_mmu_pages = kvm_mmu_calculate_mmu_pages(kvm);
7740
7741         if (nr_mmu_pages)
7742                 kvm_mmu_change_mmu_pages(kvm, nr_mmu_pages);
7743
7744         /*
7745          * Dirty logging tracks sptes in 4k granularity, meaning that large
7746          * sptes have to be split.  If live migration is successful, the guest
7747          * in the source machine will be destroyed and large sptes will be
7748          * created in the destination. However, if the guest continues to run
7749          * in the source machine (for example if live migration fails), small
7750          * sptes will remain around and cause bad performance.
7751          *
7752          * Scan sptes if dirty logging has been stopped, dropping those
7753          * which can be collapsed into a single large-page spte.  Later
7754          * page faults will create the large-page sptes.
7755          */
7756         if ((change != KVM_MR_DELETE) &&
7757                 (old->flags & KVM_MEM_LOG_DIRTY_PAGES) &&
7758                 !(new->flags & KVM_MEM_LOG_DIRTY_PAGES))
7759                 kvm_mmu_zap_collapsible_sptes(kvm, new);
7760
7761         /*
7762          * Set up write protection and/or dirty logging for the new slot.
7763          *
7764          * For KVM_MR_DELETE and KVM_MR_MOVE, the shadow pages of old slot have
7765          * been zapped so no dirty logging staff is needed for old slot. For
7766          * KVM_MR_FLAGS_ONLY, the old slot is essentially the same one as the
7767          * new and it's also covered when dealing with the new slot.
7768          *
7769          * FIXME: const-ify all uses of struct kvm_memory_slot.
7770          */
7771         if (change != KVM_MR_DELETE)
7772                 kvm_mmu_slot_apply_flags(kvm, (struct kvm_memory_slot *) new);
7773 }
7774
7775 void kvm_arch_flush_shadow_all(struct kvm *kvm)
7776 {
7777         kvm_mmu_invalidate_zap_all_pages(kvm);
7778 }
7779
7780 void kvm_arch_flush_shadow_memslot(struct kvm *kvm,
7781                                    struct kvm_memory_slot *slot)
7782 {
7783         kvm_mmu_invalidate_zap_all_pages(kvm);
7784 }
7785
7786 int kvm_arch_vcpu_runnable(struct kvm_vcpu *vcpu)
7787 {
7788         if (is_guest_mode(vcpu) && kvm_x86_ops->check_nested_events)
7789                 kvm_x86_ops->check_nested_events(vcpu, false);
7790
7791         return (vcpu->arch.mp_state == KVM_MP_STATE_RUNNABLE &&
7792                 !vcpu->arch.apf.halted)
7793                 || !list_empty_careful(&vcpu->async_pf.done)
7794                 || kvm_apic_has_events(vcpu)
7795                 || vcpu->arch.pv.pv_unhalted
7796                 || atomic_read(&vcpu->arch.nmi_queued) ||
7797                 (kvm_arch_interrupt_allowed(vcpu) &&
7798                  kvm_cpu_has_interrupt(vcpu));
7799 }
7800
7801 int kvm_arch_vcpu_should_kick(struct kvm_vcpu *vcpu)
7802 {
7803         return kvm_vcpu_exiting_guest_mode(vcpu) == IN_GUEST_MODE;
7804 }
7805
7806 int kvm_arch_interrupt_allowed(struct kvm_vcpu *vcpu)
7807 {
7808         return kvm_x86_ops->interrupt_allowed(vcpu);
7809 }
7810
7811 unsigned long kvm_get_linear_rip(struct kvm_vcpu *vcpu)
7812 {
7813         if (is_64_bit_mode(vcpu))
7814                 return kvm_rip_read(vcpu);
7815         return (u32)(get_segment_base(vcpu, VCPU_SREG_CS) +
7816                      kvm_rip_read(vcpu));
7817 }
7818 EXPORT_SYMBOL_GPL(kvm_get_linear_rip);
7819
7820 bool kvm_is_linear_rip(struct kvm_vcpu *vcpu, unsigned long linear_rip)
7821 {
7822         return kvm_get_linear_rip(vcpu) == linear_rip;
7823 }
7824 EXPORT_SYMBOL_GPL(kvm_is_linear_rip);
7825
7826 unsigned long kvm_get_rflags(struct kvm_vcpu *vcpu)
7827 {
7828         unsigned long rflags;
7829
7830         rflags = kvm_x86_ops->get_rflags(vcpu);
7831         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP)
7832                 rflags &= ~X86_EFLAGS_TF;
7833         return rflags;
7834 }
7835 EXPORT_SYMBOL_GPL(kvm_get_rflags);
7836
7837 static void __kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7838 {
7839         if (vcpu->guest_debug & KVM_GUESTDBG_SINGLESTEP &&
7840             kvm_is_linear_rip(vcpu, vcpu->arch.singlestep_rip))
7841                 rflags |= X86_EFLAGS_TF;
7842         kvm_x86_ops->set_rflags(vcpu, rflags);
7843 }
7844
7845 void kvm_set_rflags(struct kvm_vcpu *vcpu, unsigned long rflags)
7846 {
7847         __kvm_set_rflags(vcpu, rflags);
7848         kvm_make_request(KVM_REQ_EVENT, vcpu);
7849 }
7850 EXPORT_SYMBOL_GPL(kvm_set_rflags);
7851
7852 void kvm_arch_async_page_ready(struct kvm_vcpu *vcpu, struct kvm_async_pf *work)
7853 {
7854         int r;
7855
7856         if ((vcpu->arch.mmu.direct_map != work->arch.direct_map) ||
7857               work->wakeup_all)
7858                 return;
7859
7860         r = kvm_mmu_reload(vcpu);
7861         if (unlikely(r))
7862                 return;
7863
7864         if (!vcpu->arch.mmu.direct_map &&
7865               work->arch.cr3 != vcpu->arch.mmu.get_cr3(vcpu))
7866                 return;
7867
7868         vcpu->arch.mmu.page_fault(vcpu, work->gva, 0, true);
7869 }
7870
7871 static inline u32 kvm_async_pf_hash_fn(gfn_t gfn)
7872 {
7873         return hash_32(gfn & 0xffffffff, order_base_2(ASYNC_PF_PER_VCPU));
7874 }
7875
7876 static inline u32 kvm_async_pf_next_probe(u32 key)
7877 {
7878         return (key + 1) & (roundup_pow_of_two(ASYNC_PF_PER_VCPU) - 1);
7879 }
7880
7881 static void kvm_add_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7882 {
7883         u32 key = kvm_async_pf_hash_fn(gfn);
7884
7885         while (vcpu->arch.apf.gfns[key] != ~0)
7886                 key = kvm_async_pf_next_probe(key);
7887
7888         vcpu->arch.apf.gfns[key] = gfn;
7889 }
7890
7891 static u32 kvm_async_pf_gfn_slot(struct kvm_vcpu *vcpu, gfn_t gfn)
7892 {
7893         int i;
7894         u32 key = kvm_async_pf_hash_fn(gfn);
7895
7896         for (i = 0; i < roundup_pow_of_two(ASYNC_PF_PER_VCPU) &&
7897                      (vcpu->arch.apf.gfns[key] != gfn &&
7898                       vcpu->arch.apf.gfns[key] != ~0); i++)
7899                 key = kvm_async_pf_next_probe(key);
7900
7901         return key;
7902 }
7903
7904 bool kvm_find_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7905 {
7906         return vcpu->arch.apf.gfns[kvm_async_pf_gfn_slot(vcpu, gfn)] == gfn;
7907 }
7908
7909 static void kvm_del_async_pf_gfn(struct kvm_vcpu *vcpu, gfn_t gfn)
7910 {
7911         u32 i, j, k;
7912
7913         i = j = kvm_async_pf_gfn_slot(vcpu, gfn);
7914         while (true) {
7915                 vcpu->arch.apf.gfns[i] = ~0;
7916                 do {
7917                         j = kvm_async_pf_next_probe(j);
7918                         if (vcpu->arch.apf.gfns[j] == ~0)
7919                                 return;
7920                         k = kvm_async_pf_hash_fn(vcpu->arch.apf.gfns[j]);
7921                         /*
7922                          * k lies cyclically in ]i,j]
7923                          * |    i.k.j |
7924                          * |....j i.k.| or  |.k..j i...|
7925                          */
7926                 } while ((i <= j) ? (i < k && k <= j) : (i < k || k <= j));
7927                 vcpu->arch.apf.gfns[i] = vcpu->arch.apf.gfns[j];
7928                 i = j;
7929         }
7930 }
7931
7932 static int apf_put_user(struct kvm_vcpu *vcpu, u32 val)
7933 {
7934
7935         return kvm_write_guest_cached(vcpu->kvm, &vcpu->arch.apf.data, &val,
7936                                       sizeof(val));
7937 }
7938
7939 void kvm_arch_async_page_not_present(struct kvm_vcpu *vcpu,
7940                                      struct kvm_async_pf *work)
7941 {
7942         struct x86_exception fault;
7943
7944         trace_kvm_async_pf_not_present(work->arch.token, work->gva);
7945         kvm_add_async_pf_gfn(vcpu, work->arch.gfn);
7946
7947         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) ||
7948             (vcpu->arch.apf.send_user_only &&
7949              kvm_x86_ops->get_cpl(vcpu) == 0))
7950                 kvm_make_request(KVM_REQ_APF_HALT, vcpu);
7951         else if (!apf_put_user(vcpu, KVM_PV_REASON_PAGE_NOT_PRESENT)) {
7952                 fault.vector = PF_VECTOR;
7953                 fault.error_code_valid = true;
7954                 fault.error_code = 0;
7955                 fault.nested_page_fault = false;
7956                 fault.address = work->arch.token;
7957                 kvm_inject_page_fault(vcpu, &fault);
7958         }
7959 }
7960
7961 void kvm_arch_async_page_present(struct kvm_vcpu *vcpu,
7962                                  struct kvm_async_pf *work)
7963 {
7964         struct x86_exception fault;
7965
7966         trace_kvm_async_pf_ready(work->arch.token, work->gva);
7967         if (work->wakeup_all)
7968                 work->arch.token = ~0; /* broadcast wakeup */
7969         else
7970                 kvm_del_async_pf_gfn(vcpu, work->arch.gfn);
7971
7972         if ((vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED) &&
7973             !apf_put_user(vcpu, KVM_PV_REASON_PAGE_READY)) {
7974                 fault.vector = PF_VECTOR;
7975                 fault.error_code_valid = true;
7976                 fault.error_code = 0;
7977                 fault.nested_page_fault = false;
7978                 fault.address = work->arch.token;
7979                 kvm_inject_page_fault(vcpu, &fault);
7980         }
7981         vcpu->arch.apf.halted = false;
7982         vcpu->arch.mp_state = KVM_MP_STATE_RUNNABLE;
7983 }
7984
7985 bool kvm_arch_can_inject_async_page_present(struct kvm_vcpu *vcpu)
7986 {
7987         if (!(vcpu->arch.apf.msr_val & KVM_ASYNC_PF_ENABLED))
7988                 return true;
7989         else
7990                 return !kvm_event_needs_reinjection(vcpu) &&
7991                         kvm_x86_ops->interrupt_allowed(vcpu);
7992 }
7993
7994 void kvm_arch_start_assignment(struct kvm *kvm)
7995 {
7996         atomic_inc(&kvm->arch.assigned_device_count);
7997 }
7998 EXPORT_SYMBOL_GPL(kvm_arch_start_assignment);
7999
8000 void kvm_arch_end_assignment(struct kvm *kvm)
8001 {
8002         atomic_dec(&kvm->arch.assigned_device_count);
8003 }
8004 EXPORT_SYMBOL_GPL(kvm_arch_end_assignment);
8005
8006 bool kvm_arch_has_assigned_device(struct kvm *kvm)
8007 {
8008         return atomic_read(&kvm->arch.assigned_device_count);
8009 }
8010 EXPORT_SYMBOL_GPL(kvm_arch_has_assigned_device);
8011
8012 void kvm_arch_register_noncoherent_dma(struct kvm *kvm)
8013 {
8014         atomic_inc(&kvm->arch.noncoherent_dma_count);
8015 }
8016 EXPORT_SYMBOL_GPL(kvm_arch_register_noncoherent_dma);
8017
8018 void kvm_arch_unregister_noncoherent_dma(struct kvm *kvm)
8019 {
8020         atomic_dec(&kvm->arch.noncoherent_dma_count);
8021 }
8022 EXPORT_SYMBOL_GPL(kvm_arch_unregister_noncoherent_dma);
8023
8024 bool kvm_arch_has_noncoherent_dma(struct kvm *kvm)
8025 {
8026         return atomic_read(&kvm->arch.noncoherent_dma_count);
8027 }
8028 EXPORT_SYMBOL_GPL(kvm_arch_has_noncoherent_dma);
8029
8030 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_exit);
8031 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_inj_virq);
8032 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_page_fault);
8033 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_msr);
8034 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_cr);
8035 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmrun);
8036 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit);
8037 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_vmexit_inject);
8038 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intr_vmexit);
8039 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_invlpga);
8040 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_skinit);
8041 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_nested_intercepts);
8042 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_write_tsc_offset);
8043 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_ple_window);
8044 EXPORT_TRACEPOINT_SYMBOL_GPL(kvm_pml_full);