2 * Copyright 2002 Andi Kleen, SuSE Labs.
3 * Thanks to Ben LaHaise for precious feedback.
5 #include <linux/highmem.h>
6 #include <linux/bootmem.h>
7 #include <linux/sched.h>
9 #include <linux/interrupt.h>
10 #include <linux/seq_file.h>
11 #include <linux/debugfs.h>
12 #include <linux/pfn.h>
13 #include <linux/percpu.h>
14 #include <linux/gfp.h>
15 #include <linux/pci.h>
16 #include <linux/vmalloc.h>
18 #include <asm/e820/api.h>
19 #include <asm/processor.h>
20 #include <asm/tlbflush.h>
21 #include <asm/sections.h>
22 #include <asm/setup.h>
23 #include <linux/uaccess.h>
24 #include <asm/pgalloc.h>
25 #include <asm/proto.h>
27 #include <asm/set_memory.h>
30 * The current flushing context - we pass it instead of 5 arguments:
37 unsigned long numpages;
40 unsigned force_split : 1;
46 * Serialize cpa() (for !DEBUG_PAGEALLOC which uses large identity mappings)
47 * using cpa_lock. So that we don't allow any other cpu, with stale large tlb
48 * entries change the page attribute in parallel to some other cpu
49 * splitting a large page entry along with changing the attribute.
51 static DEFINE_SPINLOCK(cpa_lock);
53 #define CPA_FLUSHTLB 1
55 #define CPA_PAGES_ARRAY 4
58 static unsigned long direct_pages_count[PG_LEVEL_NUM];
60 void update_page_count(int level, unsigned long pages)
62 /* Protect against CPA */
64 direct_pages_count[level] += pages;
65 spin_unlock(&pgd_lock);
68 static void split_page_count(int level)
70 if (direct_pages_count[level] == 0)
73 direct_pages_count[level]--;
74 direct_pages_count[level - 1] += PTRS_PER_PTE;
77 void arch_report_meminfo(struct seq_file *m)
79 seq_printf(m, "DirectMap4k: %8lu kB\n",
80 direct_pages_count[PG_LEVEL_4K] << 2);
81 #if defined(CONFIG_X86_64) || defined(CONFIG_X86_PAE)
82 seq_printf(m, "DirectMap2M: %8lu kB\n",
83 direct_pages_count[PG_LEVEL_2M] << 11);
85 seq_printf(m, "DirectMap4M: %8lu kB\n",
86 direct_pages_count[PG_LEVEL_2M] << 12);
89 seq_printf(m, "DirectMap1G: %8lu kB\n",
90 direct_pages_count[PG_LEVEL_1G] << 20);
93 static inline void split_page_count(int level) { }
98 static inline unsigned long highmap_start_pfn(void)
100 return __pa_symbol(_text) >> PAGE_SHIFT;
103 static inline unsigned long highmap_end_pfn(void)
105 /* Do not reference physical address outside the kernel. */
106 return __pa_symbol(roundup(_brk_end, PMD_SIZE) - 1) >> PAGE_SHIFT;
112 within(unsigned long addr, unsigned long start, unsigned long end)
114 return addr >= start && addr < end;
118 within_inclusive(unsigned long addr, unsigned long start, unsigned long end)
120 return addr >= start && addr <= end;
128 * clflush_cache_range - flush a cache range with clflush
129 * @vaddr: virtual start address
130 * @size: number of bytes to flush
132 * clflushopt is an unordered instruction which needs fencing with mfence or
133 * sfence to avoid ordering issues.
135 void clflush_cache_range(void *vaddr, unsigned int size)
137 const unsigned long clflush_size = boot_cpu_data.x86_clflush_size;
138 void *p = (void *)((unsigned long)vaddr & ~(clflush_size - 1));
139 void *vend = vaddr + size;
146 for (; p < vend; p += clflush_size)
151 EXPORT_SYMBOL_GPL(clflush_cache_range);
153 void arch_invalidate_pmem(void *addr, size_t size)
155 clflush_cache_range(addr, size);
157 EXPORT_SYMBOL_GPL(arch_invalidate_pmem);
159 static void __cpa_flush_all(void *arg)
161 unsigned long cache = (unsigned long)arg;
164 * Flush all to work around Errata in early athlons regarding
165 * large page flushing.
169 if (cache && boot_cpu_data.x86 >= 4)
173 static void cpa_flush_all(unsigned long cache)
175 BUG_ON(irqs_disabled());
177 on_each_cpu(__cpa_flush_all, (void *) cache, 1);
180 static void __cpa_flush_range(void *arg)
183 * We could optimize that further and do individual per page
184 * tlb invalidates for a low number of pages. Caveat: we must
185 * flush the high aliases on 64bit as well.
190 static void cpa_flush_range(unsigned long start, int numpages, int cache)
192 unsigned int i, level;
195 BUG_ON(irqs_disabled() && !early_boot_irqs_disabled);
196 WARN_ON(PAGE_ALIGN(start) != start);
198 on_each_cpu(__cpa_flush_range, NULL, 1);
204 * We only need to flush on one CPU,
205 * clflush is a MESI-coherent instruction that
206 * will cause all other CPUs to flush the same
209 for (i = 0, addr = start; i < numpages; i++, addr += PAGE_SIZE) {
210 pte_t *pte = lookup_address(addr, &level);
213 * Only flush present addresses:
215 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
216 clflush_cache_range((void *) addr, PAGE_SIZE);
220 static void cpa_flush_array(unsigned long *start, int numpages, int cache,
221 int in_flags, struct page **pages)
223 unsigned int i, level;
224 #ifdef CONFIG_PREEMPT
226 * Avoid wbinvd() because it causes latencies on all CPUs,
227 * regardless of any CPU isolation that may be in effect.
229 * This should be extended for CAT enabled systems independent of
230 * PREEMPT because wbinvd() does not respect the CAT partitions and
231 * this is exposed to unpriviledged users through the graphics
234 unsigned long do_wbinvd = 0;
236 unsigned long do_wbinvd = cache && numpages >= 1024; /* 4M threshold */
239 BUG_ON(irqs_disabled());
241 on_each_cpu(__cpa_flush_all, (void *) do_wbinvd, 1);
243 if (!cache || do_wbinvd)
247 * We only need to flush on one CPU,
248 * clflush is a MESI-coherent instruction that
249 * will cause all other CPUs to flush the same
252 for (i = 0; i < numpages; i++) {
256 if (in_flags & CPA_PAGES_ARRAY)
257 addr = (unsigned long)page_address(pages[i]);
261 pte = lookup_address(addr, &level);
264 * Only flush present addresses:
266 if (pte && (pte_val(*pte) & _PAGE_PRESENT))
267 clflush_cache_range((void *)addr, PAGE_SIZE);
272 * Certain areas of memory on x86 require very specific protection flags,
273 * for example the BIOS area or kernel text. Callers don't always get this
274 * right (again, ioremap() on BIOS memory is not uncommon) so this function
275 * checks and fixes these known static required protection bits.
277 static inline pgprot_t static_protections(pgprot_t prot, unsigned long address,
280 pgprot_t forbidden = __pgprot(0);
283 * The BIOS area between 640k and 1Mb needs to be executable for
284 * PCI BIOS based config access (CONFIG_PCI_GOBIOS) support.
286 #ifdef CONFIG_PCI_BIOS
287 if (pcibios_enabled && within(pfn, BIOS_BEGIN >> PAGE_SHIFT, BIOS_END >> PAGE_SHIFT))
288 pgprot_val(forbidden) |= _PAGE_NX;
292 * The kernel text needs to be executable for obvious reasons
293 * Does not cover __inittext since that is gone later on. On
294 * 64bit we do not enforce !NX on the low mapping
296 if (within(address, (unsigned long)_text, (unsigned long)_etext))
297 pgprot_val(forbidden) |= _PAGE_NX;
300 * The .rodata section needs to be read-only. Using the pfn
301 * catches all aliases.
303 if (within(pfn, __pa_symbol(__start_rodata) >> PAGE_SHIFT,
304 __pa_symbol(__end_rodata) >> PAGE_SHIFT))
305 pgprot_val(forbidden) |= _PAGE_RW;
307 #if defined(CONFIG_X86_64)
309 * Once the kernel maps the text as RO (kernel_set_to_readonly is set),
310 * kernel text mappings for the large page aligned text, rodata sections
311 * will be always read-only. For the kernel identity mappings covering
312 * the holes caused by this alignment can be anything that user asks.
314 * This will preserve the large page mappings for kernel text/data
317 if (kernel_set_to_readonly &&
318 within(address, (unsigned long)_text,
319 (unsigned long)__end_rodata_hpage_align)) {
323 * Don't enforce the !RW mapping for the kernel text mapping,
324 * if the current mapping is already using small page mapping.
325 * No need to work hard to preserve large page mappings in this
328 * This also fixes the Linux Xen paravirt guest boot failure
329 * (because of unexpected read-only mappings for kernel identity
330 * mappings). In this paravirt guest case, the kernel text
331 * mapping and the kernel identity mapping share the same
332 * page-table pages. Thus we can't really use different
333 * protections for the kernel text and identity mappings. Also,
334 * these shared mappings are made of small page mappings.
335 * Thus this don't enforce !RW mapping for small page kernel
336 * text mapping logic will help Linux Xen parvirt guest boot
339 if (lookup_address(address, &level) && (level != PG_LEVEL_4K))
340 pgprot_val(forbidden) |= _PAGE_RW;
344 prot = __pgprot(pgprot_val(prot) & ~pgprot_val(forbidden));
350 * Lookup the page table entry for a virtual address in a specific pgd.
351 * Return a pointer to the entry and the level of the mapping.
353 pte_t *lookup_address_in_pgd(pgd_t *pgd, unsigned long address,
360 *level = PG_LEVEL_NONE;
365 p4d = p4d_offset(pgd, address);
369 *level = PG_LEVEL_512G;
370 if (p4d_large(*p4d) || !p4d_present(*p4d))
373 pud = pud_offset(p4d, address);
377 *level = PG_LEVEL_1G;
378 if (pud_large(*pud) || !pud_present(*pud))
381 pmd = pmd_offset(pud, address);
385 *level = PG_LEVEL_2M;
386 if (pmd_large(*pmd) || !pmd_present(*pmd))
389 *level = PG_LEVEL_4K;
391 return pte_offset_kernel(pmd, address);
395 * Lookup the page table entry for a virtual address. Return a pointer
396 * to the entry and the level of the mapping.
398 * Note: We return pud and pmd either when the entry is marked large
399 * or when the present bit is not set. Otherwise we would return a
400 * pointer to a nonexisting mapping.
402 pte_t *lookup_address(unsigned long address, unsigned int *level)
404 return lookup_address_in_pgd(pgd_offset_k(address), address, level);
406 EXPORT_SYMBOL_GPL(lookup_address);
408 static pte_t *_lookup_address_cpa(struct cpa_data *cpa, unsigned long address,
412 return lookup_address_in_pgd(cpa->pgd + pgd_index(address),
415 return lookup_address(address, level);
419 * Lookup the PMD entry for a virtual address. Return a pointer to the entry
420 * or NULL if not present.
422 pmd_t *lookup_pmd_address(unsigned long address)
428 pgd = pgd_offset_k(address);
432 p4d = p4d_offset(pgd, address);
433 if (p4d_none(*p4d) || p4d_large(*p4d) || !p4d_present(*p4d))
436 pud = pud_offset(p4d, address);
437 if (pud_none(*pud) || pud_large(*pud) || !pud_present(*pud))
440 return pmd_offset(pud, address);
444 * This is necessary because __pa() does not work on some
445 * kinds of memory, like vmalloc() or the alloc_remap()
446 * areas on 32-bit NUMA systems. The percpu areas can
447 * end up in this kind of memory, for instance.
449 * This could be optimized, but it is only intended to be
450 * used at inititalization time, and keeping it
451 * unoptimized should increase the testing coverage for
452 * the more obscure platforms.
454 phys_addr_t slow_virt_to_phys(void *__virt_addr)
456 unsigned long virt_addr = (unsigned long)__virt_addr;
457 phys_addr_t phys_addr;
458 unsigned long offset;
462 pte = lookup_address(virt_addr, &level);
466 * pXX_pfn() returns unsigned long, which must be cast to phys_addr_t
467 * before being left-shifted PAGE_SHIFT bits -- this trick is to
468 * make 32-PAE kernel work correctly.
472 phys_addr = (phys_addr_t)pud_pfn(*(pud_t *)pte) << PAGE_SHIFT;
473 offset = virt_addr & ~PUD_PAGE_MASK;
476 phys_addr = (phys_addr_t)pmd_pfn(*(pmd_t *)pte) << PAGE_SHIFT;
477 offset = virt_addr & ~PMD_PAGE_MASK;
480 phys_addr = (phys_addr_t)pte_pfn(*pte) << PAGE_SHIFT;
481 offset = virt_addr & ~PAGE_MASK;
484 return (phys_addr_t)(phys_addr | offset);
486 EXPORT_SYMBOL_GPL(slow_virt_to_phys);
489 * Set the new pmd in all the pgds we know about:
491 static void __set_pmd_pte(pte_t *kpte, unsigned long address, pte_t pte)
494 set_pte_atomic(kpte, pte);
496 if (!SHARED_KERNEL_PMD) {
499 list_for_each_entry(page, &pgd_list, lru) {
505 pgd = (pgd_t *)page_address(page) + pgd_index(address);
506 p4d = p4d_offset(pgd, address);
507 pud = pud_offset(p4d, address);
508 pmd = pmd_offset(pud, address);
509 set_pte_atomic((pte_t *)pmd, pte);
516 try_preserve_large_page(pte_t *kpte, unsigned long address,
517 struct cpa_data *cpa)
519 unsigned long nextpage_addr, numpages, pmask, psize, addr, pfn, old_pfn;
520 pte_t new_pte, old_pte, *tmp;
521 pgprot_t old_prot, new_prot, req_prot;
525 if (cpa->force_split)
528 spin_lock(&pgd_lock);
530 * Check for races, another CPU might have split this page
533 tmp = _lookup_address_cpa(cpa, address, &level);
539 old_prot = pmd_pgprot(*(pmd_t *)kpte);
540 old_pfn = pmd_pfn(*(pmd_t *)kpte);
543 old_prot = pud_pgprot(*(pud_t *)kpte);
544 old_pfn = pud_pfn(*(pud_t *)kpte);
551 psize = page_level_size(level);
552 pmask = page_level_mask(level);
555 * Calculate the number of pages, which fit into this large
556 * page starting at address:
558 nextpage_addr = (address + psize) & pmask;
559 numpages = (nextpage_addr - address) >> PAGE_SHIFT;
560 if (numpages < cpa->numpages)
561 cpa->numpages = numpages;
564 * We are safe now. Check whether the new pgprot is the same:
565 * Convert protection attributes to 4k-format, as cpa->mask* are set
569 req_prot = pgprot_large_2_4k(old_prot);
571 pgprot_val(req_prot) &= ~pgprot_val(cpa->mask_clr);
572 pgprot_val(req_prot) |= pgprot_val(cpa->mask_set);
575 * req_prot is in format of 4k pages. It must be converted to large
576 * page format: the caching mode includes the PAT bit located at
577 * different bit positions in the two formats.
579 req_prot = pgprot_4k_2_large(req_prot);
582 * Set the PSE and GLOBAL flags only if the PRESENT flag is
583 * set otherwise pmd_present/pmd_huge will return true even on
584 * a non present pmd. The canon_pgprot will clear _PAGE_GLOBAL
585 * for the ancient hardware that doesn't support it.
587 if (pgprot_val(req_prot) & _PAGE_PRESENT)
588 pgprot_val(req_prot) |= _PAGE_PSE | _PAGE_GLOBAL;
590 pgprot_val(req_prot) &= ~(_PAGE_PSE | _PAGE_GLOBAL);
592 req_prot = canon_pgprot(req_prot);
595 * old_pfn points to the large page base pfn. So we need
596 * to add the offset of the virtual address:
598 pfn = old_pfn + ((address & (psize - 1)) >> PAGE_SHIFT);
601 new_prot = static_protections(req_prot, address, pfn);
604 * We need to check the full range, whether
605 * static_protection() requires a different pgprot for one of
606 * the pages in the range we try to preserve:
608 addr = address & pmask;
610 for (i = 0; i < (psize >> PAGE_SHIFT); i++, addr += PAGE_SIZE, pfn++) {
611 pgprot_t chk_prot = static_protections(req_prot, addr, pfn);
613 if (pgprot_val(chk_prot) != pgprot_val(new_prot))
618 * If there are no changes, return. maxpages has been updated
621 if (pgprot_val(new_prot) == pgprot_val(old_prot)) {
627 * We need to change the attributes. Check, whether we can
628 * change the large page in one go. We request a split, when
629 * the address is not aligned and the number of pages is
630 * smaller than the number of pages in the large page. Note
631 * that we limited the number of possible pages already to
632 * the number of pages in the large page.
634 if (address == (address & pmask) && cpa->numpages == (psize >> PAGE_SHIFT)) {
636 * The address is aligned and the number of pages
637 * covers the full page.
639 new_pte = pfn_pte(old_pfn, new_prot);
640 __set_pmd_pte(kpte, address, new_pte);
641 cpa->flags |= CPA_FLUSHTLB;
646 spin_unlock(&pgd_lock);
652 __split_large_page(struct cpa_data *cpa, pte_t *kpte, unsigned long address,
655 pte_t *pbase = (pte_t *)page_address(base);
656 unsigned long ref_pfn, pfn, pfninc = 1;
657 unsigned int i, level;
661 spin_lock(&pgd_lock);
663 * Check for races, another CPU might have split this page
666 tmp = _lookup_address_cpa(cpa, address, &level);
668 spin_unlock(&pgd_lock);
672 paravirt_alloc_pte(&init_mm, page_to_pfn(base));
676 ref_prot = pmd_pgprot(*(pmd_t *)kpte);
677 /* clear PSE and promote PAT bit to correct position */
678 ref_prot = pgprot_large_2_4k(ref_prot);
679 ref_pfn = pmd_pfn(*(pmd_t *)kpte);
683 ref_prot = pud_pgprot(*(pud_t *)kpte);
684 ref_pfn = pud_pfn(*(pud_t *)kpte);
685 pfninc = PMD_PAGE_SIZE >> PAGE_SHIFT;
688 * Clear the PSE flags if the PRESENT flag is not set
689 * otherwise pmd_present/pmd_huge will return true
690 * even on a non present pmd.
692 if (!(pgprot_val(ref_prot) & _PAGE_PRESENT))
693 pgprot_val(ref_prot) &= ~_PAGE_PSE;
697 spin_unlock(&pgd_lock);
702 * Set the GLOBAL flags only if the PRESENT flag is set
703 * otherwise pmd/pte_present will return true even on a non
704 * present pmd/pte. The canon_pgprot will clear _PAGE_GLOBAL
705 * for the ancient hardware that doesn't support it.
707 if (pgprot_val(ref_prot) & _PAGE_PRESENT)
708 pgprot_val(ref_prot) |= _PAGE_GLOBAL;
710 pgprot_val(ref_prot) &= ~_PAGE_GLOBAL;
713 * Get the target pfn from the original entry:
716 for (i = 0; i < PTRS_PER_PTE; i++, pfn += pfninc)
717 set_pte(&pbase[i], pfn_pte(pfn, canon_pgprot(ref_prot)));
719 if (virt_addr_valid(address)) {
720 unsigned long pfn = PFN_DOWN(__pa(address));
722 if (pfn_range_is_mapped(pfn, pfn + 1))
723 split_page_count(level);
727 * Install the new, split up pagetable.
729 * We use the standard kernel pagetable protections for the new
730 * pagetable protections, the actual ptes set above control the
731 * primary protection behavior:
733 __set_pmd_pte(kpte, address, mk_pte(base, __pgprot(_KERNPG_TABLE)));
736 * Intel Atom errata AAH41 workaround.
738 * The real fix should be in hw or in a microcode update, but
739 * we also probabilistically try to reduce the window of having
740 * a large TLB mixed with 4K TLBs while instruction fetches are
744 spin_unlock(&pgd_lock);
749 static int split_large_page(struct cpa_data *cpa, pte_t *kpte,
750 unsigned long address)
754 if (!debug_pagealloc_enabled())
755 spin_unlock(&cpa_lock);
756 base = alloc_pages(GFP_KERNEL | __GFP_NOTRACK, 0);
757 if (!debug_pagealloc_enabled())
758 spin_lock(&cpa_lock);
762 if (__split_large_page(cpa, kpte, address, base))
768 static bool try_to_free_pte_page(pte_t *pte)
772 for (i = 0; i < PTRS_PER_PTE; i++)
773 if (!pte_none(pte[i]))
776 free_page((unsigned long)pte);
780 static bool try_to_free_pmd_page(pmd_t *pmd)
784 for (i = 0; i < PTRS_PER_PMD; i++)
785 if (!pmd_none(pmd[i]))
788 free_page((unsigned long)pmd);
792 static bool unmap_pte_range(pmd_t *pmd, unsigned long start, unsigned long end)
794 pte_t *pte = pte_offset_kernel(pmd, start);
796 while (start < end) {
797 set_pte(pte, __pte(0));
803 if (try_to_free_pte_page((pte_t *)pmd_page_vaddr(*pmd))) {
810 static void __unmap_pmd_range(pud_t *pud, pmd_t *pmd,
811 unsigned long start, unsigned long end)
813 if (unmap_pte_range(pmd, start, end))
814 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
818 static void unmap_pmd_range(pud_t *pud, unsigned long start, unsigned long end)
820 pmd_t *pmd = pmd_offset(pud, start);
823 * Not on a 2MB page boundary?
825 if (start & (PMD_SIZE - 1)) {
826 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
827 unsigned long pre_end = min_t(unsigned long, end, next_page);
829 __unmap_pmd_range(pud, pmd, start, pre_end);
836 * Try to unmap in 2M chunks.
838 while (end - start >= PMD_SIZE) {
842 __unmap_pmd_range(pud, pmd, start, start + PMD_SIZE);
852 return __unmap_pmd_range(pud, pmd, start, end);
855 * Try again to free the PMD page if haven't succeeded above.
858 if (try_to_free_pmd_page((pmd_t *)pud_page_vaddr(*pud)))
862 static void unmap_pud_range(p4d_t *p4d, unsigned long start, unsigned long end)
864 pud_t *pud = pud_offset(p4d, start);
867 * Not on a GB page boundary?
869 if (start & (PUD_SIZE - 1)) {
870 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
871 unsigned long pre_end = min_t(unsigned long, end, next_page);
873 unmap_pmd_range(pud, start, pre_end);
880 * Try to unmap in 1G chunks?
882 while (end - start >= PUD_SIZE) {
887 unmap_pmd_range(pud, start, start + PUD_SIZE);
897 unmap_pmd_range(pud, start, end);
900 * No need to try to free the PUD page because we'll free it in
901 * populate_pgd's error path
905 static int alloc_pte_page(pmd_t *pmd)
907 pte_t *pte = (pte_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
911 set_pmd(pmd, __pmd(__pa(pte) | _KERNPG_TABLE));
915 static int alloc_pmd_page(pud_t *pud)
917 pmd_t *pmd = (pmd_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
921 set_pud(pud, __pud(__pa(pmd) | _KERNPG_TABLE));
925 static void populate_pte(struct cpa_data *cpa,
926 unsigned long start, unsigned long end,
927 unsigned num_pages, pmd_t *pmd, pgprot_t pgprot)
931 pte = pte_offset_kernel(pmd, start);
934 * Set the GLOBAL flags only if the PRESENT flag is
935 * set otherwise pte_present will return true even on
936 * a non present pte. The canon_pgprot will clear
937 * _PAGE_GLOBAL for the ancient hardware that doesn't
940 if (pgprot_val(pgprot) & _PAGE_PRESENT)
941 pgprot_val(pgprot) |= _PAGE_GLOBAL;
943 pgprot_val(pgprot) &= ~_PAGE_GLOBAL;
945 pgprot = canon_pgprot(pgprot);
947 while (num_pages-- && start < end) {
948 set_pte(pte, pfn_pte(cpa->pfn, pgprot));
956 static long populate_pmd(struct cpa_data *cpa,
957 unsigned long start, unsigned long end,
958 unsigned num_pages, pud_t *pud, pgprot_t pgprot)
965 * Not on a 2M boundary?
967 if (start & (PMD_SIZE - 1)) {
968 unsigned long pre_end = start + (num_pages << PAGE_SHIFT);
969 unsigned long next_page = (start + PMD_SIZE) & PMD_MASK;
971 pre_end = min_t(unsigned long, pre_end, next_page);
972 cur_pages = (pre_end - start) >> PAGE_SHIFT;
973 cur_pages = min_t(unsigned int, num_pages, cur_pages);
978 pmd = pmd_offset(pud, start);
980 if (alloc_pte_page(pmd))
983 populate_pte(cpa, start, pre_end, cur_pages, pmd, pgprot);
989 * We mapped them all?
991 if (num_pages == cur_pages)
994 pmd_pgprot = pgprot_4k_2_large(pgprot);
996 while (end - start >= PMD_SIZE) {
999 * We cannot use a 1G page so allocate a PMD page if needed.
1002 if (alloc_pmd_page(pud))
1005 pmd = pmd_offset(pud, start);
1007 set_pmd(pmd, __pmd(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1008 massage_pgprot(pmd_pgprot)));
1011 cpa->pfn += PMD_SIZE >> PAGE_SHIFT;
1012 cur_pages += PMD_SIZE >> PAGE_SHIFT;
1016 * Map trailing 4K pages.
1019 pmd = pmd_offset(pud, start);
1021 if (alloc_pte_page(pmd))
1024 populate_pte(cpa, start, end, num_pages - cur_pages,
1030 static int populate_pud(struct cpa_data *cpa, unsigned long start, p4d_t *p4d,
1036 pgprot_t pud_pgprot;
1038 end = start + (cpa->numpages << PAGE_SHIFT);
1041 * Not on a Gb page boundary? => map everything up to it with
1044 if (start & (PUD_SIZE - 1)) {
1045 unsigned long pre_end;
1046 unsigned long next_page = (start + PUD_SIZE) & PUD_MASK;
1048 pre_end = min_t(unsigned long, end, next_page);
1049 cur_pages = (pre_end - start) >> PAGE_SHIFT;
1050 cur_pages = min_t(int, (int)cpa->numpages, cur_pages);
1052 pud = pud_offset(p4d, start);
1058 if (alloc_pmd_page(pud))
1061 cur_pages = populate_pmd(cpa, start, pre_end, cur_pages,
1069 /* We mapped them all? */
1070 if (cpa->numpages == cur_pages)
1073 pud = pud_offset(p4d, start);
1074 pud_pgprot = pgprot_4k_2_large(pgprot);
1077 * Map everything starting from the Gb boundary, possibly with 1G pages
1079 while (boot_cpu_has(X86_FEATURE_GBPAGES) && end - start >= PUD_SIZE) {
1080 set_pud(pud, __pud(cpa->pfn << PAGE_SHIFT | _PAGE_PSE |
1081 massage_pgprot(pud_pgprot)));
1084 cpa->pfn += PUD_SIZE >> PAGE_SHIFT;
1085 cur_pages += PUD_SIZE >> PAGE_SHIFT;
1089 /* Map trailing leftover */
1093 pud = pud_offset(p4d, start);
1095 if (alloc_pmd_page(pud))
1098 tmp = populate_pmd(cpa, start, end, cpa->numpages - cur_pages,
1109 * Restrictions for kernel page table do not necessarily apply when mapping in
1112 static int populate_pgd(struct cpa_data *cpa, unsigned long addr)
1114 pgprot_t pgprot = __pgprot(_KERNPG_TABLE);
1115 pud_t *pud = NULL; /* shut up gcc */
1120 pgd_entry = cpa->pgd + pgd_index(addr);
1122 if (pgd_none(*pgd_entry)) {
1123 p4d = (p4d_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1127 set_pgd(pgd_entry, __pgd(__pa(p4d) | _KERNPG_TABLE));
1131 * Allocate a PUD page and hand it down for mapping.
1133 p4d = p4d_offset(pgd_entry, addr);
1134 if (p4d_none(*p4d)) {
1135 pud = (pud_t *)get_zeroed_page(GFP_KERNEL | __GFP_NOTRACK);
1139 set_p4d(p4d, __p4d(__pa(pud) | _KERNPG_TABLE));
1142 pgprot_val(pgprot) &= ~pgprot_val(cpa->mask_clr);
1143 pgprot_val(pgprot) |= pgprot_val(cpa->mask_set);
1145 ret = populate_pud(cpa, addr, p4d, pgprot);
1148 * Leave the PUD page in place in case some other CPU or thread
1149 * already found it, but remove any useless entries we just
1152 unmap_pud_range(p4d, addr,
1153 addr + (cpa->numpages << PAGE_SHIFT));
1157 cpa->numpages = ret;
1161 static int __cpa_process_fault(struct cpa_data *cpa, unsigned long vaddr,
1166 * Right now, we only execute this code path when mapping
1167 * the EFI virtual memory map regions, no other users
1168 * provide a ->pgd value. This may change in the future.
1170 return populate_pgd(cpa, vaddr);
1174 * Ignore all non primary paths.
1182 * Ignore the NULL PTE for kernel identity mapping, as it is expected
1184 * Also set numpages to '1' indicating that we processed cpa req for
1185 * one virtual address page and its pfn. TBD: numpages can be set based
1186 * on the initial value and the level returned by lookup_address().
1188 if (within(vaddr, PAGE_OFFSET,
1189 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT))) {
1191 cpa->pfn = __pa(vaddr) >> PAGE_SHIFT;
1194 WARN(1, KERN_WARNING "CPA: called for zero pte. "
1195 "vaddr = %lx cpa->vaddr = %lx\n", vaddr,
1202 static int __change_page_attr(struct cpa_data *cpa, int primary)
1204 unsigned long address;
1207 pte_t *kpte, old_pte;
1209 if (cpa->flags & CPA_PAGES_ARRAY) {
1210 struct page *page = cpa->pages[cpa->curpage];
1211 if (unlikely(PageHighMem(page)))
1213 address = (unsigned long)page_address(page);
1214 } else if (cpa->flags & CPA_ARRAY)
1215 address = cpa->vaddr[cpa->curpage];
1217 address = *cpa->vaddr;
1219 kpte = _lookup_address_cpa(cpa, address, &level);
1221 return __cpa_process_fault(cpa, address, primary);
1224 if (pte_none(old_pte))
1225 return __cpa_process_fault(cpa, address, primary);
1227 if (level == PG_LEVEL_4K) {
1229 pgprot_t new_prot = pte_pgprot(old_pte);
1230 unsigned long pfn = pte_pfn(old_pte);
1232 pgprot_val(new_prot) &= ~pgprot_val(cpa->mask_clr);
1233 pgprot_val(new_prot) |= pgprot_val(cpa->mask_set);
1235 new_prot = static_protections(new_prot, address, pfn);
1238 * Set the GLOBAL flags only if the PRESENT flag is
1239 * set otherwise pte_present will return true even on
1240 * a non present pte. The canon_pgprot will clear
1241 * _PAGE_GLOBAL for the ancient hardware that doesn't
1244 if (pgprot_val(new_prot) & _PAGE_PRESENT)
1245 pgprot_val(new_prot) |= _PAGE_GLOBAL;
1247 pgprot_val(new_prot) &= ~_PAGE_GLOBAL;
1250 * We need to keep the pfn from the existing PTE,
1251 * after all we're only going to change it's attributes
1252 * not the memory it points to
1254 new_pte = pfn_pte(pfn, canon_pgprot(new_prot));
1257 * Do we really change anything ?
1259 if (pte_val(old_pte) != pte_val(new_pte)) {
1260 set_pte_atomic(kpte, new_pte);
1261 cpa->flags |= CPA_FLUSHTLB;
1268 * Check, whether we can keep the large page intact
1269 * and just change the pte:
1271 do_split = try_preserve_large_page(kpte, address, cpa);
1273 * When the range fits into the existing large page,
1274 * return. cp->numpages and cpa->tlbflush have been updated in
1281 * We have to split the large page:
1283 err = split_large_page(cpa, kpte, address);
1286 * Do a global flush tlb after splitting the large page
1287 * and before we do the actual change page attribute in the PTE.
1289 * With out this, we violate the TLB application note, that says
1290 * "The TLBs may contain both ordinary and large-page
1291 * translations for a 4-KByte range of linear addresses. This
1292 * may occur if software modifies the paging structures so that
1293 * the page size used for the address range changes. If the two
1294 * translations differ with respect to page frame or attributes
1295 * (e.g., permissions), processor behavior is undefined and may
1296 * be implementation-specific."
1298 * We do this global tlb flush inside the cpa_lock, so that we
1299 * don't allow any other cpu, with stale tlb entries change the
1300 * page attribute in parallel, that also falls into the
1301 * just split large page entry.
1310 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias);
1312 static int cpa_process_alias(struct cpa_data *cpa)
1314 struct cpa_data alias_cpa;
1315 unsigned long laddr = (unsigned long)__va(cpa->pfn << PAGE_SHIFT);
1316 unsigned long vaddr;
1319 if (!pfn_range_is_mapped(cpa->pfn, cpa->pfn + 1))
1323 * No need to redo, when the primary call touched the direct
1326 if (cpa->flags & CPA_PAGES_ARRAY) {
1327 struct page *page = cpa->pages[cpa->curpage];
1328 if (unlikely(PageHighMem(page)))
1330 vaddr = (unsigned long)page_address(page);
1331 } else if (cpa->flags & CPA_ARRAY)
1332 vaddr = cpa->vaddr[cpa->curpage];
1334 vaddr = *cpa->vaddr;
1336 if (!(within(vaddr, PAGE_OFFSET,
1337 PAGE_OFFSET + (max_pfn_mapped << PAGE_SHIFT)))) {
1340 alias_cpa.vaddr = &laddr;
1341 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1343 ret = __change_page_attr_set_clr(&alias_cpa, 0);
1348 #ifdef CONFIG_X86_64
1350 * If the primary call didn't touch the high mapping already
1351 * and the physical address is inside the kernel map, we need
1352 * to touch the high mapped kernel as well:
1354 if (!within(vaddr, (unsigned long)_text, _brk_end) &&
1355 within_inclusive(cpa->pfn, highmap_start_pfn(),
1356 highmap_end_pfn())) {
1357 unsigned long temp_cpa_vaddr = (cpa->pfn << PAGE_SHIFT) +
1358 __START_KERNEL_map - phys_base;
1360 alias_cpa.vaddr = &temp_cpa_vaddr;
1361 alias_cpa.flags &= ~(CPA_PAGES_ARRAY | CPA_ARRAY);
1364 * The high mapping range is imprecise, so ignore the
1367 __change_page_attr_set_clr(&alias_cpa, 0);
1374 static int __change_page_attr_set_clr(struct cpa_data *cpa, int checkalias)
1376 unsigned long numpages = cpa->numpages;
1381 * Store the remaining nr of pages for the large page
1382 * preservation check.
1384 cpa->numpages = numpages;
1385 /* for array changes, we can't use large page */
1386 if (cpa->flags & (CPA_ARRAY | CPA_PAGES_ARRAY))
1389 if (!debug_pagealloc_enabled())
1390 spin_lock(&cpa_lock);
1391 ret = __change_page_attr(cpa, checkalias);
1392 if (!debug_pagealloc_enabled())
1393 spin_unlock(&cpa_lock);
1398 ret = cpa_process_alias(cpa);
1404 * Adjust the number of pages with the result of the
1405 * CPA operation. Either a large page has been
1406 * preserved or a single page update happened.
1408 BUG_ON(cpa->numpages > numpages || !cpa->numpages);
1409 numpages -= cpa->numpages;
1410 if (cpa->flags & (CPA_PAGES_ARRAY | CPA_ARRAY))
1413 *cpa->vaddr += cpa->numpages * PAGE_SIZE;
1419 static int change_page_attr_set_clr(unsigned long *addr, int numpages,
1420 pgprot_t mask_set, pgprot_t mask_clr,
1421 int force_split, int in_flag,
1422 struct page **pages)
1424 struct cpa_data cpa;
1425 int ret, cache, checkalias;
1426 unsigned long baddr = 0;
1428 memset(&cpa, 0, sizeof(cpa));
1431 * Check, if we are requested to change a not supported
1434 mask_set = canon_pgprot(mask_set);
1435 mask_clr = canon_pgprot(mask_clr);
1436 if (!pgprot_val(mask_set) && !pgprot_val(mask_clr) && !force_split)
1439 /* Ensure we are PAGE_SIZE aligned */
1440 if (in_flag & CPA_ARRAY) {
1442 for (i = 0; i < numpages; i++) {
1443 if (addr[i] & ~PAGE_MASK) {
1444 addr[i] &= PAGE_MASK;
1448 } else if (!(in_flag & CPA_PAGES_ARRAY)) {
1450 * in_flag of CPA_PAGES_ARRAY implies it is aligned.
1451 * No need to cehck in that case
1453 if (*addr & ~PAGE_MASK) {
1456 * People should not be passing in unaligned addresses:
1461 * Save address for cache flush. *addr is modified in the call
1462 * to __change_page_attr_set_clr() below.
1467 /* Must avoid aliasing mappings in the highmem code */
1468 kmap_flush_unused();
1474 cpa.numpages = numpages;
1475 cpa.mask_set = mask_set;
1476 cpa.mask_clr = mask_clr;
1479 cpa.force_split = force_split;
1481 if (in_flag & (CPA_ARRAY | CPA_PAGES_ARRAY))
1482 cpa.flags |= in_flag;
1484 /* No alias checking for _NX bit modifications */
1485 checkalias = (pgprot_val(mask_set) | pgprot_val(mask_clr)) != _PAGE_NX;
1487 ret = __change_page_attr_set_clr(&cpa, checkalias);
1490 * Check whether we really changed something:
1492 if (!(cpa.flags & CPA_FLUSHTLB))
1496 * No need to flush, when we did not set any of the caching
1499 cache = !!pgprot2cachemode(mask_set);
1502 * On success we use CLFLUSH, when the CPU supports it to
1503 * avoid the WBINVD. If the CPU does not support it and in the
1504 * error case we fall back to cpa_flush_all (which uses
1507 if (!ret && boot_cpu_has(X86_FEATURE_CLFLUSH)) {
1508 if (cpa.flags & (CPA_PAGES_ARRAY | CPA_ARRAY)) {
1509 cpa_flush_array(addr, numpages, cache,
1512 cpa_flush_range(baddr, numpages, cache);
1514 cpa_flush_all(cache);
1520 static inline int change_page_attr_set(unsigned long *addr, int numpages,
1521 pgprot_t mask, int array)
1523 return change_page_attr_set_clr(addr, numpages, mask, __pgprot(0), 0,
1524 (array ? CPA_ARRAY : 0), NULL);
1527 static inline int change_page_attr_clear(unsigned long *addr, int numpages,
1528 pgprot_t mask, int array)
1530 return change_page_attr_set_clr(addr, numpages, __pgprot(0), mask, 0,
1531 (array ? CPA_ARRAY : 0), NULL);
1534 static inline int cpa_set_pages_array(struct page **pages, int numpages,
1537 return change_page_attr_set_clr(NULL, numpages, mask, __pgprot(0), 0,
1538 CPA_PAGES_ARRAY, pages);
1541 static inline int cpa_clear_pages_array(struct page **pages, int numpages,
1544 return change_page_attr_set_clr(NULL, numpages, __pgprot(0), mask, 0,
1545 CPA_PAGES_ARRAY, pages);
1548 int _set_memory_uc(unsigned long addr, int numpages)
1551 * for now UC MINUS. see comments in ioremap_nocache()
1552 * If you really need strong UC use ioremap_uc(), but note
1553 * that you cannot override IO areas with set_memory_*() as
1554 * these helpers cannot work with IO memory.
1556 return change_page_attr_set(&addr, numpages,
1557 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1561 int set_memory_uc(unsigned long addr, int numpages)
1566 * for now UC MINUS. see comments in ioremap_nocache()
1568 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1569 _PAGE_CACHE_MODE_UC_MINUS, NULL);
1573 ret = _set_memory_uc(addr, numpages);
1580 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1584 EXPORT_SYMBOL(set_memory_uc);
1586 static int _set_memory_array(unsigned long *addr, int addrinarray,
1587 enum page_cache_mode new_type)
1589 enum page_cache_mode set_type;
1593 for (i = 0; i < addrinarray; i++) {
1594 ret = reserve_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE,
1600 /* If WC, set to UC- first and then WC */
1601 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1602 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1604 ret = change_page_attr_set(addr, addrinarray,
1605 cachemode2pgprot(set_type), 1);
1607 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1608 ret = change_page_attr_set_clr(addr, addrinarray,
1610 _PAGE_CACHE_MODE_WC),
1611 __pgprot(_PAGE_CACHE_MASK),
1612 0, CPA_ARRAY, NULL);
1619 for (j = 0; j < i; j++)
1620 free_memtype(__pa(addr[j]), __pa(addr[j]) + PAGE_SIZE);
1625 int set_memory_array_uc(unsigned long *addr, int addrinarray)
1627 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1629 EXPORT_SYMBOL(set_memory_array_uc);
1631 int set_memory_array_wc(unsigned long *addr, int addrinarray)
1633 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WC);
1635 EXPORT_SYMBOL(set_memory_array_wc);
1637 int set_memory_array_wt(unsigned long *addr, int addrinarray)
1639 return _set_memory_array(addr, addrinarray, _PAGE_CACHE_MODE_WT);
1641 EXPORT_SYMBOL_GPL(set_memory_array_wt);
1643 int _set_memory_wc(unsigned long addr, int numpages)
1646 unsigned long addr_copy = addr;
1648 ret = change_page_attr_set(&addr, numpages,
1649 cachemode2pgprot(_PAGE_CACHE_MODE_UC_MINUS),
1652 ret = change_page_attr_set_clr(&addr_copy, numpages,
1654 _PAGE_CACHE_MODE_WC),
1655 __pgprot(_PAGE_CACHE_MASK),
1661 int set_memory_wc(unsigned long addr, int numpages)
1665 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1666 _PAGE_CACHE_MODE_WC, NULL);
1670 ret = _set_memory_wc(addr, numpages);
1672 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1676 EXPORT_SYMBOL(set_memory_wc);
1678 int _set_memory_wt(unsigned long addr, int numpages)
1680 return change_page_attr_set(&addr, numpages,
1681 cachemode2pgprot(_PAGE_CACHE_MODE_WT), 0);
1684 int set_memory_wt(unsigned long addr, int numpages)
1688 ret = reserve_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE,
1689 _PAGE_CACHE_MODE_WT, NULL);
1693 ret = _set_memory_wt(addr, numpages);
1695 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1699 EXPORT_SYMBOL_GPL(set_memory_wt);
1701 int _set_memory_wb(unsigned long addr, int numpages)
1703 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1704 return change_page_attr_clear(&addr, numpages,
1705 __pgprot(_PAGE_CACHE_MASK), 0);
1708 int set_memory_wb(unsigned long addr, int numpages)
1712 ret = _set_memory_wb(addr, numpages);
1716 free_memtype(__pa(addr), __pa(addr) + numpages * PAGE_SIZE);
1719 EXPORT_SYMBOL(set_memory_wb);
1721 int set_memory_array_wb(unsigned long *addr, int addrinarray)
1726 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1727 ret = change_page_attr_clear(addr, addrinarray,
1728 __pgprot(_PAGE_CACHE_MASK), 1);
1732 for (i = 0; i < addrinarray; i++)
1733 free_memtype(__pa(addr[i]), __pa(addr[i]) + PAGE_SIZE);
1737 EXPORT_SYMBOL(set_memory_array_wb);
1739 int set_memory_x(unsigned long addr, int numpages)
1741 if (!(__supported_pte_mask & _PAGE_NX))
1744 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_NX), 0);
1746 EXPORT_SYMBOL(set_memory_x);
1748 int set_memory_nx(unsigned long addr, int numpages)
1750 if (!(__supported_pte_mask & _PAGE_NX))
1753 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_NX), 0);
1755 EXPORT_SYMBOL(set_memory_nx);
1757 int set_memory_ro(unsigned long addr, int numpages)
1759 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_RW), 0);
1762 int set_memory_rw(unsigned long addr, int numpages)
1764 return change_page_attr_set(&addr, numpages, __pgprot(_PAGE_RW), 0);
1767 int set_memory_np(unsigned long addr, int numpages)
1769 return change_page_attr_clear(&addr, numpages, __pgprot(_PAGE_PRESENT), 0);
1772 int set_memory_4k(unsigned long addr, int numpages)
1774 return change_page_attr_set_clr(&addr, numpages, __pgprot(0),
1775 __pgprot(0), 1, 0, NULL);
1778 int set_pages_uc(struct page *page, int numpages)
1780 unsigned long addr = (unsigned long)page_address(page);
1782 return set_memory_uc(addr, numpages);
1784 EXPORT_SYMBOL(set_pages_uc);
1786 static int _set_pages_array(struct page **pages, int addrinarray,
1787 enum page_cache_mode new_type)
1789 unsigned long start;
1791 enum page_cache_mode set_type;
1796 for (i = 0; i < addrinarray; i++) {
1797 if (PageHighMem(pages[i]))
1799 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1800 end = start + PAGE_SIZE;
1801 if (reserve_memtype(start, end, new_type, NULL))
1805 /* If WC, set to UC- first and then WC */
1806 set_type = (new_type == _PAGE_CACHE_MODE_WC) ?
1807 _PAGE_CACHE_MODE_UC_MINUS : new_type;
1809 ret = cpa_set_pages_array(pages, addrinarray,
1810 cachemode2pgprot(set_type));
1811 if (!ret && new_type == _PAGE_CACHE_MODE_WC)
1812 ret = change_page_attr_set_clr(NULL, addrinarray,
1814 _PAGE_CACHE_MODE_WC),
1815 __pgprot(_PAGE_CACHE_MASK),
1816 0, CPA_PAGES_ARRAY, pages);
1819 return 0; /* Success */
1822 for (i = 0; i < free_idx; i++) {
1823 if (PageHighMem(pages[i]))
1825 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1826 end = start + PAGE_SIZE;
1827 free_memtype(start, end);
1832 int set_pages_array_uc(struct page **pages, int addrinarray)
1834 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_UC_MINUS);
1836 EXPORT_SYMBOL(set_pages_array_uc);
1838 int set_pages_array_wc(struct page **pages, int addrinarray)
1840 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WC);
1842 EXPORT_SYMBOL(set_pages_array_wc);
1844 int set_pages_array_wt(struct page **pages, int addrinarray)
1846 return _set_pages_array(pages, addrinarray, _PAGE_CACHE_MODE_WT);
1848 EXPORT_SYMBOL_GPL(set_pages_array_wt);
1850 int set_pages_wb(struct page *page, int numpages)
1852 unsigned long addr = (unsigned long)page_address(page);
1854 return set_memory_wb(addr, numpages);
1856 EXPORT_SYMBOL(set_pages_wb);
1858 int set_pages_array_wb(struct page **pages, int addrinarray)
1861 unsigned long start;
1865 /* WB cache mode is hard wired to all cache attribute bits being 0 */
1866 retval = cpa_clear_pages_array(pages, addrinarray,
1867 __pgprot(_PAGE_CACHE_MASK));
1871 for (i = 0; i < addrinarray; i++) {
1872 if (PageHighMem(pages[i]))
1874 start = page_to_pfn(pages[i]) << PAGE_SHIFT;
1875 end = start + PAGE_SIZE;
1876 free_memtype(start, end);
1881 EXPORT_SYMBOL(set_pages_array_wb);
1883 int set_pages_x(struct page *page, int numpages)
1885 unsigned long addr = (unsigned long)page_address(page);
1887 return set_memory_x(addr, numpages);
1889 EXPORT_SYMBOL(set_pages_x);
1891 int set_pages_nx(struct page *page, int numpages)
1893 unsigned long addr = (unsigned long)page_address(page);
1895 return set_memory_nx(addr, numpages);
1897 EXPORT_SYMBOL(set_pages_nx);
1899 int set_pages_ro(struct page *page, int numpages)
1901 unsigned long addr = (unsigned long)page_address(page);
1903 return set_memory_ro(addr, numpages);
1906 int set_pages_rw(struct page *page, int numpages)
1908 unsigned long addr = (unsigned long)page_address(page);
1910 return set_memory_rw(addr, numpages);
1913 #ifdef CONFIG_DEBUG_PAGEALLOC
1915 static int __set_pages_p(struct page *page, int numpages)
1917 unsigned long tempaddr = (unsigned long) page_address(page);
1918 struct cpa_data cpa = { .vaddr = &tempaddr,
1920 .numpages = numpages,
1921 .mask_set = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1922 .mask_clr = __pgprot(0),
1926 * No alias checking needed for setting present flag. otherwise,
1927 * we may need to break large pages for 64-bit kernel text
1928 * mappings (this adds to complexity if we want to do this from
1929 * atomic context especially). Let's keep it simple!
1931 return __change_page_attr_set_clr(&cpa, 0);
1934 static int __set_pages_np(struct page *page, int numpages)
1936 unsigned long tempaddr = (unsigned long) page_address(page);
1937 struct cpa_data cpa = { .vaddr = &tempaddr,
1939 .numpages = numpages,
1940 .mask_set = __pgprot(0),
1941 .mask_clr = __pgprot(_PAGE_PRESENT | _PAGE_RW),
1945 * No alias checking needed for setting not present flag. otherwise,
1946 * we may need to break large pages for 64-bit kernel text
1947 * mappings (this adds to complexity if we want to do this from
1948 * atomic context especially). Let's keep it simple!
1950 return __change_page_attr_set_clr(&cpa, 0);
1953 void __kernel_map_pages(struct page *page, int numpages, int enable)
1955 if (PageHighMem(page))
1958 debug_check_no_locks_freed(page_address(page),
1959 numpages * PAGE_SIZE);
1963 * The return value is ignored as the calls cannot fail.
1964 * Large pages for identity mappings are not used at boot time
1965 * and hence no memory allocations during large page split.
1968 __set_pages_p(page, numpages);
1970 __set_pages_np(page, numpages);
1973 * We should perform an IPI and flush all tlbs,
1974 * but that can deadlock->flush only current cpu:
1978 arch_flush_lazy_mmu_mode();
1981 #ifdef CONFIG_HIBERNATION
1983 bool kernel_page_present(struct page *page)
1988 if (PageHighMem(page))
1991 pte = lookup_address((unsigned long)page_address(page), &level);
1992 return (pte_val(*pte) & _PAGE_PRESENT);
1995 #endif /* CONFIG_HIBERNATION */
1997 #endif /* CONFIG_DEBUG_PAGEALLOC */
1999 int kernel_map_pages_in_pgd(pgd_t *pgd, u64 pfn, unsigned long address,
2000 unsigned numpages, unsigned long page_flags)
2002 int retval = -EINVAL;
2004 struct cpa_data cpa = {
2008 .numpages = numpages,
2009 .mask_set = __pgprot(0),
2010 .mask_clr = __pgprot(0),
2014 if (!(__supported_pte_mask & _PAGE_NX))
2017 if (!(page_flags & _PAGE_NX))
2018 cpa.mask_clr = __pgprot(_PAGE_NX);
2020 if (!(page_flags & _PAGE_RW))
2021 cpa.mask_clr = __pgprot(_PAGE_RW);
2023 cpa.mask_set = __pgprot(_PAGE_PRESENT | page_flags);
2025 retval = __change_page_attr_set_clr(&cpa, 0);
2033 * The testcases use internal knowledge of the implementation that shouldn't
2034 * be exposed to the rest of the kernel. Include these directly here.
2036 #ifdef CONFIG_CPA_DEBUG
2037 #include "pageattr-test.c"