3 * Rob Taylor, Flying Pig Systems. robt@flyingpig.com.
5 * SPDX-License-Identifier: GPL-2.0+
10 #include <asm/processor.h>
16 int sysControlDisplay(int digit, uchar ascii_code);
17 extern void Plx9030Init(void);
18 extern void SPD67290Init(void);
20 /* We have to clear the initial data area here. Couldn't have done it
21 * earlier because DRAM had not been initialized.
23 int board_early_init_f(void)
26 /* enable DUAL UART Mode on CPC45 */
27 *(uchar*)DUART_DCR |= 0x1; /* set DCM bit */
35 char revision = BOARD_REV;
37 ulong busfreq = get_bus_freq(0);
42 printf("Revision %d ", revision);
44 printf("Local Bus at %s MHz\n", strmhz(buf, busfreq));
49 phys_size_t initdram (int board_type)
51 int m, row, col, bank, i, ref;
52 unsigned long start, end;
53 uint32_t mccr1, mccr2;
54 uint32_t mear1 = 0, emear1 = 0, msar1 = 0, emsar1 = 0;
55 uint32_t mear2 = 0, emear2 = 0, msar2 = 0, emsar2 = 0;
59 i2c_init(CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
61 if (i2c_reg_read (0x50, 2) != 0x04)
62 return 0; /* Memory type */
64 m = i2c_reg_read (0x50, 5); /* # of physical banks */
65 row = i2c_reg_read (0x50, 3); /* # of rows */
66 col = i2c_reg_read (0x50, 4); /* # of columns */
67 bank = i2c_reg_read (0x50, 17); /* # of logical banks */
68 ref = i2c_reg_read (0x50, 12); /* refresh rate / type */
70 CONFIG_READ_WORD(MCCR1, mccr1);
73 CONFIG_READ_WORD(MCCR2, mccr2);
76 start = CONFIG_SYS_SDRAM_BASE;
77 end = start + (1 << (col + row + 3) ) * bank - 1;
79 for (i = 0; i < m; i++) {
80 mccr1 |= ((row == 13)? 2 : (bank == 4)? 0 : 3) << i * 2;
82 msar1 |= ((start >> 20) & 0xff) << i * 8;
83 emsar1 |= ((start >> 28) & 0xff) << i * 8;
84 mear1 |= ((end >> 20) & 0xff) << i * 8;
85 emear1 |= ((end >> 28) & 0xff) << i * 8;
87 msar2 |= ((start >> 20) & 0xff) << (i-4) * 8;
88 emsar2 |= ((start >> 28) & 0xff) << (i-4) * 8;
89 mear2 |= ((end >> 20) & 0xff) << (i-4) * 8;
90 emear2 |= ((end >> 28) & 0xff) << (i-4) * 8;
93 start += (1 << (col + row + 3) ) * bank;
94 end += (1 << (col + row + 3) ) * bank;
98 msar1 |= 0xff << i * 8;
99 emsar1 |= 0x30 << i * 8;
100 mear1 |= 0xff << i * 8;
101 emear1 |= 0x30 << i * 8;
103 msar2 |= 0xff << (i-4) * 8;
104 emsar2 |= 0x30 << (i-4) * 8;
105 mear2 |= 0xff << (i-4) * 8;
106 emear2 |= 0x30 << (i-4) * 8;
113 tmp = get_bus_freq(0) / 1000000 * 15625 / 1000 - 22;
117 tmp = get_bus_freq(0) / 1000000 * 3900 / 1000 - 22;
121 tmp = get_bus_freq(0) / 1000000 * 7800 / 1000 - 22;
125 tmp = get_bus_freq(0) / 1000000 * 31300 / 1000 - 22;
129 tmp = get_bus_freq(0) / 1000000 * 62500 / 1000 - 22;
133 tmp = get_bus_freq(0) / 1000000 * 125000 / 1000 - 22;
140 CONFIG_WRITE_WORD(MCCR1, mccr1);
141 CONFIG_WRITE_WORD(MCCR2, tmp << MCCR2_REFINT_SHIFT);
142 CONFIG_WRITE_WORD(MSAR1, msar1);
143 CONFIG_WRITE_WORD(EMSAR1, emsar1);
144 CONFIG_WRITE_WORD(MEAR1, mear1);
145 CONFIG_WRITE_WORD(EMEAR1, emear1);
146 CONFIG_WRITE_WORD(MSAR2, msar2);
147 CONFIG_WRITE_WORD(EMSAR2, emsar2);
148 CONFIG_WRITE_WORD(MEAR2, mear2);
149 CONFIG_WRITE_WORD(EMEAR2, emear2);
150 CONFIG_WRITE_BYTE(MBER, mber);
152 return (1 << (col + row + 3) ) * bank * m;
157 * Initialize PCI Devices, report devices found.
160 static struct pci_config_table pci_cpc45_config_table[] = {
161 #ifndef CONFIG_PCI_PNP
162 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0F, PCI_ANY_ID,
163 pci_cfgfunc_config_device, { PCI_ENET0_IOADDR,
165 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
166 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0D, PCI_ANY_ID,
167 pci_cfgfunc_config_device, { PCI_PLX9030_IOADDR,
169 PCI_COMMAND_MEMORY | PCI_COMMAND_MASTER }},
170 { PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, PCI_ANY_ID, 0x0E, PCI_ANY_ID,
171 pci_cfgfunc_config_device, { PCMCIA_IO_BASE,
173 PCI_COMMAND_MEMORY | PCI_COMMAND_IO }},
174 #endif /*CONFIG_PCI_PNP*/
178 struct pci_controller hose = {
179 #ifndef CONFIG_PCI_PNP
180 config_table: pci_cpc45_config_table,
184 void pci_init_board(void)
186 pci_mpc824x_init(&hose);
188 /* init PCI_to_LOCAL Bus BRIDGE */
194 sysControlDisplay(0,' ');
195 sysControlDisplay(1,'C');
196 sysControlDisplay(2,'P');
197 sysControlDisplay(3,'C');
198 sysControlDisplay(4,' ');
199 sysControlDisplay(5,'4');
200 sysControlDisplay(6,'5');
201 sysControlDisplay(7,' ');
205 /**************************************************************************
207 * sysControlDisplay - controls one of the Alphanum. Display digits.
209 * This routine will write an ASCII character to the display digit requested.
216 int sysControlDisplay (int digit, /* number of digit 0..7 */
217 uchar ascii_code /* ASCII code */
220 if ((digit < 0) || (digit > 7))
223 *((volatile uchar *) (DISP_CHR_RAM + digit)) = ascii_code;
228 #if defined(CONFIG_CMD_PCMCIA)
230 #ifdef CONFIG_SYS_PCMCIA_MEM_ADDR
231 volatile unsigned char *pcmcia_mem = (unsigned char*)CONFIG_SYS_PCMCIA_MEM_ADDR;
234 int pcmcia_init(void)
238 debug ("Enable PCMCIA " PCMCIA_SLOT_MSG "\n");
247 int board_eth_init(bd_t *bis)
249 return pci_eth_init(bis);