2 * Copyright (C) 2011 Lothar Waßmann <LW@KARO-electronics.de>
3 * based on: board/freesclae/mx28_evk.c (C) 2010 Freescale Semiconductor, Inc.
5 * See file CREDITS for list of people who contributed to this
8 * This program is free software; you can redistribute it and/or
9 * modify it under the terms of the GNU General Public License as
10 * published by the Free Software Foundation; either version 2 of
11 * the License, or (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 * GNU General Public License for more details.
18 * You should have received a copy of the GNU General Public License
19 * along with this program; if not, write to the Free Software
20 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
28 #include <asm/arch/iomux-mx28.h>
29 #include <asm/arch/imx-regs.h>
30 #include <asm/arch/regs-pinctrl.h>
31 #include <asm/arch/regs-clkctrl.h>
32 #include <asm/arch/regs-ocotp.h>
33 #include <asm/arch/sys_proto.h>
36 #include <imx_ssp_mmc.h>
38 /* This should be removed after it's added into mach-types.h */
40 static const int mach_type = MACH_TYPE_TX28;
42 DECLARE_GLOBAL_DATA_PTR;
44 #ifdef CONFIG_IMX_SSP_MMC
46 static iomux_cfg_t mmc0_pads[] = {
47 MX28_PAD_SSP0_DATA0__SSP0_D0,
48 MX28_PAD_SSP0_DATA1__SSP0_D1,
49 MX28_PAD_SSP0_DATA2__SSP0_D2,
50 MX28_PAD_SSP0_DATA3__SSP0_D3,
51 MX28_PAD_SSP0_DATA4__SSP0_D4,
52 MX28_PAD_SSP0_DATA5__SSP0_D5,
53 MX28_PAD_SSP0_DATA6__SSP0_D6,
54 MX28_PAD_SSP0_DATA7__SSP0_D7,
55 MX28_PAD_SSP0_CMD__SSP0_CMD,
56 MX28_PAD_SSP0_DETECT__SSP0_CARD_DETECT,
57 MX28_PAD_SSP0_SCK__SSP0_SCK,
62 static iomux_cfg_t enet_pads[] = {
63 MX28_PAD_PWM4__GPIO_3_29,
64 MX28_PAD_ENET0_RX_CLK__GPIO_4_13,
65 MX28_PAD_ENET0_MDC__ENET0_MDC,
66 MX28_PAD_ENET0_MDIO__ENET0_MDIO,
67 MX28_PAD_ENET0_RX_EN__ENET0_RX_EN,
68 MX28_PAD_ENET0_RXD0__ENET0_RXD0,
69 MX28_PAD_ENET0_RXD1__ENET0_RXD1,
70 MX28_PAD_ENET0_TX_EN__ENET0_TX_EN,
71 MX28_PAD_ENET0_TXD0__ENET0_TXD0,
72 MX28_PAD_ENET0_TXD1__ENET0_TXD1,
73 MX28_PAD_ENET_CLK__CLKCTRL_ENET,
76 static iomux_cfg_t duart_pads[] = {
77 MX28_PAD_PWM0__GPIO_3_16,
78 MX28_PAD_PWM1__GPIO_3_17,
79 MX28_PAD_I2C0_SCL__GPIO_3_24,
80 MX28_PAD_I2C0_SDA__GPIO_3_25,
82 MX28_PAD_AUART0_RTS__AUART0_RTS,
83 MX28_PAD_AUART0_CTS__AUART0_CTS,
84 MX28_PAD_AUART0_TX__AUART0_TX,
85 MX28_PAD_AUART0_RX__AUART0_RX,
88 static iomux_cfg_t gpmi_pads[] = {
89 MX28_PAD_GPMI_D00__GPMI_D0,
90 MX28_PAD_GPMI_D01__GPMI_D1,
91 MX28_PAD_GPMI_D02__GPMI_D2,
92 MX28_PAD_GPMI_D03__GPMI_D3,
93 MX28_PAD_GPMI_D04__GPMI_D4,
94 MX28_PAD_GPMI_D05__GPMI_D5,
95 MX28_PAD_GPMI_D06__GPMI_D6,
96 MX28_PAD_GPMI_D07__GPMI_D7,
97 MX28_PAD_GPMI_CE0N__GPMI_CE0N,
98 MX28_PAD_GPMI_RDY0__GPMI_READY0,
99 MX28_PAD_GPMI_RDN__GPMI_RDN,
100 MX28_PAD_GPMI_WRN__GPMI_WRN,
101 MX28_PAD_GPMI_ALE__GPMI_ALE,
102 MX28_PAD_GPMI_CLE__GPMI_CLE,
103 MX28_PAD_GPMI_RESETN__GPMI_RESETN,
109 static void duart_init(void)
111 mx28_common_spl_init(&duart_pads, ARRAY_SIZE(duart_pads));
116 gd->bd->bi_arch_number = mach_type;
118 /* Address of boot parameters */
119 gd->bd->bi_boot_params = PHYS_SDRAM_1 + 0x1000;
127 gd->bd->bi_dram[0].start = PHYS_SDRAM_1;
128 gd->bd->bi_dram[0].size = PHYS_SDRAM_1_SIZE;
133 #ifdef CONFIG_DYNAMIC_MMC_DEVNO
134 int get_mmc_env_devno(void)
136 unsigned long global_boot_mode;
138 global_boot_mode = REG_RD_ADDR(GLOBAL_BOOT_MODE_ADDR);
139 return ((global_boot_mode & 0xf) == BOOT_MODE_SD1) ? 1 : 0;
143 #if defined(CONFIG_MXC_FEC) && defined(CONFIG_GET_FEC_MAC_ADDR_FROM_IIM)
144 int fec_get_mac_addr(unsigned char *mac)
148 struct mx28_ocotp_regs *ocotp_regs =
149 (struct mx28_ocotp_regs *)MXS_OCOTP_BASE;
151 /* set this bit to open the OTP banks for reading */
152 writel(OCOTP_CTRL_RD_BANK_OPEN,
153 ocotp_regs->hw_ocotp_ctrl_set);
155 /* wait until OTP contents are readable */
156 while (OCOTP_CTRL_BUSY & readl(ocotp_regs->hw_ocotp_ctrl)) {
162 val = readl(ocotp_regs->hw_ocotp_cust0);
163 mac[0] = (val >> 24) & 0xFF;
164 mac[1] = (val >> 16) & 0xFF;
165 mac[2] = (val >> 8) & 0xFF;
166 mac[3] = (val >> 0) & 0xFF;
167 val = readl(ocotp_regs->hw_ocotp_cust1);
168 mac[4] = (val >> 24) & 0xFF;
169 mac[5] = (val >> 16) & 0xFF;
175 void enet_board_init(void)
177 /* Set up ENET pins */
178 mx28_common_spl_init(&enet_pads, ARRAY_SIZE(enet_pads));
180 /* Power on the external phy */
181 gpio_direction_output(MX28_PAD_PWM4__GPIO_3_29, 1);
183 /* Reset the external phy */
184 gpio_direction_output(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 1);
186 gpio_set_value(MX28_PAD_ENET0_RX_CLK__GPIO_4_13, 0);
189 #ifdef CONFIG_MXS_NAND
190 #include <linux/mtd/nand.h>
191 extern int mxs_gpmi_nand_init(struct mtd_info *mtd, struct nand_chip *chip);
193 int board_nand_init(struct mtd_info *mtd, struct nand_chip *chip)
195 mx28_common_spl_init(&gpmi_pads, ARRAY_SIZE(gpmi_pads));
196 return mxs_gpmi_nand_init(mtd, chip);
202 printf("Board: Ka-Ro TX28\n");