2 * Copyright (C) 2014 Lothar Waßmann <LW@KARO-electronics.de>
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License
9 * version 2 as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
24 #define LTC3676_BUCK1 0x01
25 #define LTC3676_BUCK2 0x02
26 #define LTC3676_BUCK3 0x03
27 #define LTC3676_BUCK4 0x04
28 #define LTC3676_DVB1A 0x0A
29 #define LTC3676_DVB1B 0x0B
30 #define LTC3676_DVB2A 0x0C
31 #define LTC3676_DVB2B 0x0D
32 #define LTC3676_DVB3A 0x0E
33 #define LTC3676_DVB3B 0x0F
34 #define LTC3676_DVB4A 0x10
35 #define LTC3676_DVB4B 0x11
36 #define LTC3676_MSKPG 0x13
37 #define LTC3676_CLIRQ 0x1f
39 #define LTC3676_BUCK_DVDT_FAST (1 << 0)
40 #define LTC3676_BUCK_KEEP_ALIVE (1 << 1)
41 #define LTC3676_BUCK_CLK_RATE_LOW (1 << 2)
42 #define LTC3676_BUCK_PHASE_SEL (1 << 3)
43 #define LTC3676_BUCK_ENABLE_300 (1 << 4)
44 #define LTC3676_BUCK_PULSE_SKIP (0 << 5)
45 #define LTC3676_BUCK_BURST_MODE (1 << 5)
46 #define LTC3676_BUCK_CONTINUOUS (2 << 5)
47 #define LTC3676_BUCK_ENABLE (1 << 7)
49 #define LTC3676_PGOOD_MASK (1 << 5)
51 #define LTC3676_MSKPG_BUCK1 (1 << 0)
52 #define LTC3676_MSKPG_BUCK2 (1 << 1)
53 #define LTC3676_MSKPG_BUCK3 (1 << 2)
54 #define LTC3676_MSKPG_BUCK4 (1 << 3)
55 #define LTC3676_MSKPG_LDO2 (1 << 5)
56 #define LTC3676_MSKPG_LDO3 (1 << 6)
57 #define LTC3676_MSKPG_LDO4 (1 << 7)
59 #define VDD_IO_VAL mV_to_regval(vout_to_vref(3300 * 10, 5))
60 #define VDD_IO_VAL_LP mV_to_regval(vout_to_vref(3100 * 10, 5))
61 #define VDD_IO_VAL_2 mV_to_regval(vout_to_vref(3300 * 10, 5_2))
62 #define VDD_IO_VAL_2_LP mV_to_regval(vout_to_vref(3100 * 10, 5_2))
63 #define VDD_SOC_VAL mV_to_regval(vout_to_vref(1425 * 10, 6))
64 #define VDD_SOC_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 6))
65 #define VDD_DDR_VAL mV_to_regval(vout_to_vref(1500 * 10, 7))
66 #define VDD_DDR_VAL_LP mV_to_regval(vout_to_vref(1500 * 10, 7))
67 #define VDD_CORE_VAL mV_to_regval(vout_to_vref(1425 * 10, 8))
68 #define VDD_CORE_VAL_LP mV_to_regval(vout_to_vref(900 * 10, 8))
91 /* calculate voltages in 10mV */
92 #define R1(idx) R1_##idx
93 #define R2(idx) R2_##idx
95 #define vout_to_vref(vout, idx) ((vout) * R2(idx) / (R1(idx) + R2(idx)))
96 #define vref_to_vout(vref, idx) DIV_ROUND_UP((vref) * (R1(idx) + R2(idx)), R2(idx))
98 #define mV_to_regval(mV) DIV_ROUND(((((mV) < 4125) ? 4125 : (mV)) - 4125), 125)
99 #define regval_to_mV(v) (((v) * 125 + 4125))
101 static struct ltc3676_regs {
106 { LTC3676_MSKPG, ~LTC3676_MSKPG_BUCK1, },
107 { LTC3676_DVB2B, VDD_SOC_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
108 { LTC3676_DVB3B, VDD_DDR_VAL_LP, ~0x3f, },
109 { LTC3676_DVB4B, VDD_CORE_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
110 { LTC3676_DVB2A, VDD_SOC_VAL, ~0x3f, },
111 { LTC3676_DVB3A, VDD_DDR_VAL, ~0x3f, },
112 { LTC3676_DVB4A, VDD_CORE_VAL, ~0x3f, },
113 { LTC3676_BUCK1, LTC3676_BUCK_BURST_MODE | LTC3676_BUCK_CLK_RATE_LOW, },
114 { LTC3676_BUCK2, LTC3676_BUCK_BURST_MODE, },
115 { LTC3676_BUCK3, LTC3676_BUCK_BURST_MODE, },
116 { LTC3676_BUCK4, LTC3676_BUCK_BURST_MODE, },
117 { LTC3676_CLIRQ, 0, }, /* clear interrupt status */
120 static struct ltc3676_regs ltc3676_regs_1[] = {
121 { LTC3676_DVB1B, VDD_IO_VAL_LP | LTC3676_PGOOD_MASK, ~0x3f, },
122 { LTC3676_DVB1A, VDD_IO_VAL, ~0x3f, },
125 static struct ltc3676_regs ltc3676_regs_2[] = {
126 { LTC3676_DVB1B, VDD_IO_VAL_2_LP | LTC3676_PGOOD_MASK, ~0x3f, },
127 { LTC3676_DVB1A, VDD_IO_VAL_2, ~0x3f, },
130 static int tx6_rev_2(void)
132 struct ocotp_regs *ocotp = (struct ocotp_regs *)OCOTP_BASE_ADDR;
133 struct fuse_bank5_regs *fuse = (void *)ocotp->bank[5].fuse_regs;
134 u32 pad_settings = readl(&fuse->pad_settings);
136 debug("Fuse pad_settings @ %p = %02x\n",
137 &fuse->pad_settings, pad_settings);
138 return pad_settings & 1;
141 static int ltc3676_setup_regs(uchar slave_addr, struct ltc3676_regs *r,
147 for (i = 0; i < count; i++, r++) {
151 ret = i2c_read(slave_addr, r->addr, 1, &value, 1);
152 if ((value & ~r->mask) != r->val) {
153 printf("Changing PMIC reg %02x from %02x to %02x\n",
154 r->addr, value, r->val);
157 printf("%s: failed to read PMIC register %02x: %d\n",
158 __func__, r->addr, ret);
162 ret = i2c_write(slave_addr, r->addr, 1, &r->val, 1);
164 printf("%s: failed to write PMIC register %02x: %d\n",
165 __func__, r->addr, ret);
172 int ltc3676_pmic_setup(uchar slave_addr)
177 ret = i2c_read(slave_addr, 0x11, 1, &value, 1);
179 printf("%s: i2c_read error: %d\n", __func__, ret);
183 ret = ltc3676_setup_regs(slave_addr, ltc3676_regs,
184 ARRAY_SIZE(ltc3676_regs));
188 printf("VDDCORE set to %umV\n",
189 DIV_ROUND(vref_to_vout(regval_to_mV(VDD_CORE_VAL), 8), 10));
190 printf("VDDSOC set to %umV\n",
191 DIV_ROUND(vref_to_vout(regval_to_mV(VDD_SOC_VAL), 6), 10));
194 ret = ltc3676_setup_regs(slave_addr, ltc3676_regs_2,
195 ARRAY_SIZE(ltc3676_regs_2));
196 printf("VDDIO set to %umV\n",
197 DIV_ROUND(vref_to_vout(
198 regval_to_mV(VDD_IO_VAL_2), 5_2), 10));
200 ret = ltc3676_setup_regs(slave_addr, ltc3676_regs_1,
201 ARRAY_SIZE(ltc3676_regs_1));