2 * Copyright (C) 2005 Sandburst Corporation
4 * See file CREDITS for list of people who contributed to this
7 * This program is free software; you can redistribute it and/or
8 * modify it under the terms of the GNU General Public License as
9 * published by the Free Software Foundation; either version 2 of
10 * the License, or (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
25 #include <asm/processor.h>
27 #include <spd_sdram.h>
29 #include "ppc440gx_i2c.h"
30 #include "sb_common.h"
32 DECLARE_GLOBAL_DATA_PTR;
34 long int fixed_sdram (void);
36 /*************************************************************************
39 * PRI_N - active low signal. If the GPIO pin is low we are the master
41 ************************************************************************/
42 int sbcommon_get_master(void)
44 ppc440_gpio_regs_t *gpio_regs;
46 gpio_regs = (ppc440_gpio_regs_t *)CONFIG_SYS_GPIO_BASE;
48 if (gpio_regs->in & SBCOMMON_GPIO_PRI_N) {
56 /*************************************************************************
57 * metrobox_secondary_present
59 * Figure out if secondary/slave board is present
61 ************************************************************************/
62 int sbcommon_secondary_present(void)
64 ppc440_gpio_regs_t *gpio_regs;
66 gpio_regs = (ppc440_gpio_regs_t *)CONFIG_SYS_GPIO_BASE;
68 if (gpio_regs->in & SBCOMMON_GPIO_SEC_PRES)
74 /*************************************************************************
75 * sbcommon_get_serial_number
77 * Retrieve the board serial number via the mac address in eeprom
79 ************************************************************************/
80 unsigned short sbcommon_get_serial_number(void)
82 unsigned char buff[0x100];
83 unsigned short sernum;
85 /* Get the board serial number from eeprom */
87 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
89 /* Read 256 bytes in EEPROM */
90 i2c_read (0x50, 0, 1, buff, 0x100);
92 memcpy(&sernum, &buff[0xF4], 2);
98 /*************************************************************************
101 * Spin up fans 2 & 3 to get some air moving. OS will take care
102 * of the rest. This is mostly a precaution...
104 * Assumes i2c bus 1 is ready.
106 ************************************************************************/
107 void sbcommon_fans(void)
110 * Attempt to turn on 2 of the fans...
111 * Need to go through the bridge
115 /* select fan4 through the bridge */
116 i2c_reg_write1(0x73, /* addr */
118 0x08); /* val = bus 4 */
129 /* Deselect bus 4 on the bridge */
134 /* select fan3 through the bridge */
135 i2c_reg_write1(0x73, /* addr */
137 0x04); /* val = bus 3 */
148 /* Deselect bus 3 on the bridge */
153 /* select fan2 through the bridge */
154 i2c_reg_write1(0x73, /* addr */
156 0x02); /* val = bus 4 */
167 /* Deselect bus 2 on the bridge */
172 /* select fan1 through the bridge */
173 i2c_reg_write1(0x73, /* addr */
175 0x01); /* val = bus 0 */
186 /* Deselect bus 1 on the bridge */
197 /*************************************************************************
202 ************************************************************************/
203 phys_size_t initdram (int board_type)
207 #if defined(CONFIG_SPD_EEPROM)
208 dram_size = spd_sdram ();
210 dram_size = fixed_sdram ();
216 /*************************************************************************
220 ************************************************************************/
221 #if defined(CONFIG_SYS_DRAM_TEST)
224 uint *pstart = (uint *) CONFIG_SYS_MEMTEST_START;
225 uint *pend = (uint *) CONFIG_SYS_MEMTEST_END;
228 printf("Testing SDRAM: ");
229 for (p = pstart; p < pend; p++)
232 for (p = pstart; p < pend; p++) {
233 if (*p != 0xaaaaaaaa) {
234 printf ("SDRAM test fails at: %08x\n", (uint) p);
239 for (p = pstart; p < pend; p++)
242 for (p = pstart; p < pend; p++) {
243 if (*p != 0x55555555) {
244 printf ("SDRAM test fails at: %08x\n", (uint) p);
254 #if !defined(CONFIG_SPD_EEPROM)
255 /*************************************************************************
256 * fixed sdram init -- doesn't use serial presence detect.
258 * Assumes: 128 MB, non-ECC, non-registered
261 ************************************************************************/
262 long int fixed_sdram (void)
266 /*--------------------------------------------------------------------
268 *------------------------------------------------------------------*/
269 mtsdram (SDRAM0_UABBA, 0x00000000); /* ubba=0 (default) */
270 mtsdram (SDRAM0_SLIO, 0x00000000); /* rdre=0 wrre=0 rarw=0 */
271 mtsdram (SDRAM0_DEVOPT, 0x00000000); /* dll=0 ds=0 (normal) */
272 mtsdram (SDRAM0_WDDCTR, 0x00000000); /* wrcp=0 dcd=0 */
273 mtsdram (SDRAM0_CLKTR, 0x40000000); /* clkp=1 (90 deg wr) dcdt=0 */
275 /*--------------------------------------------------------------------
276 * Setup for board-specific specific mem
277 *------------------------------------------------------------------*/
279 * Following for CAS Latency = 2.5 @ 133 MHz PLB
281 mtsdram (SDRAM0_B0CR, 0x000a4001); /* SDBA=0x000 128MB, Mode 3, enabled */
282 mtsdram (SDRAM0_TR0, 0x410a4012); /* WR=2 WD=1 CL=2.5 PA=3 CP=4 LD=2 */
284 mtsdram (SDRAM0_TR1, 0x8080082f); /* SS=T2 SL=STAGE 3 CD=1 CT=0x02f */
285 mtsdram (SDRAM0_RTR, 0x08200000); /* Rate 15.625 ns @ 133 MHz PLB */
286 mtsdram (SDRAM0_CFG1, 0x00000000); /* Self-refresh exit, disable PM */
287 udelay (400); /* Delay 200 usecs (min) */
289 /*--------------------------------------------------------------------
290 * Enable the controller, then wait for DCEN to complete
291 *------------------------------------------------------------------*/
292 mtsdram (SDRAM0_CFG0, 0x86000000); /* DCEN=1, PMUD=1, 64-bit */
294 mfsdram (SDRAM0_MCSTS, reg);
295 if (reg & 0x80000000)
299 return (128 * 1024 * 1024); /* 128 MB */
301 #endif /* !defined(CONFIG_SPD_EEPROM) */
303 /*************************************************************************
306 * Get the ethernet MAC address for the management ethernet from the
307 * strap EEPROM. Note that is the BASE address for the range of
308 * external ethernet MACs on the board. The base + 31 is the actual
311 ************************************************************************/
313 void board_get_enetaddr(int macaddr_idx, uchar *enet)
317 unsigned char buff[0x100], *cp;
319 if (0 == macaddr_idx) {
322 i2c_init (CONFIG_SYS_I2C_SPEED, CONFIG_SYS_I2C_SLAVE);
324 /* Read 256 bytes in EEPROM */
325 i2c_read (0x50, 0, 1, buff, 0x100);
329 for (i = 0; i < 6; i++,cp++)
332 memcpy(&tmp, &enet[4], 2);
334 memcpy(&enet[4], &tmp, 2);
342 if (1 == sbcommon_get_master() ) {
343 /* Master/Primary card */
346 /* Slave/Secondary card */
356 * Returns 1 if keys pressed to start the power-on long-running tests
357 * Called from board_init_f().
359 int post_hotkeys_pressed(void)