2 * armboot - Startup Code for ARM925 CPU-core
4 * Copyright (c) 2003 Texas Instruments
6 * ----- Adapted for OMAP1510 from ARM920 code ------
8 * Copyright (c) 2001 Marius Gröger <mag@sysgo.de>
9 * Copyright (c) 2002 Alex Züpke <azu@sysgo.de>
10 * Copyright (c) 2002 Gary Jennejohn <gj@denx.de>
11 * Copyright (c) 2003 Richard Woodruff <r-woodruff2@ti.com>
12 * Copyright (c) 2003 Kshitij <kshitij@ti.com>
14 * See file CREDITS for list of people who contributed to this
17 * This program is free software; you can redistribute it and/or
18 * modify it under the terms of the GNU General Public License as
19 * published by the Free Software Foundation; either version 2 of
20 * the License, or (at your option) any later version.
22 * This program is distributed in the hope that it will be useful,
23 * but WITHOUT ANY WARRANTY; without even the implied warranty of
24 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
25 * GNU General Public License for more details.
27 * You should have received a copy of the GNU General Public License
28 * along with this program; if not, write to the Free Software
29 * Foundation, Inc., 59 Temple Place, Suite 330, Boston,
37 #if defined(CONFIG_OMAP1510)
38 #include <./configs/omap1510.h>
42 *************************************************************************
44 * Jump vector table as in table 3.1 in [1]
46 *************************************************************************
52 ldr pc, _undefined_instruction
53 ldr pc, _software_interrupt
54 ldr pc, _prefetch_abort
60 _undefined_instruction: .word undefined_instruction
61 _software_interrupt: .word software_interrupt
62 _prefetch_abort: .word prefetch_abort
63 _data_abort: .word data_abort
64 _not_used: .word not_used
68 .balignl 16,0xdeadbeef
72 *************************************************************************
74 * Startup Code (reset vector)
76 * do important init only if we don't start from memory!
77 * setup Memory and board specific bits prior to relocation.
78 * relocate armboot to ram
81 *************************************************************************
92 * Note: _armboot_end_data and _armboot_end are defined
93 * by the (board-dependent) linker script.
94 * _armboot_end_data is the first usable FLASH address after armboot
96 .globl _armboot_end_data
98 .word armboot_end_data
103 #ifdef CONFIG_USE_IRQ
104 /* IRQ stack memory (calculated at run-time) */
105 .globl IRQ_STACK_START
109 /* IRQ stack memory (calculated at run-time) */
110 .globl FIQ_STACK_START
117 * the actual reset code
122 * set the cpu to SVC32 mode
132 mov r1, #0x81 /* Set ARM925T configuration. */
133 mcr p15, 0, r1, c15, c1, 0 /* Write ARM925T configuration register. */
136 * turn off the watchdog, unlock/diable sequence
145 * mask all IRQs by setting all bits in the INTMR - default
148 ldr r0, =REG_IHL1_MIR
150 ldr r0, =REG_IHL2_MIR
154 * wait for dpll to lock
165 * we do sys-critical inits only at reboot,
166 * not when booting from ram!
168 #ifdef CONFIG_INIT_CRITICAL
172 relocate: /* relocate U-Boot to RAM */
173 adr r0, _start /* r0 <- current position of code */
174 ldr r1, _TEXT_BASE /* test if we run from flash or RAM */
175 cmp r0, r1 /* don't reloc during debug */
178 ldr r2, _armboot_start
180 sub r2, r3, r2 /* r2 <- size of armboot */
181 add r2, r0, r2 /* r2 <- source end address */
184 ldmia r0!, {r3-r10} /* copy from source address [r0] */
185 stmia r1!, {r3-r10} /* copy to target address [r1] */
186 cmp r0, r2 /* until source end addreee [r2] */
189 /* Set up the stack */
191 ldr r0, _TEXT_BASE /* upper 128 KiB: relocated uboot */
192 sub r0, r0, #CFG_MALLOC_LEN /* malloc area */
193 sub r0, r0, #CFG_GBL_DATA_SIZE /* bdinfo */
194 #ifdef CONFIG_USE_IRQ
195 sub r0, r0, #(CONFIG_STACKSIZE_IRQ+CONFIG_STACKSIZE_FIQ)
197 sub sp, r0, #12 /* leave 3 words for abort-stack */
199 ldr pc, _start_armboot
201 _start_armboot: .word start_armboot
205 *************************************************************************
207 * CPU_init_critical registers
209 * setup important registers
210 * setup memory timing
212 *************************************************************************
218 * flush v4 I/D caches
221 mcr p15, 0, r0, c7, c7, 0 /* flush v3/v4 cache */
222 mcr p15, 0, r0, c8, c7, 0 /* flush v4 TLB */
225 * disable MMU stuff and caches
227 mrc p15, 0, r0, c1, c0, 0
228 bic r0, r0, #0x00002300 @ clear bits 13, 9:8 (--V- --RS)
229 bic r0, r0, #0x00000087 @ clear bits 7, 2:0 (B--- -CAM)
230 orr r0, r0, #0x00000002 @ set bit 2 (A) Align
231 orr r0, r0, #0x00001000 @ set bit 12 (I) I-Cache
232 mcr p15, 0, r0, c1, c0, 0
235 * Go setup Memory and board specific bits prior to relocation.
237 mov ip, lr /* perserve link reg across call */
238 bl platformsetup /* go setup pll,mux,memory */
239 mov lr, ip /* restore link */
240 mov pc, lr /* back to my caller */
242 *************************************************************************
246 *************************************************************************
252 #define S_FRAME_SIZE 72
274 #define MODE_SVC 0x13
278 * use bad_save_user_regs for abort/prefetch/undef/swi ...
279 * use irq_save_user_regs / irq_restore_user_regs for IRQ/FIQ handling
282 .macro bad_save_user_regs
283 sub sp, sp, #S_FRAME_SIZE @ carve out a frame on current user stack
284 stmia sp, {r0 - r12} @ Save user registers (now in svc mode) r0-r12
286 ldr r2, _armboot_end @ find top of stack
287 add r2, r2, #CONFIG_STACKSIZE @ find base of normal stack
288 sub r2, r2, #8 @ set base 2 words into abort stack
289 ldmia r2, {r2 - r3} @ get values for "aborted" pc and cpsr (into parm regs)
290 add r0, sp, #S_FRAME_SIZE @ grab pointer to old stack
294 stmia r5, {r0 - r3} @ save sp_SVC, lr_SVC, pc, cpsr
295 mov r0, sp @ save current stack into r0 (param register)
298 .macro irq_save_user_regs
299 sub sp, sp, #S_FRAME_SIZE
300 stmia sp, {r0 - r12} @ Calling r0-r12
301 add r8, sp, #S_PC @ !!!! R8 NEEDS to be saved !!!! a reserved stack spot would be good.
302 stmdb r8, {sp, lr}^ @ Calling SP, LR
303 str lr, [r8, #0] @ Save calling PC
305 str r6, [r8, #4] @ Save CPSR
306 str r0, [r8, #8] @ Save OLD_R0
310 .macro irq_restore_user_regs
311 ldmia sp, {r0 - lr}^ @ Calling r0 - lr
313 ldr lr, [sp, #S_PC] @ Get PC
314 add sp, sp, #S_FRAME_SIZE
315 subs pc, lr, #4 @ return & move spsr_svc into cpsr
319 ldr r13, _armboot_end @ get bottom of stack (into sp by by user stack pointer).
320 add r13, r13, #CONFIG_STACKSIZE @ head to reserved words at the top of the stack
321 sub r13, r13, #8 @ reserved a couple spots in abort stack
323 str lr, [r13] @ save caller lr in position 0 of saved stack
324 mrs lr, spsr @ get the spsr
325 str lr, [r13, #4] @ save spsr in position 1 of saved stack
327 mov r13, #MODE_SVC @ prepare SVC-Mode
329 msr spsr, r13 @ switch modes, make sure moves will execute
330 mov lr, pc @ capture return pc
331 movs pc, lr @ jump to next instruction & switch modes.
334 .macro get_irq_stack @ setup IRQ stack
335 ldr sp, IRQ_STACK_START
338 .macro get_fiq_stack @ setup FIQ stack
339 ldr sp, FIQ_STACK_START
346 undefined_instruction:
349 bl do_undefined_instruction
355 bl do_software_interrupt
375 #ifdef CONFIG_USE_IRQ
382 irq_restore_user_regs
387 /* someone ought to write a more effiction fiq_save_user_regs */
390 irq_restore_user_regs
411 ldr r1, rstctl1 /* get clkm1 reset ctl */
412 mov r3, #0x3 /* dsp_en + arm_rst = global reset */
413 strh r3, [r1] /* force reset */